zephyr/soc
Daniel Leung 60db257e69 soc: intel_s1000: add dummy atexit() for Clang++
Add a dummy atexit() function when compiling C++ source files
using Clang++.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-07 17:09:38 +01:00
..
arc global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
arm soc: nxp: ke1xf: rename ftm instances to pwm to match other SoCs 2020-01-06 10:03:20 -06:00
nios2 global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
posix kernel: rename z_arch_ to arch_ 2019-11-07 15:21:46 -08:00
riscv interrupt_controller: plic: use shared symbol for DT_* 2020-01-06 13:28:21 -05:00
x86 soc: x86: apollo_lake: Turn .rst doc into .txt 2019-12-06 16:56:24 +01:00
xtensa soc: intel_s1000: add dummy atexit() for Clang++ 2020-01-07 17:09:38 +01:00
Kconfig riscv32: rename to riscv 2019-08-02 13:54:48 -07:00