For true mmio-sram, arc,iccm, arc,dccm nodes we should not be setting
device_type = "memory". This should be used for true DRAM regions of
memory and not on SoC SRAMs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).
- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
For HPET devices, configure it with fixed delivery mode because HPET
timer interrupt is needed to fuel the scheduler for all CPUS.
For all other type of devices, like UART, I2C, GPIO, Ethernet, etc.
configure them as lowest priority delivery mode, in which IO APIC
delivers the interrupt to the processor core that is executing at the
lowest priority among all the processors listed in the specified
destination. In this case, the device drivers can avoid the trouble of
handling repeated interrupts delivered to all CPUS.
Signed-off-by: Zide Chen <zide.chen@intel.com>
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL. We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.
This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h. Also
remove any other stale ENTROPY related defines in dts_fixup.h files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds multi-processing support for Intel Apollo Lake ADSP.
Some of the start-up code is borrowed from ESP32.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Create an SoC definition for the Audio DSP on Intel Apollolake
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree
Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api
Note:
- timer module interrupt registers shall be removed when
timer driver implemented.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Fixes#3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig
Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts
- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs
- Old Silicon rev is not supported
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Remove the handcoded multi-level IRQ values in device tree. We now are
able to generate the encoded multi-level IRQ value.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix the following dtc warnings on S1000:
Warning (simple_bus_reg): /soc/pinmux@81C30: simple-bus unit
address format error, expected "81c30"
Warning (alias_paths): /aliases: aliases property name must
include only lowercase and '-'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Intel S1000 has 4MB of internal memory.
In DTS it was defined as 3MB and is now updated to 4MB.
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
