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383 commits

Author SHA1 Message Date
Richard Osterloh
4ce35300c8 drivers: i2c: Add STM32G4X I2C support 
Add I2C driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Richard Osterloh
c68e027c28 drivers: flash: Add STM32G4X flash support 
Add flash driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Richard Osterloh
1d2a030ee3 drivers: serial: Add STM32G4X serial support 
Add UART driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Richard Osterloh
f7bad922f0 drivers: gpio: Add STM32G4X gpio support 
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Richard Osterloh
ca7cbb5a08 drivers: clock_control: Add STM32G4X clock support 
Add clock support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Richard Osterloh
b87878d09c soc: arm: st_stm32: Add STM32G4 SoC series 
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
 2019-10-04 18:44:24 -07:00
Armando Visconti
79c24e3e5e soc: arm: st: add stm32l4r9xx support 
Add support for ST stm32l4r9xx System-on-Chip.

See http://www.st.com/en/microcontrollers/stm32l4r9-s9.html
for more details.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
 2019-09-19 09:47:45 -05:00
Erwin Rol
efa44b1885 arm: stm32f4: Add CAN1 support 
Add CAN1 pinmux definitions and DT entries for STM32F4 series.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
 2019-09-19 08:52:53 -05:00
Pavlo Hamov
97e1ad1b8c boards: stm32f429i_disc1: add SPI5 support 
Add support of RCC configuration.
Add pinmux items

Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
 2019-09-18 06:43:47 -05:00
Robert Weber
17f545be7d soc: stm32wb: Add support for STM32 IWDG 
The driver for STM32's independent watchdog already exists and is
compatible with the stm32wb SoC. Enable the independent watchdog
for the stm32wb series for use with this driver.

Signed-off-by: Robert Weber <robertweber95@gmail.com>
 2019-09-12 13:21:06 -05:00
Pushpal Sidhu
e5deb5adc9 dts: stm32l4r5: Add extra timer nodes not present in parent 
Add timer nodes that aren't present in the parent file. Adds timers 3,
4, 5, 8, 17.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
 2019-09-12 08:43:53 -05:00
Ioannis Konstantelias
1db2685b57 dts: stm32: Add WWDG in STM32 dtsi files 
Added System WWDG support for STM32 devices.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
 2019-09-11 22:13:36 -05:00
Kumar Gala
e8524965c5 dts: Add io-channel details to ADC nodes/bindings 
Update the ADC bindings to include #io-channel-cells and update the
related dts files to set #io-channel-cells.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-09-07 10:25:02 -05:00
Armando Visconti
757366c18c dts: stm32l4r5: (FIX) Provide clock info for spi3 controller 
SPI3 clock info were missing and following macros were
not generated:

 - DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BITS
 - DT_ST_STM32_SPI_FIFO_40003C00_CLOCK_BUS

Signed-off-by: Armando Visconti <armando.visconti@st.com>
 2019-08-12 10:45:14 -05:00
Kumar Gala
b52b1b2222 dts: arm: Remove device_type = "memory" from SRAM nodes 
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-08-06 08:59:22 -04:00
Markus Fuchs
edb58ec46b soc: arm: st_stm32: add STM32F437XI 
This patch adds support for the STM32F437XI SoC.

Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
 2019-08-05 19:57:45 -04:00
Yaël Boutreux
3a967f92c3 soc: arm: st_stm32: stm32mp1: Add SPI support 
Add SPI support for STM32MP1x SoC.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
 2019-08-05 13:52:34 -05:00
Findlay Feng
3bc7d9e50e drivers: spi: Fix spi related files of stm32f1x 
pinmux: Add the relevant definition of the spi3 pin
dts: Fix a bug, spi3 does not have a label
soc: Supplement spi3 related definition

Signed-off-by: Findlay Feng <i@fengch.me>
 2019-07-31 14:26:50 -05:00
Christophe Priouzeau
83fb969cfb soc: stm32mp157: add I2c support 
Add I2C support and I2C5 configuration for arduino connector.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@linaro.org>
 2019-07-31 05:59:16 -04:00
Rick Conrey
8e62304b3b dts: wb: enable ADC 
Enable ADC on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
 2019-07-31 05:38:25 -04:00
Rick Conrey
38ed3e0162 dts: wb: enable PWM on STM32WB 
Enable PWM on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
 2019-07-26 11:27:15 -04:00
Arnaud Pouliquen
d9add0a65a ipm: Add support for stm31mp1 Soc 
Add the mailbox support for stm32mp15 SoC relied on IPCC peripheral.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
 2019-07-26 14:38:43 +02:00
Erwan Gouriou
55684e03ac dts/arm/st: Remove nodes i2s4, i2s5 and i2s6 
stm32f429.dtsi wrongly introduced i2s nodes 4, 5 and 6.
Remove them as actually only i2s nodes 2 and 3 are supported on
these socs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-25 10:52:26 -04:00
Rick Conrey
bcd5f321e0 dts: wb: Enable spi on stm32wb 
enable spi on stm32wb

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
 2019-07-25 10:49:58 -04:00
Alexander Wachter
fbfb56b331 dts: stm32f7: Add Device Tightly Coupled Memory 
This commit adds the DTCM to the STM32F7 MCUs

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
 2019-07-19 10:05:46 +02:00
Kumar Gala
0da4432bca usb/stm32: Fix missing clock property for usb on stm32f103Xb 
The stm32f103Xb dts was missing the clock property for the usb
controller node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-07-18 11:24:27 +02:00
Francois Ramu
474c99c9ef drivers: usb/stm32: use dts information to populate clock settings 
This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each  dtsi files

Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-16 09:08:51 -04:00
Rick Conrey
e1e5b6a70e dts: wb: Enable RTC 
Enable RTC on STM32WB

Signed-off-by: Rick Conrey <rick.conrey@witiproducts.com>
 2019-07-11 13:10:15 -05:00
Yannis Damigos
30ac164771 dts: stm32l4: Fix USB phy node for stm32l432 and stm32l452 
Fix USB phy node for stm32l432 and stm32l452, which contain
a USB controller and not a OTG FS controller.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
 2019-07-11 13:07:01 -05:00
Francois Ramu
45eb589c5c dts: remove unused clock-controllers property #17122 
The 'clock-controllers' property is not specified and not used for any
generation.  Lets remove it.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00
Francois Ramu
26c38a49a2 soc: arm: uart: Add STM32G0X UART support 
Add UART support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00
Francois Ramu
dd3ee06af7 drivers: gpio: Add STM32G0X pinmux support 
Add gpio support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/gpio/gpio_stm32.h
 2019-07-05 10:35:55 -05:00
Francois Ramu
9b2025c891 drivers: pinmux: Add STM32G0X pinmux support 
Add pinmux support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/pinmux/stm32/pinmux_stm32.h
 2019-07-05 10:35:55 -05:00
Francois Ramu
da48451a01 drivers: pwm: Add STM32G0XX pwm support 
Add pwm support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00
Francois Ramu
624c566306 drivers: clock_control: Add STM32G0XX clock support 
Add clock support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00
Francois Ramu
7ea00134f5 soc: arm: st_stm32: Add STM32G071 SoC series 
This patch adds support for the STM32G071xx
 from STMicroelectronics.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00
Erwan Gouriou
f81176aa31 dts/arm/st: l0: Fix gpioe reg address 
Fix reg to 0x50001000.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-04 09:22:47 -04:00
Erwan Gouriou
d424385d27 dts: stm32h7: Add dtsi for m4 core 
This change adds sram1 plus m4 core package level dtsi.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-04 08:50:04 -04:00
Erwan Gouriou
fda2ea7253 drivers/serial: stm32: Add support for STM32H7 series 
Add needful to enable uart on STM32H7.
This mostly impact dts but as well soc for fixup.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-04 08:50:04 -04:00
Erwan Gouriou
d185ec4cff drivers/gpio: Add support on STM32H7 series 
Add GPIO support on STM32H7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-04 08:50:04 -04:00
Erwan Gouriou
ecd23f4fa3 dts: STM32H747 basic device tree description 
Initiate stm32h7 device tree description, with stm32h747 single core
configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-07-04 08:50:04 -04:00
Kumar Gala
12589d6b64 dts: remove unused clock-controllers property 
The 'clock-controllers' property isn't specified and not used for any
generation.  Lets remove it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-06-28 07:23:31 -05:00
Ioannis Konstantelias
3ff4e52c7a dts: pinctrl: stm32l4: Add alternative USART3 pair 
Added (rx: PC5, tx: PC4) as alternative USART3 pair.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
 2019-06-27 07:19:38 -04:00
Manivannan Sadhasivam
12faf11f75 dts: arm: st: mp1: Add missing uart4 and uart7 pinmux nodes 
Add missing uart4 and uart7 pinmux nodes for STM32MP157 MPU.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 2019-06-26 07:37:35 -04:00
Henrik Brix Andersen
dded1d076a dts: can: allow individual specification of prop seg and phase seg1 quanta 
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
 2019-06-24 14:33:46 -05:00
Ioannis Konstantelias
dfca5ab817 soc: stm32: Add STM32L496XE support 
Added support for the STM32L496XE series with 512KB internal flash and
256KB SRAM of contiguous addresses.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
 2019-06-17 16:35:12 -04:00
Roger N'Guessan
ddcd4d5a2e dts: wb: enable I2C 
Enable I2C on STM32WB

Signed-off-by: Roger N'Guessan <roger.nguessan@st.com>
 2019-06-07 11:47:59 -04:00
Erwan Gouriou
79edb8b632 dts: stm32wb: Limit flash size to 812K 
stm32wb55rg is a dual core SoC (M4/M0) with a radio/protocol stack
running on M0 core. M0 FW starts at flash address 0x80CB000.
So flash size available to zephyr is 812K instead of 1M.
Configure package size to reflect this (flash size is now 812K)
and update MPU setting to exclude M0 FW. From MPU point of view,
we set flash size to 512K since we should chose a size being a power
of 2.
If we consider there will be 2 images partitions in a FOTA scheme,
512 K is beyond image-0 and hence is sufficient to cover application
image.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-06-03 09:38:19 -04:00
Erwan Gouriou
d777413b19 drivers/flash: stm32wb: Add driver for stm32wb 
Add flash driver for stm32wb

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-06-03 09:38:19 -04:00
Erwan Gouriou
9ce27ff1a5 dts: stm32wb: Delete useless sram definitions 
sram2a and sram2b where defined in the prospect of defining
HCI shared memory sections from device tree.
Remove them, since this is not the case anymore.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
 2019-06-03 09:38:19 -04:00