Commit graph

5973 commits

Author SHA1 Message Date
Attie Grande
a10b8cb1c0 soc: atmel_sam0: Add support for SAMR34 and SAMR35 parts
Implement support for SAMR34 and SAMR35 parts, tested on a SAMR34
Xplained Pro dev board. Confirmed operational peripherals: UART, GPIO,
PWM, ADC.

NOTE: The SAMR34 datasheet lists NVIC line 20 for the ADC's interrupt,
but the SAML21 datasheet gives line 22. It appears that the SAMR34 sheet
is incorrect (the ADC doesn't function with line 20), and as such, I have
also omitted the adjustments for TC4 and AC...

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-07-18 10:35:46 +00:00
Attie Grande
64e4200d94 soc: atmel_sam0: Add support for SAML21 parts
Implement support for SAML21 parts, tested on a SAML21 Xplained Pro dev
board. Confirmed operational peripherals: UART, GPIO, PWM, ADC.

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-07-18 10:35:46 +00:00
Enjia Mai
9b8726c101 soc: xtensa: include linker/section.h to fix the build error
Some tests was built failed due to cannot find the __imr macro:
Try to fix it by including the linker/section.h in soc.h.

Fixes #47830.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-16 05:53:45 -04:00
Mulin Chao
24fb705cdd npcx: scfg: psl: cleanup unused functions and DT files
Clean up unused psl functions in scfg.c, unused DT macros, unused psl DT
nodes and related yaml files. Currently, PSL pad configurations are made
by pinctrl mechanism. Please refer
https://issuetracker.google.com/234861079 for more detail.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-15 10:00:15 +02:00
Johann Fischer
3c971307dc arch/kernel/soc/samples: use unsigned int for irq_lock()
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2022-07-14 14:37:13 -05:00
Tom Burdick
c225cf3b8a dma: HDA rename prefix from cAVS to ADSP
HDA is a common IP used across the entire ADSP line and deserves
a name respecting that alongside similiar IP drivers such as the
ADSP GPDMA driver.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-07-14 17:53:46 +00:00
Anas Nashif
76f990af8a intel_adsp: move attribute macros to dedicated linker header
Those belong where other attribute macros are usually defined. They are
not xtensa or ADSP specific and are used across Intel SoCs on all
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Anas Nashif
680df57582 intel_adsp: add a header for soc specific defines
Instead of ifdeffing on SOCs and missing things along the way, maintain
platform definitions that are different among SoCs in one single file
per SoC and use data from that file critical spots.

In this case, we were checking for CAVS25, setting one value where
everything else was set to 0, so new SoC like ACE was getting 0 as well,
although it has the same value as TGL.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Anas Nashif
e328508a66 intel_adsp: ace: run soc.c through clang-format
Just a minor cleanup.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Anas Nashif
fc67224864 intel_adsp: ace: simplify and cleanup sram init functions
Remove redundant code and simplify SRAM init functions.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Anas Nashif
332d9fb7d1 intel_adsp: ace: rename inx -> idx
Original author probably meant inx for index, use idx instead.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Anas Nashif
f82b271b1f intel_adsp: ace: convert delay count into a define
The delay count was converted to a define.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-13 11:15:46 -04:00
Mulin Chao
3468a02f72 npcx: scfg: pinmux: cleanup unused functions and macro
Clean up unused pinmux function 'npcx_pinctrl_mux_configure()' and
related 'NPCX_DT_IO_ALT*' macro functions.

Please refer https://issuetracker.google.com/234861079 for more detail.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-13 10:38:49 +02:00
Tim Lin
04c6d7569f ITE: drivers/i2c: Add command queue mode
Adding command queue mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.

I2C command queue mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.

Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
   0.72ms(2.54ms->1.82ms) compared to the original pio mode when the
   frequency is 100KHz.
3. krabby platform can boot normally.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-07-13 10:15:32 +02:00
Jay Vasanth
7c88336171 soc: device_power: MEC172x: fix incorrect for loop check
fix incorrect iteration condition in MEC172x device_power.c

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-07-12 09:24:30 -05:00
Jeppe Odgaard
af6f975391 soc: select HAS_MCUX_SRC for MIMXRT1052
Select missing HAS_MCUX_SRC Kconfig symbol for MIMXRT1052,
that allows using NXP i.MX mcux SRC hwinfo driver.

Fixes https://github.com/zephyrproject-rtos/zephyr/issues/47025

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2022-07-12 10:17:38 +02:00
Pieter De Gendt
3cde5a0aaa soc: mimxrt1064: Remove unused low power header include
The included header file wasn't used.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-11 17:51:18 -05:00
Pieter De Gendt
3556bf6fa9 soc: mimxrt1064: Fix low power build issue with video PLL
Fix build error if CONFIG_PM and CONFIG_INIT_VIDEO_PLL are enabled.
Added 2 missing semicolons.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-11 17:51:18 -05:00
Peter Ujfalusi
e243122c1e dma/cavs_hda: Configure DGMBS only for host DMA configuration
The DGMBS should be only set for the host side and not on the link DMA.

Fixes: #46632
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2022-07-11 18:04:54 +00:00
Carlo Caione
2f5fef960e sample: s2ram: Introduce S2RAM sample
Introduce a template / sample for S2RAM running on rf5340dk.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 15:26:26 +02:00
Carlo Caione
541024eb43 riscv: litex-vexriscv: Add missing header
soc.h is using sys_read* functions. Add the proper header for that.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 14:31:39 +02:00
Carlo Caione
5d104f20ab riscv: Introduce API for CLIC and PLIC
Introduce a new interface for CLIC and PLIC to be used by the drivers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 14:31:39 +02:00
Carlo Caione
56466a14e1 riscv: Decouple CLIC and PLIC
Try to decouple CLIC and PLIC as much as possible.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 14:31:39 +02:00
Carlo Caione
31c5dc2230 Kconfig: Introduce RISCV_HAS_CLIC
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 14:31:39 +02:00
Julien Massot
08f5fb5cdb soc: arm: fvp_aemv8r_aarch32: define static mpu regions
Add static MPU regions for this SoC.
These regions will be initialized as static region during system boot.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-07-11 11:17:02 +02:00
Flavio Ceolin
ad8ae7f735 dma: intel: Merge cavs and ace gpdma
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-11 10:21:17 +02:00
Flavio Ceolin
b1abe896e6 intel_adsp: ace: Fix function return
zephyr/soc/xtensa/intel_adsp/ace_v1x/irq.c: In function
'z_soc_irq_is_enabled':

zephyr/soc/xtensa/intel_adsp/ace_v1x/irq.c:47:3: warning: 'return'
with no value, in function returning non-void [-Wreturn-type]

   47 |   return;

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-08 21:13:29 -04:00
Kumar Gala
a22ac090db soc: xtensa: intel_adsp: ace_v1x: irq: Convert to use DEVICE_DT_GET
Move to use DEVICE_DT_GET instead of device_get_binding as
we work on phasing out use of DTS 'label' property.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-08 20:03:32 +00:00
Kumar Gala
37fc9552e6 soc: xtensa: intel_adsp: irq: Convert to use DEVICE_DT_GET
Move to use DEVICE_DT_GET instead of device_get_binding as
we work on phasing out use of DTS 'label' property.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-08 20:03:32 +00:00
Kumar Gala
4faf362030 soc: apollo_lake: gpio: Drop use of DT_LABEL
Change APL_GPIO_DEV_* defines to be DT_NODELABELs instead of
"label" strings.  This lets us change users of these defines to
use DEVICE_DT_GET.

We update samples/board/up_squared/gpio_counter to use DEVICE_DT_GET
as part of this change.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-08 20:01:47 +00:00
Tom Burdick
572ccd531d intel_adsp: Use device tree to enable/disable each HDA driver
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.

Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.

By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-07-08 14:33:06 -04:00
Francois Ramu
c1782a096e soc: arm: new stm32f412Rx device
This adds a new stm32f412Rx in the list of stm32F4 devices.
The module stm32cube/stm32f4/soc/stm32f412rx.h exists

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-07-08 10:49:31 +02:00
Marc Herbert
08baba2520 soc/intel_adsp: cavstool: add support for DSP power state: D3
Change some behaviors when --log-only is passed in order to add support
for DSP power state: D3. This makes it possible to keep `cavstool
--log-only` running permanently in the "real-world" use case where the
Linux kernel loads the firmware and powers down audio when not in use.

More specifically:
- Do not disable D3 when using --log-only.
- Wait forever for the FW at boot time.
- Check live status when an invalid IPC is received and wait forever if
  not alive.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-07-08 10:45:44 +02:00
Marc Herbert
ef4cd76970 soc/intel_adsp: cavstool: new parameter wait_fw_entered(timeout_s)
Add a new timeout_s parameter that can also be 'None' = infinite.

No functional change. Required to add future support for DSP power
state: D3

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2022-07-08 10:45:44 +02:00
Mulin Chao
851e357aa4 pinctrl: npcx: add pinctrl support for psl pads
This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:

1. Add two pinctrl properties and their enums for PSL input
   detection configuration.
    psl-in-mode:
      - "level"
      - "mode"
    psl-in-pole:
      - "low-falling"
      - "high-rising"

2. Add macro functions to get PSL input detection and pin-muxing
   configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
   properties.

Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.

/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
	psl-in-mode = "edge";
	psl-in-pol = "low-falling";
};

A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-07 14:12:52 +00:00
Joep Buruma
7e0fff24c7 drivers: pwm: add pwm driver for rpi_pico
Add pwm driver implementation for rpi pico family.
Adds myself as codeowner of drivers/pwm/*rpi_pico*

Signed-off-by: Joep Buruma <burumaj50@gmail.com>
2022-07-07 15:17:26 +02:00
Carlo Caione
fbe3436b36 esp32c3: Avoid circular header inclusion
Include arch.h from a different location to avoid missing symbol errors.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 10:00:20 +02:00
Carlo Caione
0e788b89a6 riscv: Use IRQ vector table for vectored mode
For vectored interrupts use the generated IRQ vector table instead of
relying on a custom-generated table.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 10:00:20 +02:00
Pieter De Gendt
e381170282 uart_pipe: Remove obsolete UART_PIPE_ON_DEV_NAME Kconfig
The UART pipe device is selected with devicetree chosen zephyr,uart-pipe

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-07 09:59:49 +02:00
Flavio Ceolin
158a87018c intel: adsp: Simplify PM
Both idle and suspend states were just being used to set the cpu
idle. That is not necessary, if the pm policy does not find a suitable
power state the kernel automatically calls k_cpu_idle().

This remove unnecessary code and the weirdness of having
min-residency-us set to 0 and other arbitrary values.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-07 02:10:11 -04:00
Enjia Mai
faff3f7ecc soc: xtensa: partial fix of socket misuse and refine the code
1. Improve the firmware transfer reliability by fixing the misuse
of the socket. Fix the most frequent occurence of the common `recv()`
bug described here:

https://docs.python.org/3/howto/sockets.html#using-a-socket

The longer term fix is to switch to a higher level API like Python
Remote Objects.

2. Not rely on the client's command to disconnect. Previously we
rely on the SIGINT to send stop_command to the server, but it does
not work well in some environments. Refine the whole logic and the
sever disconnect service by checking if the client is alive or not.

These changes make the client-server-based cavstool more stable.

Fixes #46864

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-07-06 20:38:41 -04:00
Andrey Borisovich
e0b1d81acb soc: intel_adsp: added casting for C++ compiler in soc.h
Header soc.h is included during C++ source file compilation
and required adding C++ casts as implicit casting from void*
is forbidden. Fixed minor warning comparing signed with unsigned
integer.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-07-06 15:11:07 -04:00
Andrey Borisovich
aa253d9ab1 soc: intel_adsp: reading HP SRAM banks count for ACE1X from Devicetree
Replaced hardcoded for intel_adsp_ace15_mtpm board
HP_MEMORY_BANKS value used in SOF code with generic approach -
using PLATFORM_HPSRAM_EBB_COUNT read from Devicetree.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-07-06 15:11:07 -04:00
Flavio Ceolin
92725e3102 soc: adsp: sram: Assorted cosmetic fixes
General code style fixes.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00
Flavio Ceolin
7291c518a0 soc: ace: Organizing include headers
Properly prefixing some include files with "zephyr", also organizing
the order they are included.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00
Flavio Ceolin
65fbfcd480 soc: ace: Move power management to its own file
Move power management hooks to its own C file.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00
Flavio Ceolin
e4a3e2d8b6 intel_adsp: Unify cavs and ace timers
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00
Andrey Borisovich
e0e2dbf6f0 soc: ace1x: provided register names to addresses
Provided register names to hardcoded addresses in ace_v1x-regs
header.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-07-06 15:11:07 -04:00
Anas Nashif
8792dd800d soc: ace1.x: use common code
Do not duplicate code in new SoC and reuse code from intel_adsp/common.
Move SRAM code into own file in common code and setup SRAM in soc for
MTL platform.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 15:11:07 -04:00
Tomasz Leman
0b15a8d3ef soc: ace_v1x: pm_state_exit_post_ops implementation
Implementation of the function used during the exit from the lower power
states.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-07-06 15:11:07 -04:00