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riscv: Introduce API for CLIC and PLIC

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Introduce a new interface for CLIC and PLIC to be used by the drivers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2022-07-08 10:32:44 +02:00 • committed by Carles Cufí
commit 5d104f20ab
5 changed files with 103 additions and 0 deletions
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1
drivers/interrupt_controller/intc_nuclei_eclic.c
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@ -15,6 +15,7 @@
#include <soc.h>
#include <zephyr/sw_isr_table.h>
#include <zephyr/drivers/interrupt_controller/riscv_clic.h>
union CLICCFG {
struct {

1
drivers/interrupt_controller/intc_plic.c
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@ -18,6 +18,7 @@
#include <soc.h>
#include <zephyr/sw_isr_table.h>
#include <zephyr/drivers/interrupt_controller/riscv_plic.h>
#define PLIC_MAX_PRIO DT_INST_PROP(0, riscv_max_priority)
#define PLIC_PRIO DT_INST_REG_ADDR_BY_NAME(0, prio)

46
include/zephyr/drivers/interrupt_controller/riscv_clic.h Normal file
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@ -0,0 +1,46 @@
/*
* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for Core-Local Interrupt Controller (CLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
/**
* @brief Enable interrupt
*
* @param irq interrupt ID
*/
void riscv_clic_irq_enable(uint32_t irq);
/**
* @brief Disable interrupt
*
* @param irq interrupt ID
*/
void riscv_clic_irq_disable(uint32_t irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
int riscv_clic_irq_is_enabled(uint32_t irq);
/**
* @brief Set interrupt priority
*
* @param irq interrupt ID
* @param prio interrupt priority
* @param flags interrupt flags
*/
void riscv_clic_irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags);
#endif /* ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_ */

52
include/zephyr/drivers/interrupt_controller/riscv_plic.h Normal file
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@ -0,0 +1,52 @@
/*
* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for Platform Level Interrupt Controller (PLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
/**
* @brief Enable interrupt
*
* @param irq interrupt ID
*/
void riscv_plic_irq_enable(uint32_t irq);
/**
* @brief Disable interrupt
*
* @param irq interrupt ID
*/
void riscv_plic_irq_disable(uint32_t irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
int riscv_plic_irq_is_enabled(uint32_t irq);
/**
* @brief Set interrupt priority
*
* @param irq interrupt ID
* @param prio interrupt priority
*/
void riscv_plic_set_priority(uint32_t irq, uint32_t prio);
/**
* @brief Get active interrupt ID
*
* @return Returns the ID of an active interrupt
*/
int riscv_plic_get_irq(void);
#endif /* ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_ */

3
soc/riscv/riscv-privilege/common/soc_common_irq.c
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@ -11,6 +11,9 @@
*/
#include <zephyr/irq.h>
#include <zephyr/drivers/interrupt_controller/riscv_clic.h>
#include <zephyr/drivers/interrupt_controller/riscv_plic.h>
#if defined(CONFIG_RISCV_HAS_CLIC)
void arch_irq_enable(unsigned int irq)