Add support for Omron D6F mass flow rate sensor series. The sensor series
outputs an analogue voltage which is read using an ADC.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Adds a skip-calibration property to the voltage divider sensor,
which can be enabled, in case the underlying ADC driver
does not support calibration.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
Add spi parameters for spi peripherals to spi-device.yaml.
These properties and their names are mostly inspired by linux
spi-peripheral-props.yaml.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- Fixes issue where zephyr,flash in ocram node overlaps with physical
SRAM sram1 used for zephyr,sram.
- Updates overlays that moved zephyr,flash to ocram now use default
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Add the `uart-controller-pin-inversion.yaml` include to the `vnd,serial`
test binding. This enables testing for other drivers that require pin
inversion to function correctly. For example, the
`worldsemi,ws2812-uart` LED strip driver relies on `tx-invert`.
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Add a new devicetree binding, worldsemi,ws2812-uart, for controlling
WS2812-compatible LED strips using a UART peripheral.
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Add cpuclk driver for mt8188 platform. Note that the cpuclk driver is
not yet ported, it works only with mt8188.
Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
During testing with teensy 4.0 it was discoverd that toggling
at high frequencies led to missed steps. As per the datasheets
of step-dir drivers an active edge needs to be maintained for
a certain timerperiod, for a step to be executed.
Instead of toggling pin twice instantaneously, the current fix
halves the step period and the step-pin is toggled on the timeout
of the respective timing source.
rework stepper stepper stop
set step pin to low if the driver does not support dual edge
and increment/decrement the actual position by one
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
1. the three boards share the same board schematic
- frdm_mcxa266, frdm_mcxa346, frdm_mcxa366
2. board dts,kconfig and cmake file could share
3. add MCXA366 soc and frdm_mcxa366 board
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
1. nxp_mcxa266_a346_a366_common.dtsi created for soc dts
2. frdm_mcxa266_a346_a366_common.dtsi.dtsi created for board dts
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
The IIS3DWB is a system-in-package featuring a 3-axis digital vibration
sensor with low noise over an ultrawide and flat frequency range.
The wide bandwidth, low noise, very stable and repeatable sensitivity,
together with the capability of operating over an extended temperature
range (up to +105 C), make the device particularly suitable for vibration
monitoring in industrial applications.
Datasheet: https://www.st.com/en/mems-and-sensors/iis3dwb.html
This driver is currently only supporting the polling-mode read_and_decode
APIs (both blocking and non-blocking).
This driver is based on stmemsc HAL i/f v2.9.1.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
- Add the pdl-based version of the i2c driver for infineon devices
like the one found on the kit_psc3m5_evk board.
- In the pull request review it was decided that the
I2C_INFINEON_CAT1_ASYNC option was not needed. The driver would
always be interrupt driven. This meant that the existing driver
had to be updated as well.
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Add a DTS fragment to support defining a RP2350 series SoC with two
Hazard3 cores in use.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The RP2350 uses the Xh3irq interrupt controller, which supports nested
and prioritised interrupts. This adds initial support, configuring the
controller in 'direct' (non-vectored) mode.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
These .dtsi files are common regardless of which permutation of cores
are in the two CPU 'sockets'.
Take the opportunity to make the includes paths to rp2350a.dtsi relative
to the current file to emphasise their relationship.
This is foundation work ahead of adding support for the Hazard3 cores.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The s2ram power state is a "suspend-to-ram" state which is not
supported by the radio core, so delete it from the overlay.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add the driver itself and Kconfig/CMakeLists/dts/bindings related to it.
Other files and libraries needed are in ST's dedicated folder
hal_stm32 (modules/hal/stm32).
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
This commit improves the I3C handling of open-drain
timing configurations with the following changes:
- Add OD minimum high_ns and low_ns DT properties
- Implement dw_i3c_init_scl_timing for runtime timing updates
- Initialize scl_od_min configuration from device tree
- Maintain backward compatibility with existing configurations
Requirement (MIPI Specification for I3C Basic v1.2 (16-Dec-2024),
Section 4.3.11.2 & Table 49):
- The MIPI I3C specification mandates different open-drain speeds during
bus initialization as defined in
"I3C Basic Open Drain Timing Parameters".
- The first broadcast address (7'h7E+W) must be transmitted at a slower
open-drain speed to ensure visibility to all devices on the I3C bus,
including legacy I2C devices. This slow speed (minimum 200ns Thigh)
allows I2C devices to properly detect the I3C mode transition and
disable their spike filters before switching to I3C mode. After the
initial broadcast, normal I3C open-drain speeds can be used for
regular operation.
Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
Update board to use default power domain for the "peripheral"
domain, which when resumed prevents SoC from entering suspend and
standby states as these power down peripherals.
Note by co-author: Cherry-picked this commit and edited it to work
without the generic domain refactoring on the branch it came from.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Refactor low power state handling to not tie to zephyr,disabling-states
and define it's own separate "low power states" property in DT instead.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- add NXP_BOARD_SPECIFIC_MPU_SETTINGS kconfig to provide a switch
for developer if they want to use private mpu settings
CONFIG_NXP_BOARD_SPECIFIC_MPU_SETTINGS==1 | NXP default setting
CONFIG_NXP_BOARD_SPECIFIC_MPU_SETTINGS==0 | User specific
- Use DT function to get memory base address and region size for cm7
- CM33 use dts to set mpu settings
- Add REGION_CUSTOMED_MEMORY_SIZE macro provide a common mapping ways
to map actual memory_size_kb to "region_size"
- The settings of the unified memory on cm33/cm7 cores:
ocram1/flexspi2 -> REGION_RAM_NOCACHE_ATTR
ocram2/dtcm -> REGION_RAM_NOCACHE_ATTR
flexspi/itcm -> REGION_FLASH_ATTR
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Invert property was not implemented and is now redundant with the flag
pwm-cell which is more flexible in case you want some IO to be inverted
and some not
Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
# Conflicts:
# doc/releases/migration-guide-4.3.rst
This commit moves common DTS entries into common file
dts/arm/nxp/nxp_rt7xx_common.dtsi.
This way there is not duplication between cpu0 and cpu1.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
