Commit graph

8801 commits

Author SHA1 Message Date
Jamel Arbi
70add85f9f drivers: openthread: nxp: Add a HDLC RCP communication
Add a HDLC RCP communication with its hdlc_api interface APIs
and a NXP driver.

Signed-off-by: Jamel Arbi <jamel.arbi@nxp.com>
2024-11-27 10:37:21 -05:00
Yang Jialong
5a3f0b9506 arch: riscv64: smp: get msip base address from dts
In most implements, the msip base address is 0x2000000. But the address
is not fixed in all boards.

Signed-off-by: Yang Jialong <yangjialong@vcore.com>
2024-11-27 06:58:57 -05:00
Manuel Argüelles
c11d4cc3b7 dts: nxp: s32: fix edma compat
Convert the eDMA compat to prop version for NXP S32Z2 SoC
that was missed in commit b070da7c33.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-11-27 08:18:06 +01:00
Declan Snyder
1a4085ad0f dts: bindings: Unblock base label property
Since the label property from base.yaml is no longer deprecated, no need
to require to explicitly block it.

The only affected bindings seem to be these test bindings.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-26 15:44:24 -05:00
Declan Snyder
8e87d55473 dts: bindings: base: Undeprecate label
Label property is described in DT spec and does not need to be
deprecated in base.yaml anymore. It was originally deprecated to
discourage what was previously the most common use case of labels in
zephyr which was the old device_get_binding, which was rightfully
removed. However, labels do have a purpose as described in DT spec of
providing a human readable string to software to describe the device,
which there is some use for.

The description of a label should be given in the device binding, as
stated in DT spec.

Label properties should be of type string.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-26 15:44:24 -05:00
Dat Nguyen Duy
56cd16efbd dts: nxp: s32ze: add devicetree node for code RAM
Add devicetree node for code RAM, code RAM can be accessed
over AIXM bus or AXIF bus. Code access via AXIF interface
provides the best optimal performance

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2024-11-26 15:43:45 -05:00
Adam Kondraciuk
e786c1f849 dts: arm: nordic: Add power states for nRF54H20
Add `idle` and `s2ram` power states for nRF54H20 cpuapp and cpurad.
Also the substate `idle_cache_disable` added.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2024-11-26 14:46:55 +00:00
Karsten Koenig
a4fcd5e9e0 dts: bindings: arm: nordic: tddconf: Add etrbuffer
Introduce etrbuffer in the tddconf bindings to support flexible
placement in the memory map.

Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
2024-11-26 14:45:22 +00:00
ee8990e2e0 drivers: add the gpio driver for wch ch32v003
This commit adds the gpio driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
ef475cbf71 drivers: add the pfic interrupt controller
This commit adds the pfic interrupt controller driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
01a9061d67 drivers: add the ch32v00x usart driver
This commit adds the usart driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
7e810abc05 drivers: add the ch32v00x systick driver
This commit adds the systick driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
c1c0413eed drivers: add the ch32v00x clock controller
This commit adds the clock driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
6d3348bd83 drivers: add ch32v00x pinctrl support
This commit adds the pinctrl driver for WCH CH32V003.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
ab3fb336c4 dts: add the ch32v003 dtsi
This commit adds the dtsi and bindings for the WCH CH32V003 which is a
32-bit general-purpose RISC-V MCU.

Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
2024-11-26 14:41:46 +00:00
Alvis Sun
9976f8a8a9 dts: i3c: npcx: add target mode property and port configuration
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-11-25 17:43:41 +01:00
Ali Hozhabri
9e26341a61 dts: arm: st: wb0: Add BLE feature to STM32WB0x at SOC level
Add BLE feature to STM32WB0x series at SOC level.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2024-11-25 14:42:54 +01:00
Ali Hozhabri
5c753c0fbf dts: bindings: bluetooth: Add yaml file required by STM32WB0x HCI driver
Add a yaml file required by STM32WB0x bluetooth HCI driver.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2024-11-25 14:42:54 +01:00
Marek Matej
2dc2cdea75 dts: espressif: Add flash size options to partition tables
Update the partition table list with 16MB and 32MB options.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-11-25 14:41:33 +01:00
Jeppe Odgaard
57626655df dts: bindings: adc: ad559x: add double range option
Add boolean option to use 2 x voltage reference as upper ADC input range.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-11-25 12:17:00 +01:00
Jeppe Odgaard
d34f56c175 dts: bindings: dac: ad559x: add double range option
Add boolean option to use 2 x voltage reference as upper DAC output range.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2024-11-25 12:17:00 +01:00
TOKITA Hiroshi
0cbfd2a75e drivers: i2s: Add dummy driver for vnd,i2s
Add dummy driver for "vnd,i2s" to use in build_all tests.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-25 12:16:53 +01:00
Khoa Nguyen
b1daa13109 dts: arm: renesas: Add AGT counter support for RA6, RA4, RA2
- Add dts node to support AGT counter for:
ra6-cm4, ra6-cm33 (eccept r7fa6e2bx),
ra4-cm4, ra4-cm33 (eccept r7fa4e2b93cfm),
ra2xx.

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-11-25 10:07:37 +01:00
Tri Nguyen
2e2cf835ed dts: arm: renesas: Add SPI support for RA6, RA4, RA2
Add device node support SPI driver for ra6-cm4, ra6-cm33,
ra4-cm4, ra4-cm33, ra2xx MCU

Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-11-25 01:02:35 +01:00
Khoa Nguyen
c312b322ad drivers: spi: Add support SPI driver for Renesas RA6, RA4, RA2
- Add SPI driver support for RA
- RA2A1 not support slave select keeping level so disable it
in Kconfig

Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-11-25 01:02:35 +01:00
Daniel DeGrasse
c565c2c6f6 drivers: mipi-dbi: use string for mipi-mode property
Use a string for the mipi-mode property over an integer value, as this
significantly improves the readability of the MIPI DBI device binding.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-23 02:01:47 +01:00
Daniel DeGrasse
c0e5769a52 drivers: mipi_dbi: mipi_dbi_nxp_lcdic: allow config of timer bases
The NXP LCDIC peripheral contains two internal timers, with configurable
periods. These times are used to determine delays within the peripheral,
such as the reset and tearing enable signal delays. Allow these periods
to be set within the devicetree for the peripheral.

Raise the period where required for display drivers that need a value
other than the reset setting

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-22 22:47:36 +00:00
Florian Weber
7adeac1b12 drivers: i2c: tca9544a
Extend tca954x (tca9546a, tca9548a) driver to support tca9544a i2c MUX.
(different bitmask and flag for enable bit in register)

Signed-off-by: Florian Weber <Florian.Weber@live.de>
2024-11-22 22:47:17 +00:00
Daniel DeGrasse
a36c7ddb36 drivers: pinctrl: rename nxp,kinetis-pinctrl to nxp,port-pinctrl
The NXP PORT pinmuxing peripheral is reused across the MCX, S32, and
Kinetis lines. Rename the compatible from the family-specific
nxp,kinetis-pinctrl to a more generic nxp,port-pinctrl to reflect the
actual name for the IP block used within reference manuals.

Update the NXP HAL revision to include a change to use the new Kconfig
name for the PORT pinctrl driver

Update the MAINTAINERS.yml path, as there are no longer any NXP drivers
matching the string "drivers/*/*kinetis*

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-22 13:01:02 -06:00
Marek Matej
78c1def4db boards: esp32xx: Use common partition tables
* Replace copies of fixed-partitions nodes in related boards by
referencing the apropriate partition table from the available list.
* For better reference the `partitions_*.dtsi` file has boot offset,
purpose and the flash size encoded in the file name. Default flash size
is considered to be 4MB.
* Added the flash size node for the boards which are not based on the
module.
* Removed flash size registry from the esp32.*common.dtsi

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-11-22 17:45:24 +01:00
Francois Ramu
4864481499 dts: arm: st: Fix memory mapping and size for STM32L4plus
Split and fix the total SRAM size for STM32L4Px/L4Qx/L4Rx/L4Sx
device. Those MCUs with up to 640 Kbytes SRAM:
This is 640KB for the STM32L4Rxxx and STM32L4Sxxx devices :
• 192 Kbytes SRAM1 + 64 Kbytes SRAM2 + 384 Kbytes SRAM3
This is 320KB for the STM32L4P5xx and STM32L4Q5xx devices :
• 128 Kbytes SRAM1 + 64 Kbytes SRAM2 + 128 Kbytes SRAM3

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-11-22 17:42:25 +01:00
Francois Ramu
2eb875618b dts: arm: st: Fix memory mapping and size for STM32L47x/8x/9x/ax
Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax
device. Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax
The sram0 node at address 0x20000000 and sram1 at address 0x10000000

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-11-22 17:42:25 +01:00
Lucien Zhao
18a2a63a25 dts: arm: nxp: rt118x: add flexpwm instances
add 4 flexpwm instances
update clock driver to adapt flexpwm clock structure

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-22 08:26:32 -05:00
Benedikt Schmidt
b4893c46ce drivers: fpga: use defaults in iCE40 binding
Replace the DT_INST_PROP_OR statements with defaults
in the devicetree binding of the iCE40.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-11-22 08:25:44 -05:00
Mahesh Mahadevan
12486ca7e2 dts: mcxn947: Add SCTimer support
Add SCTimer node

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-11-21 19:22:07 -05:00
Carles Cufi
e78832034f soc: nordic: Introduce the nRF54L05 and nRF54L10
These two new ICs are variants of the nRF54L15 with different memory
sizes:

- nRF54L05: 500KB RRAM, 96KB RAM
- nRF54L10: 1022KB RRAM, 192KB RAM
- nRF54L15: 1524KB RRAM, 256KB RAM

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2024-11-21 09:26:38 +01:00
Lucien Zhao
bfc607e38d dts: arm: nxp: rt118x: add flexspi instance support
add flexspi2 and rename flexspi1 to flexspi to adapt
flexspi.c driver under soc/nxp/rt118x folder.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-20 16:00:02 -05:00
Tarang Raval
31eee15fcd dts: arm: rpi_pico: remove #define from dts
Removing direct #define usage in the DTSI file and converting these
definitions to use a dt-bindings header instead.

Relocates the RPI_PICO_DEFAULT_IRQ_PRIORITY definition to a DTSI file and
introduces an override.dtsi file. The override file is used when no other
override file is present, allowing for better flexibility and compliance
with Zephyr’s DTS structure.

Fixes: #79719

Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io>
2024-11-20 15:59:03 -05:00
Jakub Wasilewski
8e881959a4 boards: hifive_unmatched: add support for S7 and U74 targets
Add `hifive_unmatched//s7` (earlier selected by default, using
`hifive_unmatched`) and `hifive_unmatched//u74` targets.

Define work-area for other 4 cores in openocd.cfg

Update twister platform white/black lists, to support new targets

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
Jakub Wasilewski
2423c87d54 boards: hifive_unleashed: add support for E51 and U54 targets
Add `hifive_unleashed//e51` (earlier selected by default, using
`hifive_unleashed`) and `hifive_unleashed//u54` targets.

Define work-area for other 4 cores in openocd.cfg

Update twister platform white/black lists, to support new targets

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
TOKITA Hiroshi
43db55a79b drivers: clock_contrl: Remove renesas,ra-clock-generation-circuit driver
Remove the renesas,ra-clock-generation-circuit driver, which is no longer
needed after migrating to the FSP-based implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
f0219c35da drivers: pinctrl: Remove renesas,ra-pinctrl driver
Remove the renesas,ra-pinctrl driver, which is no longer
needed after migrating to the FSP-based implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
183273ed3f dts: arm: renesas: ra4: Use renesas,ra-cgc-pclkblock driver
Switch the clock controller driver to renesas,ra-cgc-pclkblock
which can be used with FSP.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
397c48a13e dts: arm: renesas: ra4: Use renesas,ra-pinctrl-pfs driver
Switch the pinctrl driver to renesas,ra-pinctrl-pfs which can be
used with FSP.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
Lucien Zhao
e5ee95893c dts: arm: nxp: rt118x: add lptmr instances
Config/Enable lptmr1/2/3 clock
Add 3 lptmr instances for RT118X

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-19 18:36:31 -05:00
DineshKumar Kalva
173cc387a0 soc: amd: acp_6_0: add support for AMD ACP_6_0 soc.
Add a common part for AMD board ACP_6_0_ADSP.

Add support for ACP_6_0_ADSP BOARD,
which represents ACP_6_0 soc.

This has a 1 Xtensa HiFi5 core, with 200-800MHz
1.75 MB HP SRAM / 512 KB IRAM/DRAM,
1 x SP (I2S, PCM), 1 x BT (I2S, PCM), 1 x HS(I2S, PCM), DMIC as
audio interfaces.

Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
2024-11-19 17:53:11 -05:00
Daniel DeGrasse
35f6c4922e dts: bindings: timer: move a few counter bindings to correct location
A few bindings in the timer directory (for kernel timing sources) were
being used for counters (which can have alarms set, and have a distinct
API). Move these bindings to the counters directory.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-19 17:50:04 -05:00
Rafał Kuźnia
61d72936cb dts: nordic: 54l: Add PPIB device tree nodes and bindings
Added a binding description for the PPIB peripheral and added the device
tree nodes of the PPIB instances to the nRF54L15 and nRF54L20.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
2024-11-19 09:53:10 -05:00
Declan Snyder
b070da7c33 dts: nxp,mcux-edma: Convert compats to prop
Convert the numerous revision compatibles to a DT property for the
revision called nxp,version (inspired from a linux DT property from
st called st,version on their DMA).

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-11-19 09:52:57 -05:00
Tri Nguyen
c8938737c0 drivers: i2c: Support for RA6 devices
Add devices node that support I2C for RA6 boards

Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
2024-11-19 09:52:44 -05:00