Commit graph

11,885 commits

Author SHA1 Message Date
Jilay Pandya
83956260f7 drivers: stepper: split stepper api
- split stepper api into stepper and stepper_drv api
- stepper api now comprises only of motion control apis
- stepper_drv api comprises of apis for configuring stepper
  drivers

- add documentation about stepper and stepper_drv api
- move stepper.rst in a dedicated stepper folder
- add information about stepper_drv api and relevant functions
  in stepper documentation.

- drop motion control functions from all the stepper_drv drivers
- create a common a library for controlling stepper motors by
  toggling gpios via h-bridge or step-dir stepper_drivers

- tmc5xxx devices are a combination of motion controller and
  stepper driver devices. tmc5xxx devices need to be modelled as
  mfds in order to address the split in stepper driver subsystem

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-11 05:51:17 -05:00
cyliang tw
5c31987ce2 dts: arm: nuvoton: add PWM nodes for numaker m333x
Update m333x.dtsi to add PWM nodes for PWM driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-11 09:19:29 +02:00
Lucien Zhao
b78d150e47 dts: arm: nxp: rt700_cpu0: add uuid support
SYSCON0 IP can be accessed by CPU0, HiFi4, EZH-V, eDMA0, eDMA1.
So cm33_cpu1 can't be supported this feature.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-11 09:18:20 +02:00
Peter van der Perk
24b3ff233b gpio: mcux_rgpio: Support IRQ output select and access checks for i.MX95 M7
Support for selecting the IRQ output via the `irq-output-select` property
in devicetree. Updates interrupt configuration and ISR logic to use the
selected IRQ index. For i.MX95 M7, ensures pins and IRQs are configured
only when secure access is allowed by checking PCNS and ICNS registers.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-12-10 17:36:57 +00:00
Zhaoxiang Jin
ee2cab94d9 boards: Enable DMA on frdm_mcxc444
Enable DMA on frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Zhaoxiang Jin
a58a750336 drivers: dma: nxp: Add support for NXP 4 channel DMA driver
This commit introduces a new DMA driver for NXP platforms,
specifically supporting the MCXC/kinetis series.

Please access https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true
to download MCXC44x Sub-Family Reference Manual for more details.
DMAMUX can be found in Chapter 20 and DMA in Chapter 21.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Manojkumar Konisetty
6dfae9c9f7 dts: arm: infineon: add CY8C4147 MPN variants
Add devicetree support for CY8C4147 MPN variants including:
- AXI packages (T403-T493)
- AZI packages (T403-T475)
- AZQ packages (T415-T495)
- LQI packages (T403-T473)
- LQQ package (T493)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
69ed4fc87d dts: arm: infineon: add CY8C4146 MPN variants
Add devicetree support for CY8C4146 MPN variants including:
- AXI packages (T403, T413, T453)
- AZI packages (T403-T455)
- AZQ packages (T413, T453)
- LQI packages (T403, T413, T453)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
977f3f10ac dts: arm: infineon: add PSoC4100TP base devicetree
Add base devicetree support for Infineon PSoC4100TP series including:
- Core SoC devicetree (psoc4100tp.dtsi)
- CM0+ core configuration (psoc4100tp.cm0p.dtsi)
- Pin package variants (44-TQFP, 48-QFN, 48-TQFP, 64-TQFP)
- System clocks configuration (system_clocks.dtsi)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Jamie McCrae
949adae4f1 dts: vendor: nordic: Fix invalid nrf54lm20a partition layout
This device indicates 4KiB sector size and has an impossible
partition layout that starts part the way through a sector,
this fixes the issue by having proper partition alignment

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-10 15:45:37 +00:00
Khanh Nguyen
2e7115a45f drivers: mipi_dsi: Add support Renesas RA MIPI DSI for RA8P1
Update the Renesas RA MIPI DSI driver and bindings to align
with RA8P1 SoC support:

- Add SoC-specific PHY PLL multiplier ranges
  - RA8D1: 20–180
  - RA8P1: 40–375
- Correct t_init limit from 15 bits to 19 bits as specified in HUM
- Update devicetree bindings:
  - Clarify `pll-div` as input frequency divisor
  - Add `pll-out-div` property as output frequency divisor

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-12-10 07:25:01 -05:00
Camille BAUD
7830a76b7f dts: bflb: Add flash-controller chosen
Adds flash controller chosen to make CI happy

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-10 07:24:00 -05:00
Yongxu Wang
cc069c0201 drivers: firmware: scmi: Introduce basic system power protocol
Add SCMI System Power Domain Protocol support with:

- System power state set operations
- Standard SCMI power states (shutdown, cold/warm reset, suspend)
- Graceful and forceful power transitions
- Optional NXP vendor-specific power states
- Device tree binding for "arm,scmi-system"

This enables system-wide power management through standardized
SCMI interfaces for reboot and power control operations.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Tim Pambor
7fc2f421a4 dts: arm: st: add reset for lptim
Add resets property to lptim binding and define resets for all lptim
instances in device tree files for STM32 MCUs.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-09 22:38:35 -05:00
Zhaoxiang Jin
d17a9659ea boards: lpcxpresso55s36: enable hscmp for lpc55s36
enable hscmp for lpc55s36

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Zhaoxiang Jin
a62bf4b978 drivers: comparator: Add high-speed comparator support
Add high-speed comparator support

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Mathieu Choplain
f507f0975b dts: arm: st: stm32{f3,f4}: rename CCM memory region for zephyr,dtcm
Rename the CCM memory region for STM32F3 and STM32F4 series such that the
CCM node can be used as a `zephyr,dtcm`.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Qingsong Gou
01a7b9e2d8 dts: arm: sifli: sf32lb52x: add atim node
add atim timer node for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Qingsong Gou
8d331b7b08 dts: bingdings: pwm: add sifli,sf32lb-atim-pwm
add sifli,sf32lb-atim-pwm bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Qingsong Gou
ae25d71a63 dts: bingdings: timer: add sifli,sf32lb-atim
add sifli,sf32lb-atim bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Tony Han
dc3a719917 dts: arm: microchip: sama7d6: reorganize and add dtsi files for SiPs
Add dtsi files for SiPs and put all the dtsi files for sama7d6 to
"dts/arm/microchip/sam/sama7/sama7d6".
Update the path of dtsi in the board dts file accordingly.

URL for SiP (System-in-Package):
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7D6-Series-SiP-Data-Sheet-DS60001853.pdf

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-09 09:51:59 -05:00
Tony Han
7ebf2b3375 dts: arm: microchip: sama7g5: reorganize and add dtsi files for SiPs
Add dtsi files for SiPs and put all the dtsi files for sama7g5 to
"dts/arm/microchip/sam/sama7/sama7g5".
Update the path of dtsi in the board dts file accordingly.

URL for SiP (System-in-Package):
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-SIP-Series-Data-Sheet-DS50003577.pdf

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-09 09:51:59 -05:00
cyliang tw
452e001932 dts: arm: nuvoton: add adc node of numaker m333x
Update m333x.dtsi, to add adc node for adc driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-09 09:50:26 -05:00
Alain Volmat
366f337743 dts: bindings: display: clarify lcd-controller pixel-format
Clarify the pixel-format property of a lcd-controller in order to
indicate that this is the pixel-format of data generated by the
lcd-controller, not only for a panel attached to this controller
but also for another device such as interface converter which
would be receiving the data from the lcd-controller.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-09 09:50:07 -05:00
Peter Wang
a249d79afe boards: frdm_mcxa577: add frdm_mcxa577 board
1. add soc mcxa577
2. add board frdm_mcxa577

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-12-09 11:12:03 +01:00
Phuc Pham
0d3d86ae52 dts: renesas: rzv: Add new memory nodes for RZ/V2H core CR8
Add itcm, dtcm and sram3 region for RZ/V2H core CR8

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-09 09:27:12 +01:00
Pieter De Gendt
4208bd7fcc tests: lib: devicetree: api: Add test cases for DT_CHILD_BY_UNIT_ADDR_INT
Introduce test cases to the devicetree API test suite for
DT_CHILD_BY_UNIT_ADDR_INT and DT_INST_CHILD_BY_UNIT_ADDR_INT.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 13:09:24 -05:00
Zhaoxiang Jin
999e3ab204 dts: nxp_mcxn23x: Add power-states for MCXN23x devices
1. Add power-states for MCXN23x devices
2. Add power management related device nodes to MCXN23x,
including spc, cmc vbat, and wuu.
3. Add 'zephyr,cortex-m-idle-timer' node in frdm_mcxn236.dts

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Zhaoxiang Jin
6cfd51e35b dts: nxp,spc: Add wakeup-delay property for nxp spc
When a different VDD_CORE level is configured in low
power modes (LP_CFG register) compared to active modes
(ACTIVE_CFG register), the LPWKUP_DELAY register must
be configured to a minimum value.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Felipe Neves
035156ea50 sensors: as5048: add initial support for AS5048 angle sensor
Which is a contactless angle sensor that communicates over
SPI.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2025-12-08 11:39:37 -05:00
Arunprasath P
2cedc2d8cf dts: arm: microchip: add DMA node for PIC32CX-SG family devices
Add DMA controller node to enable DMA G1 driver
support on PIC32CX-SG devices.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Farsin Nasar V A
61714f9f4b dts: arm: microchip: samd5xe5x: Add HWINFO node and binding
- Added hwinfo node in the samd5xe5x.dtsi file.
- Added device tree binding file for Microchip HWINFO G1.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-08 09:37:31 -05:00
Gerson Fernando Budke
60518617d8 dts: arm: microchip: samd5xe5x: Fix rstc node
The hwinfo driver should build inconditionally. It checks if the rstc
node is present and when CONFIG_HWINFO=y is selected by the user the
rstc information will be available. The fallback mechanism will provide
a weak implementation for all APIs that are not available.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-12-08 09:37:31 -05:00
Ruoshan Shi
9f5310960e drivers: display: add waveshare dsi2dpi display bridge support
Replace the waveshare_dsi_lcd panel with the waveshare_dsi2dpi
display bridge.

Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
2025-12-08 06:14:31 -05:00
Mario Paja
caf11a5ece dts: st: h5: set sai default clock configuration
This change sets SAI clock to its default configuration

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-08 06:13:46 -05:00
Chun-Chieh Li
6fb261c655 drivers: i2c: support nuvoton m333x series
Add support for Nuvoton M3331 series SoC

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-06 15:50:35 -05:00
Michael Smorto
7ac0dc47bc drivers: video: Add OV7675 changes to OV767x
Adds support for the ov7675 camers.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Scott Worley
cd6d7c9515 drivers: gpio: microchip: mec: One common driver for all MEC parts
Microchip MEC parts have a similar GPIO peripheral block. We
create a unified driver for all parts. NOTE: MEC GPIO interrupt
detection sets active status when changed from interrupt detect
disabled to any enabled mode. Driver ISR and interrupt configuration
implementation includes work-arounds for this issue.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-06 11:38:34 -05:00
Hake Huang
3c87d0862b dts: arm: nxp: nxp_ke1xz.dtsi: tsi0 & tsi1 nodes added
TSI (Touch Sensing IP) is now supported by DT
for the Kinetis KE1x family
dts: nxp_ke1xz, nxp_ke17z and nxp_ke17z512.dtsi
Tested on freedom boards

Signed-off-by: Michael Galda <michael.galda@nxp.com>
Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-06 07:12:52 -05:00
Yves Wang
2ea83f42c9 boards: nxp: frdm_mcxc444: Enable watchdog cop
Enable cop for zephyr watchdog.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-06 07:12:45 -05:00
Kate Wang
1527cd506a drivers: display: display_co5300: Update panel driver
1. Fix wrong backlight pin in driver overlay
2. Remove the power-on pin configuration in code and binding, and
add mipi display panel regulator in panel overlay instead. Set
regulator-boot-on' to true means the power-on pin will be enabled
uring system boot.
3. Remove 'last_known_framebuffer' from panel data structure. It is
not used anywhere
4. Fix bug in 'co5300_set_pixel_format' function.
5. Fix the issue that the panel does not support start coordinates
   and the width/height of the updated area being odd value.
   Solution: In panel driver, maintain a full screen-sized buffer,
   its address and pitch alignment is configurable in device tree
   and shall be compliant with the display controller's requirements.
   It can be placed in RAM or if the RAM space is not enough it can
   also be placed in other memory resion. When there is a frame
   update request, the updated area will be first filled to the
   buffer, if the area's size or coordinate is odd, adjust the value
   so the real updated area covers the requested updated area, then
   use this buffer to send pixel to panel, this can ensure the
   updated area's size and coordinate are always even.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Patryk Koscik
4e21fc26fa dts: nxp: mcxn94x: Add SoC compatible
Add SoC-level compatible string to the nxp_mcxn94x_common DT file.

Signed-off-by: Patryk Koscik <pkoscik@antmicro.com>
2025-12-06 07:11:33 -05:00
Camille BAUD
8cd91f3b76 dts: bindings: vendor-prefixes: Add XMC
Add prefix for XMC Wuhan Xinxin Semiconductor Manufacturing Co

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Guillaume Gautier
21950ef873 dts: arm: st: add st,stm32-data-width property for all spi instances
Addd st,stm32-data-width property for all STM32 SPI instances.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
e20076c2c7 dts: bindings: spi: add st,stm32-data-width property
Adds a new property for STM32 SPI bindings to indicate which data widths
are supported by each SPI instance.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Sai Santhosh Malae
76b1a07c54 drivers: gpio: siwx91x: Implement device runtime PM for GPIO ports
The existing device runtime PM model requires applications to call
pm_device_runtime_get()/put() on the GPIO controller device directly,
which is not ideal when GPIO ports are exposed as child nodes.

This update enables runtime PM at the GPIO port (child node) level,
allowing applications to manage power through the port devices instead
of the top-level controller.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:53:49 -05:00
Martin Hoff
62e97eb5a7 dts: arm: silabs: add missing clock on acmp node in xg21 dtsi
Without this clock definition, you will get compilation error
when using acmp device on board that use xg21 SoC.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-05 14:53:35 -05:00
Fin Maaß
8f8071a546 drivers: ethernet: phy: split generic phy
moves the fixed link functionality of the
generic ethernet phy into its own driver.
This makes both drivers more readable and
efficient.

Also makes it easier to use the normal generic
phy as a base for a vendor specific driver, as
the fixed link functionality is not needed on
them.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Fin Maaß
58b48b0423 dts: bindings: ethernet: phy: split and group common
split and group common dts bindings

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Bjarki Arge Andreasen
cc68eaef2b dts: nordic: nrf54h20: disable lfclk by default
The lfclk was left enabled by mistake, it has status disabled
followed by status okay a few lines down. Remove the spurious
status = "okay";

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-05 10:55:53 +02:00