drivers: fpga: use defaults in iCE40 binding
Replace the DT_INST_PROP_OR statements with defaults in the devicetree binding of the iCE40. Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
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2 changed files with 13 additions and 16 deletions
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@ -549,17 +549,13 @@ static int fpga_ice40_init(const struct device *dev)
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#define FPGA_ICE40_BUS_FREQ(inst) DT_INST_PROP(inst, spi_max_frequency)
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#define FPGA_ICE40_CONFIG_DELAY_US(inst) \
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DT_INST_PROP_OR(inst, config_delay_us, FPGA_ICE40_CONFIG_DELAY_US_MIN)
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#define FPGA_ICE40_CONFIG_DELAY_US(inst) DT_INST_PROP(inst, config_delay_us)
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#define FPGA_ICE40_CRESET_DELAY_US(inst) \
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DT_INST_PROP_OR(inst, creset_delay_us, FPGA_ICE40_CRESET_DELAY_US_MIN)
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#define FPGA_ICE40_CRESET_DELAY_US(inst) DT_INST_PROP(inst, creset_delay_us)
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#define FPGA_ICE40_LEADING_CLOCKS(inst) \
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DT_INST_PROP_OR(inst, leading_clocks, FPGA_ICE40_LEADING_CLOCKS_MIN)
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#define FPGA_ICE40_LEADING_CLOCKS(inst) DT_INST_PROP(inst, leading_clocks)
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#define FPGA_ICE40_TRAILING_CLOCKS(inst) \
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DT_INST_PROP_OR(inst, trailing_clocks, FPGA_ICE40_TRAILING_CLOCKS_MIN)
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#define FPGA_ICE40_TRAILING_CLOCKS(inst) DT_INST_PROP(inst, trailing_clocks)
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#define FPGA_ICE40_MHZ_DELAY_COUNT(inst) DT_INST_PROP_OR(inst, mhz_delay_count, 0)
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@ -69,25 +69,26 @@ properties:
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mhz-delay-count = <0>;
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creset-delay-us:
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type: int
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default: 1
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description: |
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Delay (in microseconds) between asserting CRESET_B and releasing CRESET_B.
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Example usage / default:
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creset-delay-us = <1>;
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The datasheet specifies a minimum of 200ns, therefore the default is set
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to 1us.
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config-delay-us:
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type: int
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default: 1200
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description: |
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Delay (in microseconds) after releasing CRESET_B to clear internal configuration memory.
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Example usage / default:
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config-delay-us = <1200>;
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The datasheet specifies a minimum of 1200us, which is the default.
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leading-clocks:
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type: int
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default: 8
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description: |
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Prior to sending the bitstream, issue this number of leading clocks with SPI_CS pulled high.
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Example usage / default:
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leading-clocks = <8>;
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The datasheet specifies 8 dummy cycles, which is the default.
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trailing-clocks:
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type: int
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default: 49
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description: |
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After sending the bitstream, issue this number of trailing clocks with SPI_CS pulled high.
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Example usage / default:
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trailing-clocks = <49>;
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The datasheet specifies 49 dummy cycles, which is the default.
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