Add initial support for the AXP2101 power management IC from X-powers.
Remark: only DC/DC1 and ALDO have been tested on real hardware.
Co-authored-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Co-authored-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
This is a follow-up to commit cdf45cb234077522b5cef2da084869af43d42dc1.
Adjust the DTS node for the nRF EXMIF peripheral so that it is possible
to handle the peripheral with the generic MSPI driver for DW SSI based
controllers and use all its data lines in communication.
Also adjust the related board files accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a flash driver intended to handle various flash devices
connected over MSPI bus as long as they support JEDEC SFDP.
This is an initial commit providing only basic operations
in Octal I/O mode with some hard-coded values for Macronix
MX25Ux series chips.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a generic driver for MSPI controllers based on the DesignWare
SSI core. With small vendor-specific adaptations covering integration
details, it should be possible to use the driver for various devices.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The gpio header is missing, which will lead to failures
when declaring GPIO down the line in board overlays.
Signed-off-by: Eve Redero <eve.redero@gmail.com>
Remove redundant descriptions in MBOX bindings, such
as "This is a representation of", "... node" and "... binding".
Signed-off-by: James Roy <rruuaanng@outlook.com>
Move the die-temp0 from chosen to the more appropriate aliases section.
Fixes the broken die temp polling sample for the i.MX RT10xx boards.
Signed-off-by: Simone Orru <simone.orru@secomind.com>
Remove redundant descriptions in cache bindings, such
as "This is a representation of" and "... node".
Signed-off-by: James Roy <rruuaanng@outlook.com>
Fixing multiple things related to psram usage:
- fix conflicting psram0 dts node for all ESP32 SiP and SoC.
- fix dcache and icache area used in psram mapping.
- fix smh spiram heap allocations.
- add `espressif,esp32-psram` compatible to set psram0 size in dts.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Streamline the description field for CPU bindings by removing
inappropriate use of terminology such as "This is a representation
of...", or mentions to "node".
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
37bdc38ec6 failed to take into account commit
f72ef5c237, and added the OTGHSPHYEN bit
back into the OTGHS controller's `clocks` property. This should have no
functional impact (due to how the USB driver is implemented), but ought
to be removed anyways as duplicates information and is confusing.
Clean the DTSI for U595 and revert back OTGHS controller `clocks` such
that it only contain the controller's clock enable bit, as it should.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
A file similar to vendor-prefixes.txt that provides a short description
of the top-level folders contained in dts/bindings
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
There were some driver bindings issues for the davicom dm8806 driver:
- Missing type for reg-switch binding
- Missing required: true for int/reset gpios
- Fix macro for reg-switch
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This commit removes the flexram,bank-spec property from dtsi files.
The property causes flexram to be dynamically configured based on
the configuration in flexram,bank-spec. This is a problem for 2 reasons:
1) The FlexRAM will always be dynamically reconfigured to default
fuse configuration. This is unnecessary if using default fuses.
2) If a user decides to program fuses. The FlexRAM will still be
reconfigured to the default fuse configuration.
Modify description in the binding to show how to use the property at:
dts/bindings/memory-controllers/nxp,flexram.yaml
Added board overlay to mimxrt1170_evk_cm7 magic_addr:
samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/boards
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
During the transition to STM32_CLOCK macro (in 57723cf), the `clocks`
property of peripherals requiring more than one bit to be set were
mistakenly modified. Commit 2c3294b079
partially fixed these errors, but some nodes for the U5 series are still
wrong.
Restore `clocks` on affected devices in corresponding STM32U5 DTSI.
Fixes: 57723cf405
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
- Move config BUILD_OUTPUT_HEX and CLOK_CONTROL from board deconfig
into SoC deconfig
- Add clock-frequency in dts to get config
SYS_CLOCK_HW_CYCLES_PER_SEC from dts
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
Add information on CANFD dllclk upper and lower limits on these SoCs:
- RA8: RA8M1, RA8D1, RA8T1
- RA6: RA6E2
- RA4: RA4E2
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
This commit adds basic support for KSZ8463/KSZ8463F chips to the
dsa_ksz8xxx.c driver.
These chips have limited register compatibility with other members
of the KSZ8XXX family - their registers are 16 bits wide as opposed
to the 8-bit registers supported by the driver for KSZ8794 and
KSZ8863. Following the general logic of the existing code,
the 16-bit registers of KSZ8463 are split into 8-bit halves.
For the KSZ8463F chip, it is assumed that both ports are used
in Fiber mode.
A new configuration option, CONFIG_DSA_KSZ_PORT_ISOLATING, has been
added to isolate traffic between DSA slave ports.
The driver has been tested on a custom board with an STM32F7 SoC.
Signed-off-by: Aleksandr Senin <al@meshium.net>
Set pm device runtime runtime auto flag to ensure saadc instances
are initialized correctly if pm device runtime is used.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
