A recent change added the stop-bits and data-bits to the base
uart-controller binding, meaning it's no longer required to
be added in the Altera specific binding.
This requires no further changes because its only use is in
uart_altera.c where only the index of the enum is used,
which remains the same between the new implementation and
how it was previously implemented in the altera specific binding.
Relevant commit: 0234f12
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
PR https://github.com/zephyrproject-rtos/zephyr/pull/55129 deleted the
"port-sel" property. Delete this property from remaining Microchip SoC
variants and boards.
Test: west build -b mec172xevb_assy6906 samples/drivers/espi/
Signed-off-by: Keith Short <keithshort@google.com>
The nRF9161 is technically a SiP (System-in-Package) that consists of
the nRF9120 SoC and additional components like PMIC, FEM, and XTAL,
so for nrfx/MDK the nRF9120 SoC is to be selected as the build target,
but since the nRF9161 is what a user can actually see on a board, using
only nRF9120 in the Zephyr build infrastructure might be confusing.
That's why in the top level of SoC definitions (for user-configurable
options in Kconfig, for example) the nRF9161 term is used and nRF9120
underneath.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add the header file required for the example to work. Users get the
following error due to unresolved INPUT_BTN_* values otherwise:
parse error: expected number or parenthesized expression
Signed-off-by: Amit Kucheria <amitk@kernel.org>
Signed-off-by: Amit Kucheria <amit@mbedrock.com>
These bindings are removed because they are now handled in the
included base uart-controller.yml.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add bindings for LTC1665/LTC1660, which is a 8/10-bit
Digital-to-Analog Converter with eight individual channels.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
This addition should help users to better understand potential issues
with domain clock configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In ACE 2.0 platform (LNL) dmic got two new shim register ranges.
DMIC driver need to program them to configure the interface.
This patch adds new shims to device tree.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This adds USB-HS support for LPC55S16, much in the same way that
LPC55S28 support was added previously.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
The temperature sensor of the STM32F0x0 is similar to C0 (with one value
for calibration) but uses a negative coefficient, so we add it to the
bindings, just like in st,stm32-temp.yaml
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a devicetree binding for the CAN-FD capable variant of the NXP FlexCAN
controller. Add example devicetree snippets to both NXP FlexCAN and NXP
FlexCAN-FD binding documentation to limit confusion.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the nxp,kinetis-flexcan devicetree compatible to nxp,flexcan as it
is not specific to the NXP Kinetis series.
This is preparation for adding a nxp,flexcan-fd binding.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add new compatible to separate production calibrated sensors
with single and dual calibration temperatures. Also update
stm32_temp driver to support single calibration sensors.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Adds support for a devicetree property that controls the ClockDiv
value provided to the SDIO during init.
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
No fmc node for the stm32u5 is implemented. This commit
adds a stm32-fmc compatible node to the device tree.
Signed-off-by: Christian Spinnler <christian.spinnler@fau.de>
Without adding a RAM entry for the USB RAM in the MPU,
USB RAM is mapped in the Peripheral Memory region
where unaligned memory accesses will cause a fault error.
Unaligned access errors were uncovered when we switch
to a different Zephyr C library where the memcpy function
implementation has unaligned accesses to the USB RAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add the FDCAN peripheral to the stm32H5 serie.
Two CAN1 & 2 instances for the stm32H56x/H57x devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Arm fvp_baser_aemv8r and fvp_base_revc_2xaemv8a boards are using
SMSC91C111 as their ethernet adapters.
Portions of the codes are based on FreeBSD code from its
'src/sys/dev/smc/if_smc.c' and 'src/sys/dev/smc/if_smcreg.h'.
This driver has two parts, one is the ethernet controller driver, which
is MAC layer driver. The other is the MDIO driver, which is the PHY
layer driver. Both of them are in the same source file due to that they
need to share the same reading and writing register functions and
the smsc object.
The mdio driver is needed by the existing 'phy_mii' driver, which is
a driver for the generic MII-compliant PHY.
This driver was developed under the fvp_base_revc_2xaemv8a target and
has been tested on the fvp_baser_aemv8r target.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
move DT_DRV_COMPAT to bmm150.h. so that can be decide which interface
to use.
define struct bmm150_bus_io interface for bmm150_i2c.c and bmm150_spi.c
in bmm150.h.
redefined bus operation interface in bmm150.c, this allow the driver
to decide which interface to use during construction.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
Convert the SDL driver to use the input subsystem. This is specifically
meant to emulate touchscreen drivers, so it's setup to send triplet of
x, y, touch for touch-on events and just touch off on touch off events.
Renamed the driver to input-sdl-touch since now we can also develop an
sdl driver for simulating key events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds support for ANY_MOTION and DATA_READY interrupts for
the BMI270. To implement this, a different config blob than the
"max_fifo" blob has to be used.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
This adds the i2c driver for the Renesas SmartBond(tm) MCU family.
It supports blocking transfers and callback transfers.
Currently only supports controller mode.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Under disk bindings. NVMe is a purely PCIe based technology, thus the
relevant includes.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removed extra #includes at top of files. Missed closing } of
mec172xnlj.dtsi. Lower-cased 'reg' field of PWMs.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
This adds a driver for the DS2482-800 1-wire multi channel bus driver.
The driver uses a split architecture in order to share a common lock
among all configured channels of a single IC.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
