- Adds correct SRAM region sizes for each sub-variant.
- For consistency: Drops the separate sram1 region some variants
used since these are contiguous regions.
Signed-off-by: Egill Sigurdur <egill@egill.xyz>
The package letter ("i" or "v") only affects pinout, while all "k" variants
share the same memory configuration.
Signed-off-by: Egill Sigurdur <egill@egill.xyz>
Disable the I2C1 node in the CH32V003 SoC devicetree.
Boards which use I2C1 should enable it explicitly in their board devicetree
or overlay. This keeps the SoC dtsi from enabling unused devices by
default.
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Add support for scanning PCIe buses beyond bus 0 using a devicetree
property. Some platforms have PCIe devices on
non-zero buses that are not reachable through bridge
enumeration from bus 0.
Signed-off-by: Bindu S <bindu.s@intel.com>
Add devicetree node for the MXCRYPTOLITE crypto engine and
TRNG to the 20829 SoC DTS includes. This node references the
new infineon,mxcrptolite, infineon,mxcryptolite-crypto, and
infineon,mxcryptolite-trng bindings.
Assisted-by: Claude:claude-opus-4.8
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
Add devicetree node for the MXCRYPTOLITE crypto engine and
TRNG to the PSC3 SoC DTS includes. This node references the
new infineon,mxcrptolite, infineon,mxcryptolite-crypto, and
infineon,mxcryptolite-trng bindings.
Assisted-by: Claude:claude-opus-4.8
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
- infineon,mxcryptolite: mfd parent for crypto and trng nodes
- infineon,mxcryptolite-crypto: main crypto engine with AES support
- infineon,mxcryptolite-trng: true random number generator
These bindings describe the register base address and interrupt
configuration for the MXCRYPTOLITE IP block found in several
Infineon SoCs, including PSC3M5 and CYW20829
Assisted-by: Claude:claude-opus-4.8
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
Add default partitions dts files for rp2350 based socs similar to how
espressif includes the partition dtsi for specific boards.
Update rp2350 based board files to use the new paritions for the
zephyr,code-partition chosen node. This is the first step to update the
raspi pico snippets to include flash size variants.
Signed-off-by: Andrew Fantino <fantino@qti.qualcomm.com>
We standardize the eSPI V2 driver device tree properties for MEC172x,
MEC174x, MEC175x, and MEC165xB.
Signed-off-by: scott worley <scott.worley@microchip.com>
Microchip XEC V2 eSPI hardware changes Host address BARs. Host address
bits [47:32] are now common to all peripheral channel device memory
BARs and the SRAM BARs. Two registers contain these upper address bits.
We add optional device tree properties to specify these values. If not
present bits [47:32] of host address in all BARs are 0.
Signed-off-by: scott worley <scott.worley@microchip.com>
Transition the driver over to one-shot operation by default unless
`CONFIG_LPS22HH_TRIGGER` is enabled to actually make use of periodic
measurements. By using one-shot mode and polling on the status register,
this fixes the following code flow, which is currently broken due to
no periodic samples being available immediately after resuming.
```
pm_device_runtime_get(dev);
sensor_sample_fetch(dev);
sensor_channel_get(dev, ...);
pm_device_runtime_put(dev);
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add SD host controller nodes and also assign them interrupts and power
domains.
Additionally also setup eMMC and SD card as disks, and set up a node for
the SDIO instance.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Add SD host controller nodes t and also assign them interrupts.
Additionally also setup eMMC and SD card as disks, and set up a node for
the SDIO instance.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Add SD host controller nodes and also assign them interrupts and power
domains. Additionally also setup eMMC and SD card as disks.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Add the driver for TI's interrupt based AM654 SD Host Controller that can
be used with both eMMC and SD cards.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
There are three DMA cells but the binding sets the `dma-cells` property
to `const: 4`. Fix the value in the binding and update DTSI accordingly
so that `dma-cells` matches the number of DMA cells.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/xtensa -type f -exec \
./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/x86 -type f -exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/sparc -type f -exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/riscv/ -type f \
-exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/posix -type f -exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/arm64 -type f -exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use #include <> instead of #include "" to include a header file which path
is not relative to the directory path of the file emitting the #include
directive.
This change was made running scripts/check_quoted_includes.py script
proposed in https://github.com/zephyrproject-rtos/zephyr/pull/112135
with the Linux shell command below and manually selecting the applicable
changes:
$ find dts/arc/ -type f -exec ./scripts/check_quoted_includes.py -w {} \;
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Describe the Time Stamp Timer (TSTMR) instances for the i.MX93, i.MX94x,
i.MX95/952, i.MX8ULP, RT118x, and MCXW7x SoCs. The nodes are left
disabled by default and run off the fixed 1 MHz TSTMR clock.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Add a counter driver for the NXP Time Stamp Timer (TSTMR), a 56-bit
free-running, read-only up-counter. The driver exposes it through the
Zephyr counter API (get_value/get_value_64 and get_freq); start/stop,
alarm, and top-value operations are unsupported as the hardware is
free-running with no compare or interrupt capability.
The frequency is SoC-specific and taken from the clock-frequency
devicetree property. A coherent 56-bit read is obtained by sampling the
low/high registers twice under an IRQ lock and handling low-word
rollover.
Add the binding, Kconfig, and build glue.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Add ameba series counter binding and nodes.
Peripherals are sorted by address, with memory kept at the top.
Signed-off-by: minyuan xue <minyuan_xue@realsil.com.cn>
Add the device tree node and the binding file for microchip Ethernet and
MDIO G1 Peripheral.
Signed-off-by: Himanshu Seth <himanshu.seth@microchip.com>
Add a new IPC service backend based on the RPMsg-Lite library.
The backend implements the ipc_service_backend ops (open, close,
register/deregister endpoint, send, send_nocopy, get/drop TX buffer,
hold/release RX buffer) on top of the RPMsg-Lite virtio transport.
A new DT binding (nxp,ipc-rpmsg-lite) is introduced to describe
each RPMsg-Lite link instance: shared memory region, role (host/remote),
link-id, MBOX channels, and per-instance buffer/priority tunables.
Multiple links share a single MBOX channel pair via the
notification-parent property; platform_notify() dispatches the
encoded vector_id to the correct link.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
Remove #address-cells and #size-cells properties from radio node in
STM32WBAxx SOC series DTSI file. These are not needed as reported by
the build warning trace message shown below (that is now addressed):
.../build/zephyr/zephyr.dts:795.25-816.5:
Warning (avoid_unnecessary_addr_size):
/soc/radio@48020000: unnecessary #address-cells/#size-cells
without "ranges", "dma-ranges" or child "reg" property
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add interrupt-driven API support to the esp32 lp_uart driver and make
RTS/CTS hardware flow control optional, enabled only when the device
tree sets hw-flow-control. Add a loopback property that ties TX to RX
inside the peripheral for self-test without external wiring.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Extend the esp32 lp_uart driver to the esp32c5 and esp32p4. On the
esp32p4 the LP UART signals are routed through the LP GPIO matrix and
the controller is clocked from the precise XTAL_D2 source instead of
the uncalibrated RC_FAST, so the baud-rate framing is reliable.
Relax the fixed-pin bindings, describe the lp_uart node pins on the
c5/c6/p4 HP and LP cores, and extend the echo_ulp sample. Update
hal_espressif for the esp32p4 LP GPIO matrix and clock-tree helpers.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
align the devicetree structure
with the recently added more generic
Synopsys ethernet driver, as the esp32
also uses the same IP from Synopsys, so we
can add support for the esp32 in that driver
easier.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
STM32MP133 and upper versions support a second Ethernet
controller IP.
Bring a new STM32MP133 DTSI to make the version
differentiator and add the second port in DTSI.
Signed-off-by: Erwan SZYMANSKI <erwan.szymanski@st.com>
Add DAC0 (LPDAC) support for frdm_mcxa266, frdm_mcxa346, and
frdm_mcxa366 boards.
DTS: add dac0 node to nxp_mcxaxx6_common.dtsi at address
0x400b4000, compatible "nxp,lpdac", IRQ 67.
Board: add pinmux_dac0 (DAC0_OUT_P2_2) to each board pinctrl
dtsi; enable dac0 with pinctrl in board_common.dtsi; set up DAC0
clock in board.c (SPC power-on, divider, attach, gate); add "dac"
to each board yaml supported-features list.
Sample/test: add board overlays for samples/drivers/dac and
tests/drivers/dac/dac_api. Because DAC0 output pin P2_2 conflicts
with LPUART2 TX, the overlays disable lpuart2 and redirect the
console to lpuart3. Add fixture: dac_fixture to testcase.yaml so
CI is aware of the special UART setup. Update the DAC sample README
with build instructions and the CONFIG_DAC_SAMPLE_RUN requirement.
DAC output is available on connector J1 pin 4 (P2_2).
Co-authored-by: Neil Chen <cheng.chen_1@nxp.com>
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
Use <> operator to include a Zephyr header file instead of "" that
is intended to local header files, not header files relative to
specifically defined search paths.
This change was made running the sed shell command below:
$ sed -i -E 's/#include "zephyr\/([^"]+)\.h"/#include <zephyr\/\1.h>/g' \
`grep -rsl "#include \"zephyr/" dts/`
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add a read-only Zephyr OTP driver for the NXP OTPC eFuse controller
found on MCX N SoCs. Only otp_read is implemented; fuse programming is
not supported. The OTP API is byte addressed while the controller reads
32-bit words; the driver handles unaligned offsets and lengths
internally.
Read verified on real hardware on frdm_mcxn236, frdm_mcxn947, mcxn947 evk,
and mcxn547 evk
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
The native_sim counter driver did not implement the counter capture API,
so the capture path could not be exercised on native_sim / in CI. There
was also no software way to inject a capture edge, unlike gpio_emul which
provides gpio_emul_input_set() for emulating GPIO events.
Implement the capture API in the native_sim counter driver and add a
test-only backend, analogous to gpio_emul:
- counter_capture_emul_input_set()/_get() (+ _dt variants) in the new
include/zephyr/drivers/counter/counter_capture_emul.h drive/read an
emulated capture input level. On a configured, enabled and matching
edge the capture callback is invoked synchronously with the current
counter value, honoring single-shot vs continuous mode.
- Supported edges are declared in devicetree via rising-edge/falling-edge
boolean properties and enforced in capture_configure(), mirroring
GPIO_EMUL_INT_CAPS.
The counter_capture test is reworked so the edge trigger is provided by a
small "trigger source" interface (trigger_src.h) with two CMake-selected
backends: gpio_src.c (GPIO loopback on real hardware) and
counter_capture_emul_src.c (emulated input on native_sim). The test body,
edge/single-shot/continuous coverage and assertions are unchanged. A
native_sim overlay and integration platform are added so the suite runs
on native_sim.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add a test_counter_captures ZTEST that exercises the
DT_COUNTER_CAPTURES_* and DT_INST_COUNTER_CAPTURES_* macros against
a synthetic vnd,counter / vnd,phandle-holder fixture, mirroring the
existing test_pwms coverage.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add devicetree reader macros for counter capture. These include
an index for the channel number and default flags. These are
intended to eventually to be used within drivers for timestamp
capturing.
Signed-off-by: Ryan McClelland <rymcclel@gmail.com>
This commit enables hyperbus support for the MAX32650 SoC by adding the
hpb node to the MAX32650 device tree. Also it adds hyperbus support to
the MAX32650EVKIT board device tree and enables memc/ram test for this
board.
Signed-off-by: Sean Harte <sean.harte@analog.com>
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
This commit enables USB support for the MAX32650 SoC by adding the usbhs
node to the MAX32650 device tree. Also it adds USB support to the
MAX32650EVKIT board device tree.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
- Adds the clocks/resets properties to the NXP CRC devicetree nodes
so the CRC driver can enable the peripheral clock during
initialization.
- For the MCXL SoC, fixes the reset controller
to nxp,mrcc-reset.
- For frdm_mcxl255, adds missing zephyr,crc chosen entry.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
