Adjust the PIO assemble for the UART RX to wait for the line
to initially be high before starting the wrap loop and wait
for a low start bit.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Energy efficient mode is the feature of the DM8806 described in the
EEE 802.3az Energy Efficient for reducing power consumption. For unknown
reason it seams to not working correctly with all endpoints and sometimes
the network randomly fails when this mode is on. Thus it is now possible to
turn off it in compile time by KConfig option:
PHY_DM8806_ENERGY_EFFICIENT_MODE if in case of network problems
Signed-off-by: Robert Slawinski <robert.slawinski.ext@indurad.com>
Clang run for code formatting and calibrationc control for
repeated calls at channel_setup().
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Driver update to support newer HAL versions.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Make sure to submit a change of option bytes and wait for the end of
the operation. It is done by checking the OPT_BUSY bit.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The RDP level is set with the FLASH_OPTSR_PRG register and read with the
FLASH_OPTSR_CUR register, not FLASH_OPTCR.
Fix that to realy change and read RDP.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
New events from nrfx_clock driver are not utilized for now
by the clock_control, so should be ignored to avoid assertion.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
This allows to configure a GPIO pin as a CS line, in order to perform
spi transfers to a particular device in the bus.
Example usage for using GPIO1.12 with GPIO_ACTIVE_LOW:
`spi cs gpio1 12 0x01`
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Implement the hj_response api for STM32 I3C. This also implements
the PM calls for enabling and disabling runtime PM. For HJ to work
the device must be powered on and be receiving a clock.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Make a pointer to data that is specific to a certain type of LPSPI
driver, instead of having all of it in the struct whether it is used
or not.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add DT property to configure the LPSPI instance to use tristated output
instead of retained output when PCS is negated.
Turn on the config on a couple boards for test coverage.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add missing bluetooth/hci.h and hci_types.h include to fix the build
error and warnings of the infineon h4 ble driver.
The driver is using bt_hci_cmd_create() and bt_hci_cmd_send_sync()
from bluetooth/hci.h, and BT_HCI_OP_RESET from bluetooth/hci_types.h
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Improve the documentation of the IOMUXC GPR binding so that it is
clear what the cells in the specifier space of "pinmux" space mean. And
change the names of the cells to be more appropriate. "offset" instead
of "pin" and "mask" instead of "function" describes more precisely what
the cells in the specifier mean.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Introduce sam4l watchdog configuration. This entry is necessary to
select proper watchdog configuration at board init due to #83429.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add wsen_tids_2521020222501 driver with
the corrected name and compatibility with
the hal update as well as added new features.
Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
Initial commit for a STM32L152 based GPIO expansion chip.
The mfxstm32l152 driver offers GPIO controller fonctions.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This is necessary for the I3C device type check, tested with:
west build -p -b nucleo_h563zi samples/subsys/shell/shell_module
-DCONFIG_I2C=y -DCONFIG_I2C_SHELL=y -DCONFIG_I3C=y
and
west build -p -b nucleo_h563zi samples/subsys/shell/shell_module
-DCONFIG_I2C=y -DCONFIG_I2C_SHELL=y -DCONFIG_I3C=n
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added a length check in the spi write incr routine to handle both
single and multi byte write operations properly.
Signed-off-by: Mayank Narang <narang.may77@gmail.com>
The lis2de12 sensor driver spi interface was calling spi read api.
This leads to a single byte operation on reading acceleration data
which is a multi byte operation. Fix it by adding a call to spi read
incr api instead. Added a length check to handle both single and multi
byte read properly.
Signed-off-by: Mayank Narang <narang.may77@gmail.com>
If DMA-based transaction fails, usually due to a timeout, DMA channels
may need to be explicitly stopped otherwise further calls to transceive
function will immediately return due to DMA constantly being busy.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Hardware chip select is originally handled by the HAL driver. However, a
finer grained control is needed to keep CS asserted between requests and
deassert it after last request is completed. Workaround this problem by
handling hardware chip select in Zephyr driver.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
`NRF70_SYSTEM_WITH_RAW_MODES` is more accurately described as an
additional option on top of `NRF70_SYSTEM_MODE`, not as a unique
choice of `NRF70_OPER_MODES`.
This allows the elimination of multiple `NRF70_SYSTEM_MODE ||
NRF70_SYSTEM_WITH_RAW_MODES` dependencies.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This was present in the form of video_pix_fmt_bpp() inside ST and NXP
drivers, and was returning the number of bytes, which does not allow
support for 10-bits, 4-bits or non-byte aligned video formats.
The helper leverages the VIDEO_PIX_FMT_*_BITS macros.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Changes introduced in 293b9a16ca didn't
verify correct behaviour when running `TIMER1` with `TIMER0` is paused,
and was reporting the wrong tick counter being incremented. Correct this
and extend the testing to verify correct behaviour.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add the possibility to activate the XBARB driver
Update NXP HAL revision to include support for xbarb
Signed-off-by: Mathias Landolt <mathias.landolt@loepfe.com>
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
TI OMAP mailbox is the inter-processor mailbox IP found in TI
K3 devices (AM62X, AM64X, J721E .etc). The mailbox hardware uses
a queued mailbox interrupt mechanism that provides a communication
channel between processors through a set of registers and their
associated interrupt signals by sending and receiving messages.
The interrupt/bank associated with each processor entity is found
through the usr_id property from device tree.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
The `BT_DRV_RX_STACK_SIZE` config is used by HCI drivers to determine a
suitable stack size for their RX thread. These threads handle the HCI
transport and pass HCI messages to the Bluetooth host via `bt_hci_recv()`.
Previously, the default stack size was 256 bytes, but it seems to be too
small currently.
Measuring the peak stack usage of `bt_hci_recv()` in different scenarios
indicates that the function needs over 300 bytes of stack. Thus, an RX
thread stack size of 512 should cover that and leave some margin.
Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
The EUSART peripheral must always be enabled in configure(), as
its enable state gets cleared when the state machine is unretained
in deep sleep. The rest of the config registers are retained,
so they can continue to not be repainted on every configure() if
the context is the same as last time.
Remove unnecessary duplicated enable at the end of configure(),
the SPIInit HAL function already performs enable.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Only lookup for i3c devices if I3C=y, fixes a build error:
zephyr/drivers/i2c/i2c_shell.c:
In function 'device_is_i2c':
zephyr/drivers/i2c/i2c_shell.c:341:43:
error: array type has incomplete element type 'struct i3c_driver_api'
341 | return DEVICE_API_IS(i2c, dev) || DEVICE_API_IS(i3c, dev);
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
