drivers: pinctrl: nrf: add support for nordic,clock-enable
Driver will be capable of retrieving such property from DT and apply it accordingly. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
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b57481ab18
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5e3188605e
3 changed files with 16 additions and 34 deletions
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@ -101,9 +101,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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uint32_t write = NO_WRITE;
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nrf_gpio_pin_dir_t dir;
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nrf_gpio_pin_input_t input;
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#if NRF_GPIO_HAS_CLOCKPIN
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bool clockpin = false;
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#endif
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if (drive_idx < ARRAY_SIZE(drive_modes)) {
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drive = drive_modes[drive_idx];
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@ -122,9 +119,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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write = 1U;
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dir = NRF_GPIO_PIN_DIR_OUTPUT;
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input = NRF_GPIO_PIN_INPUT_DISCONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_UARTE_CLOCKPIN_TXD_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_UART_RX:
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NRF_PSEL_UART(reg, RXD) = psel;
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@ -136,9 +130,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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write = 1U;
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dir = NRF_GPIO_PIN_DIR_OUTPUT;
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input = NRF_GPIO_PIN_INPUT_DISCONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_UARTE_CLOCKPIN_RTS_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_UART_CTS:
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NRF_PSEL_UART(reg, CTS) = psel;
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@ -152,21 +143,12 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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write = 0U;
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dir = NRF_GPIO_PIN_DIR_OUTPUT;
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input = NRF_GPIO_PIN_INPUT_CONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIM_CLOCKPIN_SCK_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_SPIM_MOSI:
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NRF_PSEL_SPIM(reg, MOSI) = psel;
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write = 0U;
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dir = NRF_GPIO_PIN_DIR_OUTPUT;
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input = NRF_GPIO_PIN_INPUT_DISCONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIM_CLOCKPIN_MOSI_NEEDED)
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/* CLOCKPIN setting must not be applied to SPIM12x instances. */
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if (!NRF_SPIM_IS_320MHZ_SPIM((void *)reg)) {
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clockpin = true;
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}
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#endif
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break;
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case NRF_FUN_SPIM_MISO:
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NRF_PSEL_SPIM(reg, MISO) = psel;
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@ -179,9 +161,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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NRF_PSEL_SPIS(reg, SCK) = psel;
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dir = NRF_GPIO_PIN_DIR_INPUT;
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input = NRF_GPIO_PIN_INPUT_CONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIS_CLOCKPIN_SCK_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_SPIS_MOSI:
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NRF_PSEL_SPIS(reg, MOSI) = psel;
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@ -192,9 +171,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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NRF_PSEL_SPIS(reg, MISO) = psel;
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dir = NRF_GPIO_PIN_DIR_INPUT;
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input = NRF_GPIO_PIN_INPUT_DISCONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIS_CLOCKPIN_MISO_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_SPIS_CSN:
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NRF_PSEL_SPIS(reg, CSN) = psel;
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@ -216,9 +192,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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}
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dir = NRF_GPIO_PIN_DIR_INPUT;
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input = NRF_GPIO_PIN_INPUT_CONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIM_CLOCKPIN_SCL_NEEDED)
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clockpin = true;
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#endif
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break;
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case NRF_FUN_TWIM_SDA:
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NRF_PSEL_TWIM(reg, SDA) = psel;
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@ -227,9 +200,6 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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}
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dir = NRF_GPIO_PIN_DIR_INPUT;
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input = NRF_GPIO_PIN_INPUT_CONNECT;
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#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIM_CLOCKPIN_SDA_NEEDED)
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clockpin = true;
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#endif
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break;
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#endif /* defined(NRF_PSEL_TWIM) */
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#if defined(NRF_PSEL_I2S)
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@ -395,7 +365,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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nrf_gpio_cfg(pin, dir, input, NRF_GET_PULL(pins[i]),
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drive, NRF_GPIO_PIN_NOSENSE);
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#if NRF_GPIO_HAS_CLOCKPIN
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nrf_gpio_pin_clock_set(pin, clockpin);
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nrf_gpio_pin_clock_set(pin, NRF_GET_CLOCK_ENABLE(pins[i]));
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#endif
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}
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}
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@ -24,9 +24,13 @@
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*/
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/** Position of the function field. */
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#define NRF_FUN_POS 17U
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#define NRF_FUN_POS 18U
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/** Mask for the function field. */
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#define NRF_FUN_MSK 0x7FFFU
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#define NRF_FUN_MSK 0x3FFFU
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/** Position of the clock enable field. */
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#define NRF_CLOCK_ENABLE_POS 17U
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/** Mask for the clock enable field. */
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#define NRF_CLOCK_ENABLE_MSK 0x1U
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/** Position of the invert field. */
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#define NRF_INVERT_POS 16U
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/** Mask for the invert field. */
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@ -38,7 +38,8 @@ typedef uint32_t pinctrl_soc_pin_t;
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((NRF_PULL_UP * DT_PROP(node_id, bias_pull_up)) << NRF_PULL_POS) | \
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(DT_PROP(node_id, nordic_drive_mode) << NRF_DRIVE_POS) | \
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((NRF_LP_ENABLE * DT_PROP(node_id, low_power_enable)) << NRF_LP_POS) |\
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(DT_PROP(node_id, nordic_invert) << NRF_INVERT_POS) \
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(DT_PROP(node_id, nordic_invert) << NRF_INVERT_POS) | \
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(DT_PROP(node_id, nordic_clock_enable) << NRF_CLOCK_ENABLE_POS) \
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),
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/**
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@ -59,6 +60,13 @@ typedef uint32_t pinctrl_soc_pin_t;
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*/
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#define NRF_GET_FUN(pincfg) (((pincfg) >> NRF_FUN_POS) & NRF_FUN_MSK)
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/**
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* @brief Utility macro to obtain pin clock enable flag.
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*
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* @param pincfg Pin configuration bit field.
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*/
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#define NRF_GET_CLOCK_ENABLE(pincfg) (((pincfg) >> NRF_CLOCK_ENABLE_POS) & NRF_CLOCK_ENABLE_MSK)
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/**
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* @brief Utility macro to obtain pin inversion flag.
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*
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