Add support for pinctrl to cc23x0 SoC. Like for other TI SoCs,
a node approach is implemented (no grouping approach).
Signed-off-by: Lars Thalian Morstad <l-morstad@ti.com>
Signed-off-by: Vebjorn Myklebust <v.myklebust@ti.com>
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Add support for flash to cc23x0 SoC. The driver interacts with VIMS
(Versatile Instruction Memory System) internal bus standing before NVM.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Explicitly add default trigger mode as none in the kconfig trigger
template for better readability.
Signed-off-by: Mayank Narang <narang.may77@gmail.com>
For the CPU-based drivers, delete the old MCUX based RTIO driver and use
the default RTIO submit implementation instead.
Rationale:
- 300 LOC -> 1 LOC to maintain.
- MCUX SDK based driver cannot control the chip select for the transfer
properly, but the new spi_nxp_lpspi.c driver can. So this fixes the
bug with the PCS when using RTIO.
Also enable the default RTIO implementation for DMA based driver.
In the future a DMA based RTIO driver with custom implementation can be
designed, but for CPU based transfer, which is already not optimal
performance, code maintenance is more important. Only requirement is
asynchronous submit, which is accomplished by p4wq in rtio workq.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Make use of ABUS support in the pinctrl driver to allocate
analog buses, rather than hard-coding bus 0 in the ADC driver.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
If GPIO_DISCONNECTED is requested with gpio_pin_configure,
it will return -ENOTSUP since rpi_pico does not support it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Do not reconfigure the SHPHLD button behavior by writing to the sticky
register in drivers: mfd, regulator: npm2100. This is removed to avoid
unexpected behaviors during or after the ship or hibernation modes.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Extend mfd_npm2100_hibernate function with pass_through argument,
which is used to differentiate between hibernate and hibernate_pt
modes.
Signed-off-by: Audun Korneliussen <audun.korneliussen@nordicsemi.no>
- Add a condition to check the clock supplying the CPU to match with
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
- Correct CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for EK-RA4W1
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
Added area_is_subregion() to validate offset and size within bounds.
Ensured read, write, and erase operations check for valid memory regions.
Added null buffer check in read and write functions to prevent errors.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
Fast instance in nrf54h (uart120) can generate a spurious RXTO event
some time after RXTO event that indicates that RX path is disabled.
The time when event is generated depends on baudrate and when slower
baudrates are used peripheral is disabled on time to not notice it
in the test but with higher baudates issue become visible. In order
to avoid spurious interrupt, RXTO interrupt is disabled during RXTO
event handling and enabled when RX is enabled. This workaround is
applied only for fast instance to avoid unnecessary register
accesses for slower instances.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
nrf54x devices have UARTE instance capable of using baudrate higher
than 1M. Higher baudrates does not have predefined values for
BAUDRATE register. A formula can be used to calculate BAUDRATE
value that shall be used for desired baudrate. Add UARTE_ANY_HIGH_SPEED
macro which is set when high speed is enabled (uart00 in nrf54lx or
uart120 in nrf54h20). For high speed instance use formula for getting
value that shall be written to BAUDRATE register.
When runtime configuration is not used then same formula is used to
calculate fixed BAUDRATE value.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Rename UARTE_ANY_FAST to UARTE_ANY_FAST_PD. There are 2 types of
'fast' UARTE instances. In nrf54h20 instance uart120 is in fast
power domain that requires additional power and clock management
of that domain. In nrf54lx fast uart00 instance does not require
that. Add _PD to indicate fast power domain.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This implements the comparator driver for silabs acmp peripherals
using the silabs,acmp compatible binding.
Signed-off-by: Christian Galante <christian.galante@silabs.com>
Update the irq_enable macro to use the DT_INST_IRQN_BY_IDX helper.
This ensures proper handling of IRQ numbers in systems with multi-level
interrupt configurations.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Fixed a typo in BUILD_ASSERT macro causing driver to effectively fail to
compile as seen in:
west twister -p sam_v71_xult/samv71q21b -s drivers.dac.api
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Implement the HAL callback function `HAL_PCD_ISOINIncompleteCallback` in
which the endpoint write semaphore is given back, thus allowing subsequent
writes to the endpoint after an isochronous transfer has been incompleted
(not read by the host).
This approach was chosen because it is similar to what is done in the
already implemented HAL callback `HAL_PCD_DataInStageCallback` which also
gives the write semaphore back but also calls the endpoint callback
function.
The reason for not also calling the endpoint callback function is because I
do not see any appropriate cb_status (`enum usb_dc_ep_cb_status_code`) to
pass. If passing `USB_DC_EP_DATA_IN` is okay even though "In transaction
done on this EP" is not completely true, then this should also be added.
This has been tested by setting up an isochronous endpoint, writing to it,
and verify that `HAL_PCD_DataInStageCallback` is called and subsequent
writes are possible.
Signed-off-by: Algot Axelzon <algot.axelzon@satcube.com>
Remove the LL_RCC_PLLI2S_ConfigDomain_48M for the stm32f4
w/o Q divider on the PLLI2S to configure the PLL48CK
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Check that the plli2s has a DIV-Q output or not. That depends
on the PLLi2S of some stm32F4xx devices
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes a multitude of Kconfigs that wrongly appear on devices
where support is literally impossible
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Introduce `UDC_STM32_CLOCK_CHECK` Kconfig option since
`USB_DC_STM32_CLOCK_CHECK` was intended for use with `usb_dc_stm32.c`,
which is mutually exclusive with `udc_stm32.c`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add a Kconfig option which can be used to enable vendor HCI extensions for
Silicon Labs EFR32 devices.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
In case channel_setup is called with a new attenuation
config, make sure previous calibration scheme is deleted properly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Without this patch the hdlc_iface_init() function assigns to
ot_hdlc_rcp_context structure pointer (*ctx) value of 0, as in the
NET_DEVICE_DT_INST_DEFINE() preprocessor macro the 'data' field is
set to NULL.
Afterwards, the ctx->iface is set to iface address passed to the function
(as well as the ctx->ot_context is set).
Writing those values to address 0x0 is catastrophic to for example
mimxrt1020, which uses ITCM memory (mapped from 0x0) to store flash
handling functions, as those are used to XIP code directly from
SPI NOR memory (as mximxrt1020 doesn't have internal flash).
In this particular case - the flash_flexspi_nor_erase() function is mapped
(i.e. relocated) to ITCM's 0x0 address. Overwriting first 8 bytes of it
causes the SoC to enter "Precise data bus error" exception.
The fix is to define the static instance of struct ot_hdlc_rcp_context
and pass its address to the NET_DEVICE_DT_INST_DEFINE() macro. As a result
its storage is now in RAM, not ITCM.
This issue has been discovered on UART based HDLC RCP communication, but as
it also may be problematic on the NXP driver, this patch fixes it too.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
To fix the native hardware chip select, we need to rewrite this driver
to not use the MCUX SDK handle abstraction, which does not fit the
zephyr use case.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add functions to get remaining length in the transfer. Refactor a bit to
avoid duplicate code for the for loop that is the same as in the total
length function.
The difference between the total length and left length function is that
the current buffer total length is counted in the former and the current
buffer remaining length is counted in the latter.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add properties for describing RX and TX fifo sizes.
Also reformat some descriptions and fix the description of the
transfer-delay property which was incorrect. Since zephyr spi bufs are
not continuous, every possible Zephyr LPSPI driver must use
continuous transfer mode, for which the meaning of this delay has
nothing to do with the chip select.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The GPIO peripheral on Silabs Series 2 devices is responsible for
allocating analog buses to analog peripherals. Enable support for
this in the pinctrl driver. Since these bus allocations are not
digital pins, introduce a new property silabs,analog-bus for this
purpose.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Makes the esp_console_init() calling during hardware initialization
conditioned to CONFIG_ESP_CONSOLE
Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
