Commit graph

28,390 commits

Author SHA1 Message Date
Lin Yu-Cheng
ad320ee4f2 driver: input: implement input PM function
Add the pm device for rts5912 input driver

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-10-24 01:12:49 +03:00
Wajdi ELMuhtadi
ffdf184b86 drivers: sensor: wsen_pdms_25131308XXX05: add sensor driver
Add wsen_pdms_25131308XXX05 driver.

Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
2025-10-24 01:12:21 +03:00
Wajdi ELMuhtadi
c555a2969d manifest: hal_wurthelektronik: update to sensors sdk v2.7.0
Update the hal to have the latest Sensors SDK
version 2.7.0

Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
2025-10-24 01:12:21 +03:00
Felix Wang
1f2ec45a12 drivers: Counter: TPM improvement
1.Include barrier.h to fix barrier_dsync_fence_full() not found issue
2.Support multiple channels for alarm function

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-10-24 01:12:05 +03:00
Siratul Islam
0974e9b471 drivers: display: add HUB12 LED matrix driver
Add driver for HUB12 interface monochrome LED matrix displays.

Features:
- 32x16 pixel resolution, 1-bit monochrome (PIXEL_FORMAT_MONO01)
- SPI-based data transfer with shift registers
- Configurable brightness control
- Thread-safe framebuffer access with semaphore

The driver implements the standard Zephyr display API

Signed-off-by: Siratul Islam <sirat4757@gmail.com>
2025-10-24 01:10:57 +03:00
George Stefan
e25a7417f1 drivers: ieee802154: mcxw: disable poll optimization
The 802.15.4 PHY has the poll optimization enabled by default.
Disable it until the driver state machine is updated.

Signed-off-by: George Stefan <george.stefan@nxp.com>
2025-10-24 01:10:20 +03:00
Abhinav Kulkarni
0d2e8954a0 boards: shields: nxp_m2_wifi_bt: overlay update
- Updated shield overlay file for RT1060 with sdio power and reset pins
- added device tree node in sdhc for sd reset pin
- added power gpio toggle logic

Signed-off-by: Abhinav Kulkarni <abhinav.kulkarni@nxp.com>
2025-10-23 16:04:22 -04:00
Alain Volmat
38a21cc1a2 video: introduce video_set_compose_format helper
Some devices allow for downscale / upscale via the set_selection
compose API. When using it, it is necessary to perform a
set_selection of the compose target prior to setting the format.
In order to allow non-compose aware application to benefit from
it, introduce a helper which take care of setting the compose
prior to setting the format.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-23 16:03:10 -04:00
Alain Volmat
126aaf6b72 video: dcmipp: expose dcmipp caps for all 3 pipes.
Currently the DCMIPP driver rely on a Kconfig in order to
select the right sensor resolution / format to pick.
This also makes the exposure of caps easier since it can
be exposed as:
  DUMP pipe: same caps as mentioned in Kconfig
  MAIN pipe: any format supported on this pipe and resolution
             starting at sensor selected resolution down to
             64 times smaller (which is the maximum of the
             downscale)
  AUX pipe: same as MAIN except without the semi-planar and
            planar formats

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-23 16:03:10 -04:00
Ryan Erickson
631dbd98b4 drivers: can: tcan4x5x: Add device PM support
Add support for device runtime power management.
Suspending the device will place it into sleep mode, its lowest
power state.
All config will be lost when suspending the device.
Do not allow suspending the device if it is started or has
RX filters registered.
The application has to reconfigure the CAN device to resume
expected operation.

Signed-off-by: Ryan Erickson <ryan.erickson@ezurio.com>
2025-10-23 16:02:36 -04:00
Jérôme Pouiller
1f1f3e4594 drivers: spi: siwx91x: Use GPDMA rather than UDMA
Silabs siwx91x offer two DMA hardware block: GPDMA and UDMA.

While UDMA has some benefit when running in low power modes, GPDMA offer
better performances. So GDMA is probably better suited for SPI device.

Ideally, we would like to leave the ability to switch back to UDMA.
Unfortunately, UDMA and GPDMA are not configured in the same way:
  - the maximum length of the block are different (1024 or 2048 for UDMA
    and 4096 for GPDMA)
  - the burst length is different

So, we only support GPDMA.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
0594a1872c drivers: spi: siwx91x: Fix indentation
Since various macros don't end with a colon, the code formatters give bad
results. Let's fix that.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
f563f123aa drivers: spi: siwx91x: Add support for dma_slot attribute
The siwx91x platform provides two DMA block: UDMA and GPDMA. GPDMA require
the dma_slot attribute.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
627aeb84f7 drivers: spi: siwx91x: Fix memory alignements
The DMAs expect a 32 bits aligned address as source.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
fb0dd841ff drivers: dma: siwx91x: Check buffers alignments
GPDMA hardware block has some requirement regarding the buffers alignments.

Note the previous condition was too permissive. It ignored
source_burst_length during the check of the transaction size.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jérôme Pouiller
7e90e45b7a drivers: dma: siwx91x: Fix log messages
LOG_*() macros automatically add \n at the end of the messages. Code
shouldn't add one.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-10-23 16:01:37 -04:00
Jilay Pandya
7c87d89bf5 drivers: stepper: adi_tmc: refactor common headers
currently adi_tmc5xxx_common.h and adi_tmc_reg.h are placed
directly in the adi_tmc folder, however placing them in a
common folder and adding to the include directories results
in the drivers not having to include these files using relative
paths.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-10-23 16:00:41 -04:00
Dawid Niedzwiecki
283365a496 drivers: flash: andes_xip: update include
Include a new andes_csr.h file instead of soc_v5.h.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2025-10-23 15:59:11 -04:00
Guillaume Gautier
8f06e7616f drivers: spi: stm32: add rtio support
Add SPI RTIO support for STM32. SPI RTIO required interrupts.
DMA is not supported yet.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
3b856ccb11 drivers: spi: stm32: replace an #if with an if() in transceive()
Replace a #ifndef directive with a if(!IS_ENABLED()) instrcution
in transceive() function. This change makes later integration of RTIO
support in this function smoother, polluting a bit less this function
with #if based directives.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
21827ce8e3 drivers: spi: stm32: remove useless inline keywords
Remove useless inline keywords in STM32 SPI driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
2c62291d22 drivers: spi: stm32: fix missing braces in conditioned instruction
Fix a missing braces pair around a conditioned instruction in
STM32 SPI driver. Fix that by aggregating the 2 if() instructions
into a single ANDed one.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
21dd1db3dd drivers: spi: stm32: correct indentation
Correct some indentation issues, a few useless line escapes,
double space characters or parentheses pair in STM32 SPI driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
c0fdf66991 drivers: spi: stm32: explicit boolean test
Use explicit boolean tests in STM32 SPI driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
24530175c0 drivers: spi stm32: remove bits2byte()
Remove bits2byte() helper function than was not always used. Replace it
with a division by BITS_PER_BYTE that is explicit enough.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
5ad47994da drivers: spi: stm32: remove useless LOG_LEVEL
Remove useless LOG_LEVEL in STM32 SPI RTIO driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
87e752495b drivers: spi: stm32: reorder header inclusion
Reorder inclusions of header files to clarify and simplify later changes.
By the way, remove #ifdef CONFIG_SPI_STM32_DMA condition to include
DMA header files as its not required.

Keep zephyr/log.h with use of LOG_MODULE_REGISTER() first since included
local spi_context.h depends on log resources to be defined.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Etienne Carriere
88db1357b6 drivers: spi: stm32: don't include zephyr/arch/cache.h
Remove inclusion of zephyr_arch/cache.h header file from STM32 SPI
driver. This header file is included by zephyr/cache.h if applicable
(e.g. CONFIG_ARCH_CACHE is enabled) and should not be used when
CONFIG_EXTERNAL_CACHE is enabled.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Guillaume Gautier
720ee56137 drivers: spi: stm32: prepare for rtio integration
Move some code into a new function to prepare for RTIO integration.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-10-23 18:07:18 +02:00
Bjarki Arge Andreasen
beacd7c181 dts: drivers: nordic: nrf54h: Don't manage clocks from drivers
Clocks are requested automatically by hardware on the nRF54H.

Remove additional handling from device drivers, and disable
the now unmanaged clocks in the devicetree.

Updates:
  - can_nrf
  - counter_nrfx_timer
  - uart_nrfx_uarte
  - spi_nrfx_spim
  - spi_nrfx_spis

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
Bjarki Arge Andreasen
bbad3d9717 drivers: nordic: support pin retention for AIN
Devices which use AIN (COMP, LPCOMP, SAADC) don't use pinctrl to
configure their pins, thus pinctrl can't manage pin retention like
is done for other devices. Thus for now, add manually disabling
pin retention to the drivers.

In the future, we should probably use pinctrl for these inputs
as well, at which point this commit can be reverted.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
Bjarki Arge Andreasen
e092eae90a drivers: gpio: remove pad group integration
Replace the pad group integration with directly setting/clearing
pin retention for output pins if required, since the pad group
integration is redundant if the quirky cross domain feature is
managed by the application.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
Bjarki Arge Andreasen
0a8888d000 drivers: pinctrl: nrf: simplify pin retention
GPIO pad power domain management is not neccesary if the quirky
cross domain feature is handled at the application level. Replace it
with directly setting/clearing pin retention, as hardware will force
power domains on automatically.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
Bjarki Arge Andreasen
3a74ed7013 dts: vendor: nordic: nrf54h: remove gpio-pad-groups
The gpio pad groups are redundant if pin retention is handled per
pin, and the quirky cross domain feature is managed by the
application. Remove it entirely.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-10-23 18:06:30 +02:00
Kamil Krzyżanowski
0a047679fe drivers: serial: stm32: don't allow async TX on a suspended UART
Return an error if trying to send data using a suspended UART,
instead of blocking, possibly forever, for a transmission that will never
succeed.

Signed-off-by: Kamil Krzyżanowski <kamnxt@kamnxt.com>
2025-10-23 18:03:49 +02:00
Alvis Sun
acc8fdfd4f drivers: i3c: npcx: add device only when IBI enable succeeds
Ensure the device is added to the list only if the ENEC I3C
transaction succeeds.
Adding the device before enabling IBI may cause IBI retry failures
due to the device already being present in the list.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-10-23 18:03:15 +02:00
David Jewsbury
d9677bbd7b drivers: mspi: mspi_dw: Add DMA support
Initial DMA support. DMA supports implementation of SSI IP but using vendor
specific DMA in the wrapper. The setup of the DMA is done in
mspi_dw_vendor_specific.h.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-10-23 18:00:13 +02:00
David Jewsbury
a18fd95004 drivers: mspi_dw: Add support for slave mode
MSPI slave mode is selected through devicetree using the
op-mode property. Mode selected by SSIISMST bit in the
CTRLR0 register. EXMIF can only be Master (controller).

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-10-23 18:00:13 +02:00
David Jewsbury
2f1ee737b3 drivers: mspi_dw: Add support for asynchronous transfers
Handling of asynchronous transfers uses the system workqueue,
hence they are not available when multithreading is disabled.

Also add missing dependency on multithreading in the
MSPI_DW_HANDLE_FIFOS_IN_SYSTEM_WORKQUEUE Kconfig option.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-10-23 18:00:13 +02:00
David Jewsbury
ac94ca7894 drivers: pinctrl: nrf: add support for MSPI
Support for new MSPI peripheral where there is no PSEL
so pins are setup through CTRLSEL.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-10-23 18:00:13 +02:00
Martin Hoff
83a052f190 driver: dma: dma_silabs_siwx91x_gpdma: Add pm support
This commit introduce power management in gpdma driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-10-23 17:57:14 +02:00
Qingsong Gou
039389187f drivers: clock_control: fix sf32lb clock_control typo
fix a sf3232lb_clock_is_ready_dt typo

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-10-23 17:53:25 +02:00
Chris Friedt
da60309b10 drivers: smbus: stm32: implement smbus_stm32_pcall() with pec
Implement smbus_stm32_pcall() with packet error correction.

For more information, please see chapter 6.5.6 of the SMBus specification.
https://smbus.org/specs/SMBus_3_1_20180319.pdf

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-10-23 17:51:09 +02:00
Chris Friedt
ee135a8a3c drivers: smbus: stm32: implement smbus_stm32_block_pcall() with pec
Add SMBus Block Write-Block Read Process Call API for STM32.

This implementation also supports PEC mode (packet error checking) and is
dependent on PEC support already being supported in-tree.

Signed-off-by: James Growden <jgrowden@tenstorrent.com>
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-10-23 17:51:09 +02:00
Fabin V Martin
0bd56429d3 drivers: flash: microchip: add flash g1 driver
Add flash driver for Microchip NVMCTRL g1

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-10-23 17:50:29 +02:00
Tony Han
ac1c5bb1af drivers: ethernet: sam_gmac: update for support sama7g54
Use proper settings of clock, data bus width for sama7g54.
Update queue number checking and the macro definition in header file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
0c1f48ebc2 drivers: ethernet: sam_gmac: add GMAC Reference Clock support
Add property for selecting the source for GMAC Reference Clock to dts
bindings yaml file.
Choose the source for the GMAC Reference Clock by GMAC_UR register.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
6a9a01a7d3 drivers: mdio: sam: update clocks for supporting sama7g54
Do not config the clocks as they are already done in soc.c.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Tony Han
b33f7bd06b drivers: ethernet: sam_gmac: use sys_cache_data_foo() for coherence
Replace cache coherence functions:
 - SCB_InvalidateDCache_by_Addr() to sys_cache_data_invd_range()
 - SCB_CleanDCache_by_Addr() to sys_cache_data_flush_range()

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-23 10:39:50 +02:00
Antonino Scarpaci
54ca22a626 drivers: video: Himax HM01B0 camera sensor driver
Add Himax HM01B0 camera sensor driver.
It depends on I2C and it is required to configure the camera.

Signed-off-by: Antonino Scarpaci <antonino.scarpaci@gmail.com>
2025-10-23 10:39:41 +02:00