Move the Kconfig symbol for the SE HAL to hal_silabs.
Select the symbol in the entropy driver rather than unconditionally
at the SoC level.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Kconfig symbols for selecting HAL content should be part of the
HAL module integration, not defined in the SoC tree.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
The indirection through a backend symbol for PM implementation
isn't necessary. Define symbol for PM HAL in HAL Kconfig, and
leverage it at SoC level.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Kconfig symbols for selecting HAL content should be part of the
HAL module integration, not defined in the SoC tree. Define the
sleeptimer symbol for WiSeConnect and SiSDK since both use it.
In the future, WiSeConnect should include the SiSDK configuration
and reuse it instead of redefining everything itself. This is a
larger scale refactor that this commit doesn't start tackling.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
STM32F4xx series shares several DMA configurations with
the other platforms. These changes aim to enable platform
specific DMA configuration and align them to other platforms.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Wrapp the 'done:' label with #if DT_ANY_INST_HAS_PROP_STATUS_OKAY
to avoid unused label warnings when reset_gpios is not defined.
Move declaration of 'val' under the corresponding #if block to limit
its scope and prevent “unused variable” warnings.
Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
This driver is based on the XSPI driver for Renesas RZ/T2M and N2L,
and the SPIBSC driver for Renesas RZ/A3UL from the HAL.
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
This patch makes the following improvements:
- Helper APIs for simplifying RTIO transfers.
- Simplify RTIO Streaming implementation to reduce processing time.
- Add streaming mode atomic state, in order to track overruning the
callback events generation.
- Add device pointer address to logging on error-occurrences, as it is
useful when the app has multiple instances of the driver (e.g: NXP's
VMU RT1170 has two).
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Wait until the trigger or streaming mode is configured. Otherwise,
rebooting in-between runs may cause multiple callbacks invoked when
the trigger may have not been enabled yet.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
This induces extra-cycles in the encoding path while streaming, which
make it difficult to achieve high-bandidth performance. The use-case
being dealt with involves cranking the IMU at 8000 ODR in batches of
1.25 ms (10 samples at 800 Hz).
Signed-off-by: Luis Ubieda <luisf@croxel.com>
As it introduces latencies due to switching to the threads pool.
Moreover, this is not required for streaming as it executes in a
non-blocking path.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Based on performance observed when cranking the sensor at +1000 Hz ODR,
otherwise is not able to keep up with the pace.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Previous commit made the input buffer of the hash packet constant.
Let's therefore adapt typing where used, and remove inappropriate
casts of constant buffers to non-constant ones.
All the "backend" hashing functions already take a constant input,
these changes only affect the "plumbing" between the Zephyr crypto
API and the actual implementation where applicable.
Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
Adds HPPASS SAR ADC driver and HPPASS Analog driver files to support
ADC conversion for the PSOC C3 family of MCUs.
Signed-off-by: John Batch <john.batch@infineon.com>
The mcux_qtmr_pwm_set_cycles can not set 100% and 0%
duty cycle PWM wave.
Set output compare setting based on pulse_cycles and
period_cycles:
1. If pulse_cycles is 0, generate 0% duty cycle wave.
2. If pulse_cycles equals period_cycles but not 0,
generate 100% duty cycle wave.
3. Otherwise toggle output when compare value matched.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
The driver should not take the whole interface down and re-initialize on
every low power entry and exit. This is a lot of latency for no real gain
as far as I can tell. We can just do as the reference manual actually says
which is to set the sleep enable bit to put the module to sleep while still
being able to detect magic packets for wake on LAN.
Also, the only platform that this power action was "enabled" for was
kinetis, but that platform does not have any power management enabled in
Zephyr. Which means this code was never getting called even with all the
PM configs on. So basically this code is dead code. But it could be useful
for other platform, such as RT, so there's no reason not to remove the
dependency on kinetis and let it be used for any of the platform as long as
PM_DEVICE is enabled (hence the imply).
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fix QSPI and half duplex
Support hold on CS flag
Create functions to assert and deassert CS
Signed-off-by: Benjamin Santon <benjamin.santon@analog.com>
As the number of DMA channels could be different between DMA instances,
get the number from "XDMAC Global Type Register" and validate the
channel used.
Signed-off-by: Tony Han <tony.han@microchip.com>
1. add cs pin as espi driver wake up reference
2. removed the unnecessary update of the cached date
3. removed the unnecessary busy wait in notify funciton
Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
Direct flash access can cause exceptions when performed while the flash
memory is inaccessible or being modified — for example, when code is
executing from PSRAM. To avoid such invalid access, this change introduces
asynchronous flash operations that are executed from a safe runtime context
via a work queue. This ensures all flash accesses occur only when the flash
is valid and accessible.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add pwm driver using tcc g1 peripheral.
Adds the support for generating pwm output.
Supports both 16-bit and 24bit mode of tcc peripheral
Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
Clarify HAL return value is of type HAL_StatusTypeDef and not an
int in STM32 DCMI and DCMIPP drivers. For consistency, rename
the variable holding HAL return value from ret to hal_ret.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
On most parts of the STM32F4 series, when the OTG_HS controller is used in
FS mode, the ULIP **low-power** clock must also be disabled for proper
operation. This was done properly in an old version of the driver but was
lost as part of refactoring[1].
Re-introduce ULPI low-power clock disable when OTG_HS is used in FS mode.
[1] See commit e31ddec781
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Ensure bus clock is enabled before accessing TRNG FIFO on
Series 2 VSE devices.
This is a minimal bugfix to work around an issue where certain
HAL APIs disable the bus clock after accessing the crypto block.
Long term, this driver should be rewritten to properly use
clock control APIs for clock management.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
This commit prevents enter deep sleep mode during PECI transactions
since clocks if PECI will stop.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add a callback for the periodic script result so that applications have
a way of detecting dead links.
Signed-off-by: Jordan Yates <jordan@embeint.com>
