Commit graph

25,525 commits

Author SHA1 Message Date
Mahesh Mahadevan
6698f3b4e8 drivers: dma: Add PM handler for NXP LPC DMA driver
Add the PM handler. Reinitialize the DMA block in the
TURN_ON action, this is needed for some SoC's after the system
exits certain power modes.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 21:54:55 +02:00
Hank Wang
5379f4a16b drivers: sensor: tmp1075: add support for fractional threshold values
Previously, the TMP1075 driver only used the integer part (val1) of the
sensor_value when setting TLOW and THIGH thresholds. This limited the
precision of temperature threshold configuration and could be insufficient
in applications requiring fine-grained control.

This patch adds proper handling for the fractional part (val2) by encoding
it into bits [7:4] of the 12-bit temperature register according to the
TMP1075 datasheet. The decoding logic in get_threshold_attribute() is also
updated to recover the fractional value accurately.

Signed-off-by: Hank Wang <wanghanchi2000@gmail.com>
2025-05-19 21:54:45 +02:00
Fabio Baltieri
0a14cc21cc serial: uart_bt: set the workqueue thread name
Set the bt_uart workqueue name so it does not show up as a mystery
thread on the thread list.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 18:39:16 +01:00
Fabio Baltieri
d79e9e7d3a serial: uart_bt: select SERIAL_SUPPORT_INTERRUPT
Select SERIAL_SUPPORT_INTERRUPT for uart_bt, this is required to have
the interrupt API available.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 18:39:16 +01:00
Mirko Bottarelli
6a791bd478 drivers/gpio: Fix issue in gpio_pca6416
Added the possibility of leaving the gpio-int property empty, in case
the corresponding pin is not connected.

Signed-off-by: Mirko Bottarelli <mirko.bottarelli@gmail.com>
2025-05-19 16:49:07 +01:00
Mirko Bottarelli
28052aa7f0 drivers: gpio: Fix PCA6416 configuration
Fix device initialisation, allowing for empty interrupt_gpios in the
dts, as suggested by the documentation.

Signed-off-by: Mirko Bottarelli <mirko.bottarelli@gmail.com>
2025-05-19 16:49:07 +01:00
Mahesh Mahadevan
0abf4f589b drivers: input_gt911: Reinitialize interrupt GPIO on exit from PM
Certain power modes lose state of the GPIO, hence we need to
reconfigure the interrupt GPIO. This is managed using pm_notifiers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-05-19 16:36:42 +02:00
Abderrahmane JARMOUNI
6be42eb2d3 drivers: display: sdl: add windows custom naming
Add the possibility to set a custom name for SDL window
in native simulator

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-05-19 16:36:12 +02:00
Sergei Ovchinnikov
1ef29d5218 dts: bindings: npm1300-charger: make vbus-limit-microamp required
Make the vbus-limit-microamp property of npm1300-charger required and
change its range to reflect the one actually supported by the device.

Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
2025-05-19 16:35:55 +02:00
Camille BAUD
23d1a8fd2d drivers: display: Re-introduce SSD1327
This makes SSD1327 use the new L8 display format.
It also fixes all displays that didnt support the undocumented
monochrome mode.
It also adds i2c and revamps the entire driver.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 16:35:50 +02:00
Hao Luo
92e723db93 dts: uart: create ambiq uart binding file
This commit creates ambiq uart new binding file
and renamed the previous one as ambiq,pl011-uart

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-05-19 13:32:44 +02:00
Hao Luo
be4d8b22c3 drivers: uart: create ambiq uart driver for apollo510
This commit creates ambiq uart driver for Apollo510 SoC,
not to use the pl011 driver any more.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-05-19 13:32:44 +02:00
Fabio Baltieri
87e20308bd drivers: dp: fix build on M0 MCUs
Current code does not build on Cortex-M0, seems like it does not like
subs:

Error: instruction not supported in Thumb16 mode -- `subs r3,#1'

Adding a unified assembler language declaration in the snippet seems to
fix the problem, also add an M0+ board so this is tested in CI.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-19 11:24:49 +02:00
Tomasz Moń
243f7c44d3 drivers: udc_dwc2: Disable control IN endpoint on timeout
DWC2 core sets DIEPCTL0 SNAK when SETUP packet is received. The CNAK bit
results in device sending NAK in response to IN token sent to EP0, but
it does not modify the TxFIFO in any way. The stale data in TxFIFO can
then lead to "FIFO space is too low" error. Solve the issue by disabling
and flushing IN endpoint 0 if previous control transfer did not finish.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-05-19 11:24:27 +02:00
Camille BAUD
88387b44dc drivers: syscon: Introduce BFLB Efuse driver
This introduces a driver used to access bouffalolab efuses via syscon API

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-05-19 10:11:58 +02:00
Anas Nashif
2aacbcaab5 style: add missing curly braces in if/while/for statements.
Add missing curly braces in if/while/for statements.

This is a style guideline we have that was not enforced in CI. All
issues fixed here were detected by sonarqube SCA.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-17 14:10:33 +02:00
Wajdi ELMuhtadi
6353ba88b6 drivers: sensor: wsen_itds_2533020201601: add sensor driver
Add wsen_itds_2533020201601 driver with
the corrected name and compatibility with
the hal update as well as added new features.

Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
2025-05-16 22:56:06 +02:00
Rubin Gerritsen
577a004b32 drivers: spi: nrfx: Add explicit dependency to GPIO
This dependency was always there but not explicitly defined.
By adding the explicit dependency it becomes more obvious
what is wrong when SPI is enabled but GPIO disabled.

This was found when building `samples/bluetooth/peripheral`
for `nrf54l15dk/nrf54l15/cpuapp` with `CONFIG_GPIO=n`.

Before we got:
 - A linker error in `spi_nrfx_common.c` failing
   to reference some nrfx_gpiote APIs.
 - A linker error in `spi_nrfx_spim.c` failing to reference
   the GPIO dts entry.

Now we will get a warning of that GPIO is not enabled
With this it becomes more obvious that SPI driver is enabled by
default because of the external flash mounted on the DK.

Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
2025-05-16 22:55:38 +02:00
Scott Worley
53e17c4c22 drivers: spi: microchip: Add SPI driver for MEC5 HAL quad SPI
SPI driver for Microchip MEC5 HAL based QSPI controller. QSPI
hardware supports full duplex, dual, and quad operation. MEC5
QSPI controller also includes three local DMA channels per
direction to off load firmware. The driver API supports full
or half-duplex. Due to QSPI hardware not supporting one wire
half-duplex, this driver supports full-duplex only. QSPI hardware
design requires it to control chip select and current hardware
supports up to two chip selects. Zephyr's SPI DT macros store the
child SPI device's reg properity as the "slave" member of the SPI
configuration structure. The driver uses the "slave" value as the
chip select. Additional timing settings specific to SPI flash devices
are in a new SPI device YAM file: "microchip,mec5-qspi-device.yaml"
which includes the standard "spi-device.yaml". If the new YAML is not
used, the QSPI controller will use default timing values for chip
select and I/O line taps.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-05-16 21:36:50 +02:00
Luis Ubieda
a13be2f320 sensor: rm3100: Add streaming mode
Compatible trigger: DRDY.

Tested with Sensor Shell commands.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00
Luis Ubieda
4dfe251986 sensor: rm3100: Add ODR build-time setting through DTS property
Using pre-defined values displayed on datasheet's table 5-4 for
CMM Update Rates.

Please note that datasheet specifies these Update-Rates may have
up to 7% standard deviation, which may be significant for certain
applications.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00
Luis Ubieda
c1f3e2c712 sensor: rm3100: Basic functionality
This patch introduces rm3100 magnetometer sensor, with basic
support (only read-decode).

This driver has bus support for I2C.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 21:36:23 +02:00
Yunshao Chiang
8f8b223ff2 drivers: crypto: add it51xxx sha256 driver
Implement a crypto sha256 driver for it51xxx series.

Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-05-16 19:07:37 +02:00
Erwan Gouriou
cec116c83f drivers: flash: xspi: Put delay block config under specific bit
On some series, use of Delay Block could be possible on OSPI device but
not on HSPI one (which uses this drivers).
As a quick fix check the presence of XSPI Delay Block by-pass
configuration bit instead of the Delay Block presence.

Note: This fix works because we don't have cases today where this driver
is used for OSPI and HSPI instances with mixed DLYB compatibility.
This may have to be reviewed one day and may require a more complex fix
with instantiable configuration, but this day may never come as well.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-05-16 19:07:23 +02:00
Alex Rodriguez
64b8d9e0cf drivers: watchdog: wdt_mcux_wwdt: Add PM support for low power modes
Enables sleep mode (PM3) on RW61x. The driver
re-enables the wdt on wake-up based on the previous
configuration. Note that the wdt counter value always
resets to the max window value on wake-up

Signed-off-by: Alex Rodriguez <alejandro.rodriguezlimon@nxp.com>
2025-05-16 19:01:08 +02:00
Martin Stumpf
7dd6f94e57 drivers: spi: nxp_lpspi: Fix race condition in ISR
There was a race condition where `lpspi_end_xfer` can be called multiple
times per transfer. There was the case where a TX interrupt gets
triggered without the RX interrupt being set, and TX finishes writing
its last byte. Then, `spi_context_rx_len_left() == 0` is true and
`lpspi_end_xfer` happens, but the RX interrupt is still active. Then,
when the RX interrupt happens, `lpspi_end_xfer` will get called again.

To fix that, the architecture was adjusted to only call `lpspi_end_xfer`
once no interrupts are active any more, and the disabling of the
interrupts gets used to signal the end of the TX and RX part.

Minor adjustments were necessary to use the interrupt enable signals for
this purpose; the TX irq handler had its internal order reversed,
otherwise it wasn't guaranteed that the physical transfer is finished
when we disable the interrupt.

Also, the code where the RX interrupt gets disabled had to be moved out
of the RX irq handler, because the RX interrupt also needs to be
disabled if RX is finished but no RX interrupt is currently active.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
2025-05-16 19:01:01 +02:00
Frank Duerr
8079ef51e0 drivers: ptp clock: fixed invalid assertion
Assertion checked whether pointer is NULL.
Assertion should check whether pointer is *not* NULL.
Fixed by changing check in assertion.

Signed-off-by: Frank Duerr <frank.duerr@ipvs.uni-stuttgart.de>
2025-05-16 19:00:50 +02:00
Frank Duerr
3cd795ba59 drivers: ethernet: fixed calling mutex from ISR
The NXP ENET driver used a mutex inside an ISR.
Since mutexes are not allowed in ISR, an assertion had been triggered.
The mutex is not required since a semaphore ensures sequential writing
(in ISR) and subsequent reading (after eth_wait_for_ptp_ts()).
Fixed by removing calls to mutex.

Signed-off-by: Frank Duerr <frank.duerr@ipvs.uni-stuttgart.de>
2025-05-16 19:00:38 +02:00
Vit Stanicek
405ab182a9 drivers: intc_nxp_pint: Decouple from fsl_power.h
Add drivers/interrupt_controller/intc_nxp_pint/power.h abstracting
EnableDeepSleepIRQ and DisableDeepSleepIRQ invocations from
intc_nxp_pint.c. Modify intc_nxp_pint.c to use that file.

fsl_power.c and fsl_power.h can't be built on the
mimxrt685_evk/mimxrt685s/hifi4 target, so it's excluded from it in hal_nxp.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-05-16 19:00:30 +02:00
Hake Huang
0c5f13a599 tests: dma: enable dma test setting for NXP KE1XZ
NXP Ke1xz series need using mux starting from 60

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-05-16 19:00:17 +02:00
Phi Bang Nguyen
7b421398c4 drivers: video: Rename signal variables to avoid compliance violation
Rename signal variables to sig to be compliant with code rule 21.2

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-16 19:00:09 +02:00
Phi Bang Nguyen
9fa1aeea32 drivers: video: Add video_buf_type
M2M devices like ISPs or PxP have two separate buffer queues, i.e.
incoming and outcoming queues. For each API, the driver needs to
distinguish on which queue it needs to take action.

Add video buffer type to support this kind of devices.

- get_caps(), set/get_format(), enqueue()/dequeue(): the buffer type
is embeded in the video_caps, video_format and video_buffer structs

- video_stream_start/stop() : buffer type needs is sent as a parameter

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-16 19:00:09 +02:00
Phi Bang Nguyen
b63fb91622 drivers: video: Drop video_endpoint_id
The video endpoints are already described in the devicetree. The
video_endpoint_id parameter in each video API is not necessary and has
no usage. Drop it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-16 19:00:09 +02:00
Phi Bang Nguyen
579741e5e5 drivers: video: esp32: Fix flush callback
When stopping, the framework calls driver's stop callback then driver's
flush callback. Hence, driver's flush callback does not need to call
stop callback again.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-16 19:00:09 +02:00
Andrzej Głąbek
c365fbb3f6 drivers: clock_control_nrf2_common: Add resetting of the on-off services
If an on-off service records an error while transitioning to the on
state, it stays in the error state and does not allow new requests
to be made until its state is reset. Add resetting of the services
associated with particular clock controllers so that requests can
be retried after failures.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-05-16 17:32:35 +02:00
Mikolaj Klikowicz
8c3e937614 drivers: clock_control: clock_control_max32: Enable IPLL
Make enabling MAX78002 IPLL clock from dts possible

Signed-off-by: Mikolaj Klikowicz <mklikowicz@antmicro.com>
2025-05-16 17:32:09 +02:00
Yonas Alizadeh
c186bffab8 drivers: flash: flash_stm32g4x: Fix STM32G4 unaligned read access
Due to source data pointer having no alignment constraint,
extra care needs to be taken when reading source data
as dword

Signed-off-by: Yonas Alizadeh <yonas.alizadeh@alfalaval.com>
2025-05-16 16:12:10 +02:00
Chun-Chieh Li
7095608f7c drivers: usb: udc: support numaker m55m1x series soc
This supports nuvoton numaker m55m1x series soc. Besides, it also
has relevant modifications, including:
1. Fix failure to enable HICR48M, which is to clock usbd and phy
2. Support HWINFO for USB device serial number

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-05-16 16:11:54 +02:00
Josuah Demangeon
084f0acb36 drivers: video: controls: add the BASE and CAMERA controls
Add all the base controls present like they are in Linux into Zephyr,
limited to those that can apply in the current system:
- Buttons are left as integer for now.
- Some description is modified to fit the Zephyr situation.
- For the minimum number of buffer, Zephyr uses a different mechanism.
- No audio support through the video subsystem.
- Homogenize the wording

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-16 16:11:32 +02:00
Luis Ubieda
8e0e99b9dd sensor: adxl345: Formatting improvements on macrobatics
No functional changes, only formatting changes.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
9a044aaacb sensor: adxl345: Optimize RTIO SQE/CQE pool based on fifo-watermark
Since it's directly related (we can't just burst-read the fifo at
once). This patch includes a comment block explaining this rationale.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
36917d4809 sensor: adxl345: Allow fifo-watermark configurable through dts
Allow for users to define the fifo-watermark on a per-instance basis
through device-tree properties. This setting is validated at build
time, so missing it when required, or setting an invalid value should
not end up in a run-time errror (as in: it runs but nothing happens).

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
4243ad20ca sensor: adxl345: rename ADXL345_ODR_12HZ to ADXL345_ODR_12_5HZ
To better reflect the actual ODR setting.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
f8416de09e sensor: adxl345: fix: Overriding of ODR setting in DTS property
This patch fixes previous overriding of ODR setting through DTS (it
would always be 25-Hz, irrespective of what the DTS property said).

While doing so, create dt-binding enum to improve settings clarity.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
5e1a2fcf31 sensor: adxl345: Prevent clearing SQE flags set while prepping SQEs
SQE flags are adjusted when preparing write/read ops, therefore an OR
operation is required.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Luis Ubieda
ce2d16be01 sensor: adxl345: Fix conditional instantiation of RTIO ctx and IODEV
With actual parameter to determine whether the driver requires it:
Streaming mode enabled.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-05-16 09:37:28 +02:00
Anas Nashif
e48c90700d doc: remove more occurances of Nios II
Remove all occurances of Nios II from docs and code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Anas Nashif
5fe84d5b69 arch: nios2: remove arch
Remove architecture and dependencies.
Remove altera HAL supporting nios2

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-05-15 20:01:05 -04:00
Sean Kyer
3d55a9d410 drivers: counter: Place max32 API into iterable section
Add warpper DEVICE_API macro to counter_max32_wut instance.

Signed-off-by: Sean Kyer <Sean.Kyer@analog.com>
2025-05-15 17:53:31 +02:00
Sean Kyer
ae681c48c7 drivers: counter: counter_max32_wut: Rename irq_config callback
Renamed irq_config callback function to follow
standard of other drivers.

Signed-off-by: Sean Kyer <Sean.Kyer@analog.com>
2025-05-15 17:53:31 +02:00