The initialisation of the device data struct was giving a build error
when using the adi,adin1110 devicetree compatible.
Fixed to allow both adi,adin2111 and adi,adin1110 devices to
be defined.
Signed-off-by: Jason Murphy <jason.murphy@analog.com>
Add driver support for adxl367 accelerometer.
The ADXL367 is an ultralow power, 3-axis microelectromechanical
systems (MEMS) accelerometer that consumes only 0.89 μA at
a 100 Hz output data rate and 180 nA when in motion-triggered
wake-up mode. Unlike accelerometers that use power duty cycling
to achieve low power consumption, the ADXL367 does not alias
input signals by undersampling, but samples the full bandwidth of
the sensor at all data rates.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Allows device tree to enable usage of the controller feature
where HS clock is disabled when not in use, which is good
for reducing power consumption if MIPI DSI is mostly idle.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version of dsi_mcux_2l hardcoded some MIPI DSI
transfers to use high speed mode but others used low power mode.
Now dsi_mcux_2l will use high speed mode by default for all
transfers unless a new msg flag is set to indicate the
transfer must use low power mode. Note that the new flag
is different than the existing MIPI_DSI_MODE_LPM flag, which
so far only applied to cmd messages sent in video mode,
or could be interpreted as for all messages, but would not
allow per message mode control.
This new message flag allows client to control transfer
mode per message transfer.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version hardcoded the SMARTDMA slot to either
RGB565 or RGB565_SWAP, but that would be incorrect
if the pixfmt was RGB888. Use the mipi device
pixfmt to set the slot.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Underlying nrfx driver was modified so now it forwards the event
to the user callback only if it was enabled.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
The BCM2711 SoC exposes 58 GPIOs. The first 28 (bank 0) are accessible
to users via the 40-pin header, while the others (bank 1) are used for
controlling on-board peripherals.
This also update doc of `rpi_4b` board.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Add support for CAN statistics to the SJA1000 CAN controller driver. The
hardware does not support distinguishing between being unable to transmit
dominant versus being unable to transmit recessive bits.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Don't re-use the `rxmsg` buffer in the `bt_spi_send` function. This
buffer is still used by the RX thread after releasing the SPI semaphore.
The current re-use can result in buffer corruption if the RX thread is
swapped out as a result of the `k_sem_give`.
Moving the semaphore release later can result in deadlocks due to
buffer allocation being performed while holding the semaphore, so
instead just eliminate the re-use entirely.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Extract the HCI message handling out to a dedicated function to simplify
the main thread function. This also solves a bug as a side effect.
Previously `discardable` and `timeout` were never being reset after
an advertising report was received, resulting in ALL events after the
first advertising report being treated as discardable.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Disable power management for this particular test case as it expects a
particular pattern of pm get/puts that isn't matched by the driver and
usage in SoF.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The counter_native_posix driver currently does not support top value
configuration, i.e. `ctr_set_top_value` returns `-ENOTSUP`. This commit
adds support for top value configuration, and with the counter API now
fully implemented, adds `counter` to `supported` peripherals for
native_posix target.
It also resolves an existing bug in which the
counter ISR did not reset upon reaching `TOP_VALUE`.
And adds support for multiple channels
Signed-off-by: Jason Wright <jason@jpw.nyc>
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If an event occurs between the status registers being read and
the event being cleared, the interrupt line will remain active.
As the interrupt is edge triggered, all future interrupts
will being ignored. This problem will also occur if an I2C
transation fails in the callback.
The state of the interrupt pin is now checked at the end of the
callback, and a retry is attempted if the interrupt has not
been cleared.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
"const k_tid_t" is "struct k_thread * const" and not "const struct
k_thread *" as the code may be assuming. Just drop it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add support for CAN statistics to the Microchip MCP2515 CAN controller
driver. The hardware only supports reporting RX overruns.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The scaling factor for current measurement was incorrect.
Full range scaling during charge is 1.25 * charge current
limit, and there is no additional scaling factor applied
in different charge modes.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Enable driver for intel lw uart.
Changes from review:
- refactor spinlock to inside of loop
- use menuconfig for kconfig
- add CONFIG_UART_INTEL_LW_AUTO_LINE_CTRL_POLL
Signed-off-by: Teoh Shi Lin <shi.lin.teoh@intel.com>
When rx_timeout is set to a sufficiently small value,
rx_timeout_slab could potentially get set to a greater
than necessary value that causes spurious UART_RX_RDY
events.
Fixes#62828
Signed-off-by: Jacob Preston <jacob.preston@synapse.com>
add basic sensor support for 3-axis accelerometer, currently
this driver support data acquisition and motion detection
features.
Signed-off-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Because shadow variable warning is turned on, a warning was thrown and
could fail some twister tests that don't use the -W option. This commit
gets rid of the warning.
Signed-off-by: David Corbeil <david.corbeil@dynon.com>
The OSEL bits in ALHASCTL register are present only
in ACE1.5 version - MTL. Platforms ACE2.0 do not have
the OSEL bits. Therefore DAI_ALH_HAS_OWNERSHIP
configuration option should be set only for
particular ACE1.5 version
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Remove the HWSEM locking around stm32_exti_disable().
The STM32 EXTI driver uses the core-local interrupt mask regsiters on
STM32H7x7 asym. dualcore MCUs. There is no need to lock the HWSEM
guarding the EXTI when accessing these registers.
Some sensor drivers toggle their interrupt mask every time the sensor
triggers the IRQ line. Locking the HWSEM fails e.g. in situations where
one coprocessor serivces the sensor and the other coprocessor sets up
its interrupts initially during bootup. This prevents the sensor driver
from locking the HWSEM and causes a kernel panic on the corresponding
CPU.
Note: The opposing stm32_exti_enable() was already correctly without
locking.
Signed-off-by: Martin Gritzan <martin.gritzan@gmail.com>
Let's make the nrf rtc kconfig depend on the SOC_COMPATIBLE
options which are set both by the real and simulated targets
so the configuration matches in both cases.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This contribution addresses the support for various types of modems in
gsm driver. As some 4G modems have failed to return correct output
from AT+CREG?, so AT+CEREG? is the right AT command in such situation.
This commit provides the possibility for user to select one type of
AT command. This PR fixes zephyrproject-rtos#63917
Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>
This CL uses BUILD_ASSERT macro to check whether `thr-sel` is out of
range instead of using NPCX series definitions.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace Nuvoton NPCX series definitions with new Kconfig definitions in
the npcx drivers. The benefit of this approach is that we won't touch
the npcx driver sources again during introducing a new npcx series next
time.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
STM32WB MCUs have two AES peripherals: AES1 for application use and AES2
dedicated for network stack. This patch modifies stm32 crypto driver to
use AES1 peripheral when building for STM32WB.
Signed-off-by: Lukasz Hawrylko <lukasz@hawrylko.pl>
If the underlying PWM device does not have a PM callback,
the PWM LED driver will flood the console with error logs.
The change ignores the error if there is no PM callback
for the PWM device.
Signed-off-by: Dennis Grijalva <dennisgrijalva@meta.com>
Add wakeup_duration support. (WAKE_DUR in WAKE_UP_DUR)
Value is configurable through DT per instance.
Signed-off-by: Adrian Wojak <adrian.wojak@outlook.com>
Use a new property, "clock-mux" to select the clock mux for the SAI.
Previously, the clock mux was being selected using the "bits" specifier
of the "clocks" phandle property, which is not the purpose of this
specifier. This can be shown by the regression introduced by 5bebbb91,
which changed the "bits" field to the clock gate shift (which is the
intended meaning).
This incidently worked for the SAI1 and SAI3 peripherals, as the lower 2
bits of the correct clock source selection (0b10) are the same as the new
value placed in the "bit" specifier. For SAI2, the clock source was
switched to PLL3 PDF0 by this change.
To resolve this, use an explict "clock-mux" property for this selection.
Fixes#63541
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
As the automatic start requires that the zephyr exe is run as
a root user, it is somewhat cumbersome to use. Remove the script
support and require that the zeth device is created beforehand
by the net-setup.sh script found in net-tools zephyr project.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
This change slightly simplifies the configuration of a CSL receiver and
generalized CSL_RX_TIME to EXPECTED_RX_TIME as a re-usable primitive
across several timing-sensitive IEEE 802.15.4 standard sub-protocols
(namely BE-PANs/DSME/CSL/RIT/TSCH).
This API change is based on the rules outlined in RFC #61227.
Fixes: #62918
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Improves standard conformance of the IEEE802154_CONFIG_ENH_ACK_HEADER_IE
option and introduces certain "soft MAC" capabilities around header IEs:
* Introduces types and helpers that allow driver maintainers to
represent, parse, write and validate header IEs.
* Introduces helper functions to access non-aligned fields in header
IEs, namely element IDs.
Updates the only existing L2 and driver pair that uses
IEEE802154_CONFIG_ENH_ACK_HEADER_IE: OpenThread platform radio and nRF5
and improves header IE validation in the nRF5 driver.
This change should help further driver maintainers to support
OpenThread's CSL and vendor IE extensions. It is based on the rules
specified in RFC #61227.
It is also a precondition to generically support both, "soft MAC" and
"hard MAC", approaches to header IEs in the TSCH protocol, namely the
time synchronization IE.
Fixes: #62940
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
"Sleeping" has a well defined meaning in Zephyr related to threading and
power management. This differs from OpenThread's definition:
- Deprecates the "SLEEP_TO_TX" capability as it is redundant and
conflicts with all of Zephyr's nomenclature, #61227, RFC 2863, Thread
standard and IEEE 802.15.4. This binds the API to an implementation
detail of OpenThread, instead. See #63670 for the agreed migration path.
- Renames the "SLEEP" event to "RX_OFF" which conforms to the
nomenclature in Zephyr, this API and IEEE 802.15.4.
Fixes: #62995
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
As noted in PR#63165 checking of result should use comparison to
success value instead of checking if result is negative. It will
allow to check if function returned invalid but positive value.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
These two functions are used together so there is no need for
splitting them into two functions. This commit also makes this
function required to be implemented by the TCPC driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
TCPC API functions should be able to inform the caller if the function
is supported and successfully executed. Bool values doesn't allow this
so it is needed to change the type to int.
For is_rx_pending_msg function the return code should conform to
existing error codes, so in case of function being not supported,
the -ENOSYS should be returned. In case of successful execution,
if there is no pending message, the -ENODATA should be returned and
in case of message pending, the value of 0.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add "chip" subcommand that displays the vendor, product and device
identifiers for all TCPC referenced by USB-C connectors.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add a new SPI shim driver for Intel SoCs. Builds upon the SEDI bare
metal SPI driver in the hal-intel module.
Co-Authored-By: Kong Li <li.kong@intel.com>
Signed-off-by: Ye Weize <weize.ye@intel.com>
The receive FIFO needs to be drained in a different way depending when it
is done.
- before start
If the RX FIFO is in overflow state then we must read all the entries out
to empty it (it was after all full).
- before stop
The DMA might be already running to read out data. Check the FIFO level
change in one sample time which gives us the needed information to decide
to wait for another loop for the DMA burst to finish, wait for the DMA to
start it's burst (DMA request was asserted) or drain the FIFO directly.
No need to drain the RX fifo at probe time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Update interface of memc flexspi driver to better handle multiple
devices. Previously, using multiple devices on one FlexSPI bus would
require the user to configure each device to install its command table
(referred to as a LUT table by the driver) at an offset, so that it did
not overlap with other devices on the bus.
This commit changes the interface of the memc flexspi driver to instead
configure the LUT and flash device in one call. This allows the memc
driver to record the port each LUT sequence is used with, so that
future FlexSPI transfer requests can have their LUT offsets adjusted
based on the target port (which will correspond to a target device)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check XIP state based on the value of CONFIG_FLASH_BASE_ADDRESS. This
check should be more reliable than the SOC based method currently
used.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduces a (currently redundant) buffer length sanity check to prepare
for L2s that support PHYs with PHY payloads > 127 bytes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Introduces a (currently redundant) buffer length sanity check to prepare
for L2s that support PHYs with PHY payloads > 127 bytes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
When LPUART1 is not defined, the driver did not compile even if
any other LPUART was defined. This patch fixes that.
Signed-off-by: Nando Galliard <nando.galliard@protonmail.com>
Updated the Async API allowing the code path
for DMA while Async is enabled. Added common
DMA function that sets up both tx and rx dma
channels.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Annotate the calculation with type casts to force
promotion to uint32_t and then cast back down
to uint16_t for the return. This solves the issue
with invalid voltage (mV) values being returned
due to overflow during the conversion from the
register value on the max17048 chip.
Signed-off-by: Martin Calsyn <martin.calsyn@outcomex.com.au>
There is no fallthrough statement or comment so I assume break is
missing.
Fixes build time warning from some tools.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Currently the Kconfig for eth_mcux selects nocache if
HAS_MCUX_CACHE is set. But, for platforms that have a flexspi
cache but not a CPU cache, this is invalid, so clarify this
in the Kconfig definition.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This reverts commit 1c2d326579.
which was limited to CONFIG_UART_ASYNC_API=y case and causing regression
otherwise.
Fixes#63885
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add option for overriding the maximum number of wait loop iterations for
entering/leaving freeze mode. Set the default to 10000 (as opposed to a
default of 1000 used in the HAL).
Fixes: #56171
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
i2c_rcar.c includes soc.h header which doesn't need for this source
and exists not for all boards. soc.h header doesn't exist for rcar-gen3
soc based on arm64 core.
soc.h consists soc-depended defenitions and need to be included
by soc-depended sources.
Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Only copy frame data for non-RTR frames as RTR frames do not carry any
data. The limitation of how much data to copy is currently handled in the
NXP HAL.
Fixes: #57002
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Only copy frame data for non-RTR frames as RTR frames do not carry any
data. Limit the amount of data copied to the actual DLC.
Fixes: #57002
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The k_mem_block structure has been obsolete for some years with
a few loose ends still remaining. As its usage in the usb_dc_mcux
codebase was confined to needing its "void *" pointer field, it
was simple to enough to hoist that field to remove another loose end.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If the channel was used for 16bit in the once, subsequent 32bit sample size
audio will be broken since the SCS bit remains set.
Example sequence with SOF:
normal audio playback with 16bit
ChainDMA audio playback with 16bit
normal audio playback with 16bit
The last playback results garbled audio.
Introduce intel_adsp_hda_set_sample_container_size() helper function
to handle the SCS bit and use it in the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
- if we have input enable use CY_GPIO_DM_xxxx else
CY_GPIO_DM_xxx_IN_OFF;
- added bias_high_impedance option
- Updated HIGHZ drive mode, now it sets if:
--- we have bias_high_impedance
--- or if input_enable and no addition bias mode
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
This driver uses the math library, so it cannot use the minimal C
library. However, it should be fine with any complete C library, not just
newlib.
Signed-off-by: Keith Packard <keithp@keithp.com>
The macro K_THREAD_STACK_MEMBER has actually been deprecated
since v2.4.0 in the macro doxygen description, but it was
never marked with __DEPRECATED_MACRO. Since this was being
used in various drivers, make it follow the deprecation
process.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit adjust the chat scripts for the simcom
sim7080 and gsm_ppp compatibles to fix an issue found
when trying to use a sim7080 modem. The CMUX command
includes optional parameters which are not identical
for all modems, so the AT+CMUX command has been adjusted
to only contain the mandatory parameters.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Extend the NXP S32 GPIO driver to be able to route external interrupts
to either SIUL2 EIRQ interrupt controller or, when available on the
SoC, WKPU interrupt controller.
Since WKPU can support up to 64 external interrupt sources and SIUL2
EIRQ up to 32, gpio_get_pending_int() is removed and the interrupt
controller specific API must be used instead.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Introduce an interrupt controller for the NXP S32 WKPU peripheral
that can be integrated with GPIO to trigger interrupts through
external interrupt pad inputs.
WKPU can trigger interrupts from certain input pads that support this
function, as well as wake-up events to the power management domain. This
patch only adds WKPU functionality as an interrupt controller to extend
the number of input pads that can interrupt the core. Power management
functionalities are not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
There is inherent race condition between i2s_nrfx_write() and I2S
interrupt handler because I2S operates independently from the rest
of the system. If software takes too long to supply next TX pointer
then nRF I2S peripheral will simply resupply the previous buffer.
The race window is rather short. The failed race executes as follows:
1. i2s_nrfx_write() checks state and loads next_tx_buffer_needed
2. I2S interrupt handler executes and calls data_handler() which
notices empty TX queue and therefore sets next_tx_buffer_needed
3. i2s_nrfx_write() continues with the queue TX path (because the
next_tx_buffer_needed was false when it was accessed)
If next i2s_nrfx_write() executes before next I2S interrupt:
4a. i2s_nrfx_write() notices next_tx_buffer_needed is true and
supplies the buffer directly to I2S peripheral. Previously queued
buffer will remain in the queue until the just supplied buffer
starts transmitting. Effectively swapping whole I2S block leads to
clearly audible artifacts under normal circumstances.
If next I2S interrupt executes before next i2s_nrfx_write():
4b. data_handler() notices that buffer was reused and stops despite
having a buffer available in TX queue
Modify i2s_nrfx_write() to always queue the TX pointer first and only
supply the buffer to nrfx if the queue was empty when interrupt handler
executed. This prevents both the out-of-order TX and premature stop.
Fixes: #63730
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
When SPI is enabled, pinctrl driver configures all the pins in UART pinctrl
config as gpioModeDisabled.
Signed-off-by: Rihards Skuja <rihards@skuja.eu>
Since #53979, runtime PM can be applied on serial device used by console.
While it should be transparent on serial driver side as the application
(console in this case) is driving the PM runtime requests, on STM32
it requires some modification on serial driver as UART interrupts are
generated to handle internal power management house cleaning.
When these interrupts are generated, PM runtime should also be driven
to ensure clock availability when treating the uart ISR.
On STM32, some additional changes are required
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
There seems to be a copy-paste error where GetDMAError() et al is used
twice. The comment states that it is actually getMACError() et al that
should be used in the second instance.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
When backlight pin is not defined, a display suspend will cause
a crash since it looks at the wrong pin when deciding if
it exists.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
rand32.h does not make much sense, since the random subsystem
provides more APIs than just getting a random 32 bits value.
Rename it to random.h and get consistently with other
subsystems.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Limit the number of the copied ssid to WIFI_SSID_MAX_LEN
and avoid a possible one byte overflow.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Per the MX25UM51325G datasheet, all page programs in OPI DTR mode need to
start at an even address, and be of even length. Update the minimum
write size reported by the driver and check all writes when OPI DTR mode
is enabled, so that subsystems using the flash driver can align to this
requirement.
Fixes#63639
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The can_sja1000_handle_error_warning_irq() function should only attempt to
start bus-off recovery, but not wait for the result.
Fixes: #63712
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Ensure that the Bluetooth rpmsg driver thread is temporarly in
cooperative mode using `k_sched_lock`.
The previous commit added the documentation on `bt_recv` stemming from
the general consensus among maintainers that `bt_recv` may not be called
from preemptible priorites.
Many uses may be affected by this race condition, since the default
configuration of rpmsg driver selects a preemtible priority.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The desired current/voltage properties make use of milliamps/volts while
the present current/voltage properties make use of microamps/volts.
Fix the desired current/voltage properties to be consistent with the
present current/voltage properties where they're most likely to be used
with.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Fix a build warning on 64 bit architectures:
zephyr/drivers/sensor/default_rtio_sensor.c:238:17: error: format '%zu'
expects argument of type 'size_t', but argument 2 has type 'uint32_t'
{aka 'unsigned int'}
num_channels type changed to uint32_t in 96175fcc47.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the integer arithmetic to divide first before multiply.
The muliplication of sys_clock_hw_cycles_per_sec() by ten leads
to a really big number on boards with high-speed clocking, thus
to the overflow warning, and to errors for integration tests.
Fixes: #63678
Signed-off-by: Stephan Linz <linz@li-pro.net>
Do not propagate unused parameter. ISR callback is already handling
the given flags, there is not need to propagate it through internal
calls.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
get_entropy_isr() has to return the number of bytes copied or
a negative value in case of error.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Return -ENODATA in neorv32_trng_get_entropy_isr when
there is no data available. This is consistent with other
drivers.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
get_entropy_isr() has to return the number of bytes copied or a negative
value for error. Since this driver is assuming that it will always
(????) get the number of requested bytes, change the function to return it
instead of 0.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit fixes the following issues with the PCM data format output
by the MCUX SAI driver:
- WS signal should be only one clock cycle in length for short PCM
format
- Word count should not be fixed to 2, except for classic I2S format
- BCLK polarity should be on falling edge for PCM long and short format
Additionally, the I2S_FMT_CLK_ constants now flip the frame and bit
clock polarity from the normal value expected for the selected I2S
format, as expected by the API.
Fixes#63041
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
When upgrading to version 3.4, our hardware lost ethernet connectivity.
Our hardware assumes a fixed link and does not communicate with the
underlying phy via the mdio bus.
I confirmed that the atsame54_xpro board also will lose ethernet
functionality when the atsame54_xpro configures the phy via to use a
fixed link...
The eth_sam_gmac driver changed the initialization behavior to call
net_if_carrier_off and notes to wait until phy link is up (via
callback.) However, when in a fixed link configuration, the callback is
never called. So the net_if_carrier_on event never occurs.
This patch adds a check to see if link is up already before calling
net_if_carrior_off. This check works because in fixed-link mode, link-up
is set synchronously during phy driver initialization.
I tested that atsame54_xpro with fixed-link configuration will now work
after this patch.
Signed-off-by: Thomas Chiantia <thomas.chiantia@gmail.com>
Remove excessive debug logging from the SJA1000 driver backend. Logging
each register access makes generic CAN debug logging unusable.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add padding to the header and remove unnecessary memset in order to fix
alignment faults in cores such as M0 or ones that support
CONFIG_TRAP_UNALIGNED_ACCESS
Signed-off-by: Yuval Peress <peress@google.com>
The rpmsg_close() call uses the HCI reset command to reset the
controller. But when building as controller-only we do not bring in the
infrastructure to send HCI commands (nor should we) and rpmsg_close()
will not be called anyway.
Fixes#63534.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The code is designed to handle RF0L and RF1L in
line 1, but they were being sent to line 0. Becuase
they weren't handled, the interrupts would never
be handled which locked up the chip.
Signed-off-by: Abram Early <abram.early@gmail.com>
Prevent use of isochronous endpoints as bulk and/or interrupt endpoint.
The issue was observed when trying to use 4 CDC ACM instances where the
4th instance would claim the isochronous IN endpoint 0x88 to be bulk.
Because the isochronous endpoints cannot respond with handshake packet
the iso endpoints cannot be used as bulk or interrupt substitue.
Properly fail endpoint check and therefore make 4 CDC ACM instances not
enumerate at all because the hardware has endpoints that only allows up
to 3 CDC ACM instances.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The PCA9633 i2c LED controller offers an All Call address in its nominal
operation, allowing simultaneous communication with all instances present
on the same i2c bus. The default address is 0x70. While this functionality
is convenient, it is possible that the board uses another i2c component
that also uses this address (for example, the shtcx). In such cases, the
address conflict prevents the proper functioning of the system.
The idea is to add a "disable-allcall" property to the device tree. If this
option is present, the initialization of the PCA9633 forces the bit 0
(ALLCALL) to be set to false, thereby disabling this function. It is
necessary to add this property to all PCA9633 devices on the bus to free up
the address 0x70.
Signed-off-by: Steve Jacot-Guillarmod <steve@piziwate.net>
When the legacy LLCP implementation was removed this Kconfig option was
mistakenly left over. Remove it now with all its users.
Fixes#63212.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
`last_load` is the full N cycles and `SysTick->LOAD` should
be loaded with `last_load - 1` for the calculations work
correctly.
Note: This only affects a kernel in ticked operation.
Tickless kernels periodically restart the timer correctly.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The existing implementation did not properly
handle when `SysTick->VAL` is zero.
This caused three subtle edge cases:
* val1=0,COUNTFLAG=0,val2=0
This should result in no cycles elapsed,
however `(last_load - val2) = last_load`.
So an extra `last_load` cycles was returned.
* val1=0,COUNTFLAG=0,val2=(last_load-1)
This should result in 1 cycle elapsed,
however `val1 < val2` so an extra `last_load`
cycles was returned.
* val1=[2,1,0],COUNTFLAG=1,val2=0
This should result in `last_load` cycles elapsed.
However, `last_load * 2` cycles was returned.
To fix the calculation, val1 and val2 are first
wrapped/realigned from [0:last_load-1] to [1:last_load].
Tidy comments to better reflect the SysTick
behaviour and link reference manuals.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The workaround for the nRF52 anomaly 109 that is implemented in
the nrfx_pwm driver uses interrupts generated by a selected EGU
instance and by the enabled PWM instances (even if the interrupts
are not used in generation of the PWM output signals).
Add required IRQ_CONNECT calls so that those interrupts are
properly handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not only the return code of TI's RF command queueing mechanism but also
the command status need to be checked to assert that a command was
executed successfully. This change introduces additional checking of the
command status.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The frequency synchronization command requires a proper frequency to be
set in order to be successfully executed. The command not being executed
leads to unnecessary internal error handling wrt command scheduling.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Moves the RX callback closer to where it's actually being used also
removing the necessity to declare a function prototype.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver API now distinguishes between operational UP/DOWN states as
required by Zephyr's network API and receiver on/off states as an
internal driver state for improved standard conformance.
This change closes the gap between the driver API requirements and the
implementation in this respect.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Replaces the mutex by a semaphore for ISR readiness as requested by the
driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Checks whether the receiver is already on before trying to switch it on.
This also closes a gap wrt the driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Restructuring and renaming of driver-internal functions for improved
readability and maintainability:
- distinguish between externally exposed API methods
(cc13xx_cc26xx_sub_* prefix) and internal helper methods
(drv_* prefix).
- extract a few functions to reduce complexity and improve re-use
Also removes unnecessary initial runtime blanking of static (.bss) data
in the newly introduced extracted buffer initialization functions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The pre-alloacted size of the buffer for the SHA ROM API code increases
in npcx4 chip. This commit adds a new property context-buffer-size to
sha0 DT node in npcx9 and npcx4 separately. The driver can pre-allocate
buffer with the correct size based on the property.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Fixes an issue that reload mode is not disabled in case of an error.
From this case the driver could not recover because in msg_init()
no new transfer could be initialized.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Since 2f003e59 reworked the structure of k_mem_slab information fields,
we need to update the logging statements in the i2s_mcux_sai driver to
access these fields correctly.
Fixes#63527
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Different nRF52 devices have different maximum TWI DMA transfer size,
and it's easy to hit the limit with i2c displays on nrf52832 (8 bit) and
nrf52810 (10 bit). Currently neither the driver or the hal validate the
limit, leading to random NACK errors when trying to transfer more data.
Add a check on the driver to fail gracefully when going over the limit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define all the register offset directly in the driver according
to the RISCV PLIC specification as they are not configurable,
see: https://github.com/riscv/riscv-plic-spec.
Updated devicetrees that has PLIC accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Removing the edge-trigger Kconfig as it is supported by default
in the RISCV PLIC specifications.
Define the edge-trigger register offset in the driver instead
of retrieving the value from devicetree as it is not something
configurable. The value 0x1080 is defined in Andes & Telink
datasheets.
Updated build_all testcase.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Previously, the uart_emul device did not support interrupt-driven
receive, which is an unwritten requirement for hooking up a uart to
the Zephyr console driver.
The console is a fairly high-traffic subsystem, and we should be able
to perform more extensive testing on it, aside from maching twister
output against a regular expression. With this change, we can use
the emulation uart within the body of a ZTest.
Testing Done:
```shell
west build -p auto -b qemu_riscv64 -t run tests/drivers/console_switching
...
*** Booting Zephyr OS build zephyr-v3.4.0-4277-gae0d63471be1 ***
Running TESTSUITE console_switching
===================================================================
START - test_read
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
PASS - test_read in 0.005 seconds
===================================================================
START - test_write
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
PASS - test_write in 0.003 seconds
===================================================================
TESTSUITE console_switching succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [console_switching]: pass = 2, fail = 0, skip = 0...
- PASS - [console_switching.test_read] duration = 0.005 seconds
- PASS - [console_switching.test_write] duration = 0.003 seconds
------ TESTSUITE SUMMARY END ------
===================================================================
PROJECT EXECUTION SUCCESSFUL
```
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Zephyr's code base uses MP_MAX_NUM_CPUS to
know how many cores exists in the target. It is
also expected that both symbols MP_MAX_NUM_CPUS
and MP_NUM_CPUS have the same value, so lets
just use MP_MAX_NUM_CPUS and simplify it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The instruction length can only be 0~5.
Use am_hal_iom_blocking_transfer and specify clearly the TX/RX direction.
Hold CS to continue to RX expected response after instruction transmission.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The commit fixes the SPI mode improper configuration.
Otherwise the MODE_3 and MODE_0 cases would never be entered as expected.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Flash is clocked with HCLK, while CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
reflects SYSCLK. HCLK = SYCLK / AHB prescaler.
When dealing with flash latency, use HCLK instead of SYSCLK.
This changes reverts a abusive change done in an old commit (efd8ee465c)
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Latency should be set before HCLK clock increase. Not doing so can result
in broken behavior.
For instance, at startup, MSI is @4MHz on L4 series.
If MSI is required to be configured at 48 MHz for future use a USB clock,
this will be done in set_up_fixed_clock_sources(). If flash latency is
not correctly set at this point fetching flash will fail..
Move flash latency configuration before setting up fixed clocks.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit adds a timeout of 300ms to the generic (gsm_ppp) init
chat script. This delay is required for some modems (discovered on
a Telit ME910G1-WW) to allow it to enter CMUX mode. Without this
delay, the modem simply refuses to respond to any CMUX commands.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Decouples the generic MII PHY driver from the adin2111 driver by making
it depend on an ethernet-phy compatible devicetree node rather than the
adin2111 driver not being enabled. This makes it possible to add the
adin2111 driver to tests/drivers/build_all/ethernet
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Simplifies the adin2111 ethernet driver to use the generic driver class
initialization priority instead of a driver-specific priority.
Suggested-by: Georgij Cernysiov <geo.cgv@gmail.com>
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
The adin2111 ethernet driver supports both adi,adin2111 and adi,adin1110
devicetree compatibles, however it failed to build when both compatibles
existed in the same devicetree. This may be an unusual configuration for
real systems, but was found when extending
tests/drivers/build_all/ethernet to cover both compatibles.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Remove unnecessary calls to __ASSERT_NO_MSG() in CAN controller driver
timing setter callbacks. The CAN API functions can_set_timing and
can_set_timing_data() already provide run-time timing parameter validation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
I2C scan might fail as peripheral is still busy completing last
operation. This makes sure transfer call waits for free line.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Commit 2f003e59e4 ("kernel: Re-factor k_mem_slab definition") moved
block_size into from k_mem_slab to k_mem_slab_info without updating i2s
handlers. Use the new member to fix build failures.
Fixes: #63363
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The current approach is a bit impractical in the upper layer.
This patch removes the two fifos that hold the transfer buffers
and replaces them with a byte array for the setup packet and
a pointer to a data buffer. The data buffer is mandatory for
all types of transfers except control without a data stage.
The waste of eight unused bytes for non-control transfers should
be insignificant, since an additional pointer would be at least
half of it, and then there would be the overhead of handling it.
This patch also clean up the transfer flags, rename owner to callback
as it reflects the upper layer use case, and add an additional member
to hold the pointer to the USB device (peripheral on the bus).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Aling with the changes in UDC done in the commit ad81b3b797
("drivers: udc: move transfer status to buffer info structure")
This allows us to get the result of synchronous transfer and
simplify uhc_submit_event().
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This continue PR #31270. The updated changes are:
- Updated to work with latest zephyr
- Inplace reads/writes of registers
- Batch read of RX messages when multiple messages can be read
- FIFO abstraction of RX/TEF queues
- Handle ivmif errors
- Use READ_CRC for register reads
- Use bitmasks instead of bitfield members
- Rename mcp25xxfd to mcp251xfd
- General cleanups
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.
The nrf53 pretick requires just one RTC1 CC channel.
The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.
Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.
The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.
Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add RTC pretick option that triggers HW activity one tick before and
RTC event that leads to the interrupt. Option is active only on nrf53
network core.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Rearranges the sys_mem_blocks fields so that information that describes
how much of the memory block is used is co-located. This will allow
easier of its statistics into the object core statistics reporting
framework.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Use clock control API to retrieve the counter module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
add host controller driver support for emmc version 5.1.
The driver expose zephyr sdhc api interface for emmc host controller.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Adjusted the prompt of the load command to make it more obvious that
the user is being prompted for keyboard input.
Signed-off-by: Kelly Helmut Lord <helmut@helmutlord.com>
A little refactoring that simplifies dealing with nanosecond timestamp
values in packets and further decouples calling code from PTP:
Benefits:
- simplifies calling code by removing redundant conversions.
- prepares for removing PTP dependencies from net_pkt.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the STM32 ADC driver
nocache check.
Copied from commit 818aa2d
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This introduces pwm capture shim driver for NXP S32 EMIOS,
the driver uses SAIC mode that is supported for all channels,
to capture the counter value on each edge for period/pulse
measurement
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This prepares support pwm capture APIs by extended current pwm
shim driver but use a differrence hal component:
- Introduce a Kconfig options that will be set when PWM pulse
generation API is used, it is also used to select the hal
component. Guarding current code inside this Kconfig option
- Increase #pwm-cells to 3, flags is supported for PWM capture
- Do not require duty-cycle and polarity be set in dt, PWM
capture doesn't need it.
- Rename emum value for pwm-mode to keep only key information
- Add preprocessor in case no channel is configured for generate
PWM output, to avoid warning when build
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This enables and declares interrupt handlers for eMIOS,
the handlers defined and implemented at HAL, the driver
takes the name for each id from interrupt-names devicetree
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add .close() implementation for the HCI RPMsg driver.
When running on the nRF5340 application core, it will power-cycle the
network core.
Signed-off-by: Pawel Osypiuk <pawelosyp@gmail.com>
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Changes the interpreted unit of the threshold temperatures to match the
description (millidegrees).
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Add "st,stm32-flash-controller" as compatible for STM32H7 so that
what is defined for STM32 in general is also defined for STM32H7.
Already most of the other STM32 versions have this addition.
Also removed the specific STM32H7 flag check in
/flash/driver/Kconfig.stm32.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Updates Ethernet PHY devicetree bindings to be more consistent with
Linux by using the standard `reg` property for the PHY address instead
of a custom `address` property. As a result, MDIO controller bindings
now require standard `#address-cells` and `#size-cells` properties.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Some Ethernet PHYs used the devicetree node name `phy`, while others
used `ethernet-phy`. Be consistent and use `ethernet-phy` throughout.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
For all STM32 ADC that use common sampling times, there is a check made to
ensure that all channels of a sequence use the same sampling time.
The value was not reset between reads, resulting in error if two
consecutive sequences used different values.
This commit adds a reset of this value once read is done.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The number of IRQ first level bits is not necessarily 8 bits
now, so use `CONFIG_1ST_LEVEL_INTERRUPT_BITS` instead of
hardcoded value.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The serial_test.c driver uses size_t to store read_size,
which becomes a 64-bit type when built for 64-bit
architectures. This is incompatible with the print
format %d which is 32-bit. Updated to %zd
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit moves the dependency management between the
RING_BUFFER and UART_ASYNC_API or UART_INTERRUPT_DRIVEN
options to the Kconfig Kconfig.test.
If either UART API options listed are selected, the
RING_BUFFER option must be selected. This is now handled
automatically by Kconfig instead of causing a build
assert.
The asserts where added with this PR #59880, and are
removed in this commit.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit fixes an error where the irq_isr callback is set
to an undefined variable instead of NULL.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Values are specified in the datasheet(page 30, table 18).
Values match with values defined in lsm6dso-common.yaml
Signed-off-by: Jeroen Reeskamp <jeroen.reeskamp@vention.nl>
Update the CAN controller drivers to solely use the sjw and sjw-data
devicetree properties for setting the initial timing when devicetree timing
parameters are specified in Time Quanta (TQ).
Any timing set via the CAN timing APIs will contain either user-provided or
automatically calculated SJW values. This includes any timing parameters
calculated from bus-speed and bus-speed-data devicetree properties.
Update the CAN controller driver tests accordingly and remove the
CAN_SJW_NO_CHANGE definition as it has lost its meaning.
Fixes: #63033
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Change the CAN timing calculation APIs to automatically calculate a default
(Re-)Synchronization Jump Width (SJW) value. The calculated value can be
overwritten by the caller if desired.
This allows automatically scaling the SJW according to the number of Time
Quanta (TQ) used for phase segment 2 instead of relying on a compile-time
fallback value defined in devicetree.
This reduces the can_set_timing()/can_set_timing_data() API functions to
simple setters (with validation).
Fixes: #63033
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix wrong debug message when port B of tachometer is captured.
Signed-off-by: Evan Chang <MCCHANG1@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This allows testing code that uses the UART interrupt-driven API and
UART asynchronous API.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Zephyr increments the gain until it reaches the maximum value and
then sets the registers to zero which is incorrect.
The values set in the DMIC config should be restored.
Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
Add `mdio_read_c45()`/`mdio_write_c45()` APIs for Clause 45 access
and remove the `protocol` MDIO binding property so that MDIO bus
controller can support more than one protocol.
A new MDIO header is introduced with generic opcodes, MMD and
registers addresses, to be used by MDIO and PHY drivers.
Existing MDIO drivers that support both Clause 22 and Clause 45
access are migrated to the new APIs.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Rename argument `devad` to `regad` to indicate this is the register
address in a given PHY device and to not be confused with the
Clause 45 device address within a port.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
When slave_address is 10 bits, data type should be
uint16_t instead of uint8_t,
like the data typeof data->slave_cfg->address.
https://github.com/zephyrproject-rtos/zephyr/issues/55987
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On S32K344, the offset in memory map between each channel
is 0x4000 for most channels, but there is specific case is
between channel 11 and 12 which is 0x1D4000 instead. As a
consequence, 32 channels are divided to two parts: one
starts from channel 0 -> 11. The other is from channel 128
to 145. The channel gap is from 12 -> 127.
For user and data structures in shim driver, the channel's
value comes from 0 --> 31. Above constraint will be counted
when interact with the mcux sdk
Beside that, the DMAMUX register in this platform is very
specific, not in identical with DMAMUX channel, so shim
driver is updated to cover this case
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add new dt binding for edma v3 that inherits whole dt
properties from current version. One more property is
added for SoCs that don't have separate error interrupt
id, use same id with channel interrupt
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
The current implementation iterates over all channels
even if only several channels share the same irq. This
introduces one more dt property to describe an offset
between two channels share the same interrupt id.
Beside that, the error interrupt must be put as last
element of "interrupt" dt property.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
The dma-channels devicetree value - 1 = maximum valid channel
The dma-requests devicetree value - 1 = maximum valid request
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
A buffer overflow happens in send() when size is negative because
it is promoted to signed when used in memcpy.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the driver is passing the whole buffer, let's zero it to avoid
pass garbage in case of size != buffer's size.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
It is possible to happen a buffer overflow in ipm_send due the lack
of a checking for negative value.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the driver is passing the whole buffer, let's zero it to avoid
pass garbage in case of size != buffer's size.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
It is possible to happen a buffer overflow in ipm_send callback
due a wrong comparison between signed/unsigned types.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replaces the previous approach to define bands via hardware capabilities
by the standard conforming concept of channel pages.
In the short term this allows us to correctly calculate the PHY specific
symbol rate and several parameters that directly depend from the symbol
rate and were previously not being correctly calculated for some of the
drivers whose channel pages could not be represented previously:
* We now support sub-nanosecond precision symbol rates for UWB. Rounding
errors are being minimized by switching from a divide-then-multiply
approach to a multiply-then-divide approach.
* UWB HRP: symbol rate depends on channel page specific preamble symbol
rate which again requires the pulse repetition value to be known
* Several MAC timings are being corrected based on the now correctly
calculated symbol rates, namely aTurnaroundTime, aUnitBackoffPeriod,
aBaseSuperframeDuration.
In the long term, this change unlocks such highly promising functional
areas as UWB ranging and SUN-PHY channel hopping in the SubG area (plus
of course any other PHY specific feature).
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Aligns the name of the return value variable with what is used elsewhere
in the driver and the subsystem for improved readability and
consistency.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Preparative change to introduce build-time configured channel pages.
This fixes the description of the driver's available PHYs and makes
channel page and channel range independent from runtime attributes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
SPI API allows `spi_buf_set` structures with no buffers linked to them
(with `.buffers = NULL`). Correct the spi_nrfx_spis driver so that it
is able to deal with such structures.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Based on review of the similar charger driver API, it's been demonstrated
from the community that embedding a per value property type when fetching
properties. Separating off the property types from the property values
themselves also allow an array of property types to declared as static
const.
Break up fuel_gauge_property struct into a fuel_gauge_prop_val union and a
fuel_gauge_prop_t property type as inputs into fuel gauge API functions.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Based on review of the similar charger driver API, it's been demonstrated
from the community that embedding a per value status code when fetching
multiple properties isn't particularly wanted or needed. It was largely
considered not worth the additional maintenance to have the extra per
property error information.
Remove the status field from the fuel_gauge property value structs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The fuel_gauge_set_prop() function prototype declares a function that sets
multiple fuel gauge properties at once. The naming suggests it ought to
fetch a singular property at a time. Moreso, some clients may just want to
set properties one at a time and may feel uncomfortable using a prototype
for fetching multiple properties when wanting to fetch them one at a time.
Modify fuel_gauge_set_prop() to fetch a single property and add
fuel_gauge_set_props() to support fetching multiple properties. Modify
existing tests/drivers/samples.
This is part of #61818 work.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The fuel_gauge_get_prop() function prototype declares a function that
retrieves multiple fuel gauge properties at once. The naming suggests it
ought to fetch a singular property at a time. Moreso, some clients may just
want to fetch properties one at a time and may feel uncomfortable using a
prototype for fetching multiple properties when wanting to fetch them one
at a time.
Modify fuel_gauge_get_prop() to fetch a single property and add
fuel_gauge_get_props() to support fetching multiple properties. Modify
existing tests/drivers/samples.
This is part of #61818 work.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
When radio is set to promiscuous mode it is desirable to receive
invalid frames. This skip a few checks and allow an invalid and
non-standard frames be delivered for diagnose.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The i2c_ll_stm32_v2 driver requires manual timing configuration for
"fast mode plus" speed.
This adds an error message linking to the appropriate documentation.
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
While recent browsers seem to transparently try to use https for
http://www.st.com/... URLs, they are effectively not working anymore, so use
https://www.st.com/... URLs instead.
curl http://www.st.com/en/evaluation-tools/nucleo-g070rb.html -m 5 -v
* Trying 104.89.117.48:80...
* Connected to www.st.com (104.89.117.48) port 80 (#0)
> GET /en/evaluation-tools/nucleo-g070rb.html HTTP/1.1
> Host: www.st.com
> User-Agent: curl/8.1.2
> Accept: */*
>
* Operation timed out after 5002 milliseconds with 0 bytes received
* Closing connection 0
curl: (28) Operation timed out after 5002 milliseconds with 0 bytes
received
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This commit does not introduce any functional change to the
codebase. Just removes certain redundant checks from
various CMakeLists.txt files in order to bring more coherence
in the codebase.
Signed-off-by: Jilay Pandya <jilay.pandya@zeiss.com>
Send a fw ready reply message as soon as possible.
This is usually used on host side which is waiting
for this message in order to establish the
communication with the remote processor - see
imx_dsp_rproc driver from Linux.
This can be enabled by IPM_IMX_FW_READY_REPLY config,
which is by default N.
Set CONFIG_IPM_IMX_FW_READY_REPLY as Y for
openamp_rsc_table sample, running on nxp_adsp_imx8m.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Refines the `system_mm.h` to include `zephyr/types.h` instead
of `zephyr/kernel.h` as that is all it needs.
Updated the includes of `mm_drv_ti_rat.c` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Based on RM0456, each PLL in the STM32U5 has the
capability to work either in integer or fractional mode.
In this update, the fractional mode can be enabled
by setting the fracn value in the device tree.
Signed-off-by: Jatty Andriean <jandriea@outlook.com>
Split the read function into 2 versions (date and no date) since they
don't have common code.
It improves readability.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Add support for using the sub second registers. It allows reading and
setting alarm with the sub second tick resolution.
The RTC module is configured to get as high frequency as possible, which
equals the source clock (RTCCLK) divided by 2. To get such frequency,
the asynchronous prescaler is set to 1.
According to RM, setting the asynchronous prescaler to a high value
minimize consumption, so the change increase the power consumption.
Use a config to enable the sub second support.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
RTC drivers uses only seconds, so transition to microseconds is
necessary.
Change way of calculation tick<->time to avoid unnecessary
conversations.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Synchronize reading two separate registers. In some edge cases the read
registers could point different dates.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The config values have been hardcoded as magic values. Introduce
universal calculation based on the DTS entries.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This separates the DT device init macros into two: one for
UART accessed via IO port or MMIO, the other for PCIe UART.
All the conditions needed to setup the device structs are
getting complicated. Hopefully separating them would make
them easier to decode, and to avoid the conditions having
too many levels.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of PCIE0 and PCIE1, use no suffix for IO port/MMIO IRQ
configuration funct, and suffix PCIE for IRQ config on PCIE
bus.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use CODE_CODE_1() instead of macro trampolines when
CONFIG_UART_NS16550_PARENT_INIT_LEVEL is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Using COND_CODE_1() is more intuitive when looking at the code,
instead of some macro trampoline magic.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This simplifies DLF and PCP enabling devicetree macros with
DT_ANY_INST_HAS_PROP_STATUS_OKAY() instead of the complicated
ones.
Also, this moves the macro to initialize struct elements into
the struct initializer itself. This makes it clearer on which
element is being initialized directly inside the struct
initializer instead of having to do mental macro trampoline
to find the correct macro.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Enabled intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS I2C to transfer and
receive data.
Signed-off-by: Bindu S <bindu.s@intel.com>
Introduce support for Texas Instruments TMAG5170
high-precision linear 3D Hall-effect SPI sensor.
This driver allows to configure measurements on
magnetic and temperature channels. It is also
possible to read rotation of the magnet.
Signed-off-by: Michal Morsisko <morsisko@gmail.com>
Added usage of dma_parent phandle instead of using parent-child
method to get DMA base address.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Adds initial support for hm330x dust sensor series. Allows to read PM1,
PM2.5 and PM10 concentrations in atmospheric environment. A further
update to the driver may add support for also reading "standard" CF1
concentrations by exposing of a custom sensor attribute or a Kconfig
option. Tested with Grove - Laser PM2.5 Sensor (HM3301) attached to a
Wio Terminal.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Enable backends by default, instead of requiring some other module to
turn them on. This aligns with the behaviour of sensor drivers and
`BT_RPMSG`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Be explicit about the HCI backend that Bluetooth unit tests require.
Some unit tests depend on `BT_HAS_HCI_VS`, so also enable that.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
DT_DRV_COMPAT was unused for this driver. To get a node identifier
DT_NODELABEL() macro was used. Refactor to use the correct interfaces
using instance number 0.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The at86rf231 frame buffer access mode read differs from all other
transceivers by only transfer one more byte after PSDU data instead
three. This difference is not evaluated in the current version of
the driver. The current change add the necessary check and read the
missing data (EQ, TRAC).
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Previously, the `uart_console_isr()` routine assumed that the
return value of several uart API functions would only ever
return the equivalent of a boolean value. In fact, an integer
is returned on occasion, and that integer can take on many
values.
Since unary operations would either go to "true" or "false"
and since any non-zero integer evaluates to "true", even a
return value of something like `-ENODEV` would evalueate
to true.
Explicitly compare against the integer-equivalent value of
the expected boolean output.
With this, in the case of errors, negative return values do
not evaluate to "true", and the infinite loop is avoied.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Currently, the driver imply understand that all instances
will use dma when CONFIG_SPI_MCUX_LPSPI_DMA is set. There
might be an instance doesn't need DMA, so instead of enforce
spi_transceive API to use DMA, add more flexible to enable
DMA only when required
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
When the alternate setting is configured as func3, in addition to
the setting of func3-gcr, some pins require external setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Implement the RTIO/Sensors V2/Async API for the AKM09918C. Add a decoder
API implementation as well.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Update the decoder APIs to vertically decode the raw sensor data. This
means that instead of getting each channel on a frame by frame basis,
the API takes a channel specifier and returns as many frames of that
given channel as there's room.
The goal of this is to make the end decoded result the most useful and
usable for the Zephyr application. See #60944 for details.
Signed-off-by: Yuval Peress <peress@google.com>
With update to handle DSI transfer length in MIPI_DSI driver, the logic
can be removed from the RM67162 driver. The driver now will simply
continue writing data until the full buffer is sent.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for SMARTDMA transfers, and byte swapping of RGB565 data.
Additionally, the limits on TX data size have been impelemented in the
MIPI DSI driver, as opposed to the RM67162 display where they were
previously added.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce SMARTDMA dma driver. The SMARTDMA is a peripheral present on
some NXP SOCs, which implements a programmable DMA engine. The DMA
engine does not use channels, but rather provides a series of API
functions implemented by the firmware provided with MCUX SDK.
These API functions can be selected by the dma_config slot parameter. A
custom API is also provided to allow the user to install an alternate
firmware into the SMARTDMA.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Limit DSI data TX to the max payload size possible with this peripheral,
rather than relying on display drivers to respect this limitation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix the assignment of initial CAN bus timing parameters for the CAN-FD data
phase.
Fixes: #62979
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add MDIO driver that works through GPIO pins. This driver is
useful when a microcontroller doesn't have MDIO bus or when multiple
separate MDIO buses are required. The driver provides access to
the MDIO bus through GPIO pins for any SoC that has GPIO pin control
available.
Signed-off-by: Aleksandr Senin <al@meshium.net>
Switch from using DEVICE_DT_DEFINE()/DEVICE_DT_INST_DEFINE() to using
CAN_DEVICE_DT_DEFINE()/CAN_DEVICE_DT_INST_DEFINE() for remaining drivers.
This unifies CAN controller device driver initialization regardless of the
driver implementing CAN statistics support or not.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove CHANNEL_COUNT limit used to check the channel bitmask.
This value was not applicable on STM32L1 where channel can go up to 31.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove unwanted "pm_device_runtime_get" lock which makes i2c power
management working incorrectly.
Fixes: #62790
Signed-off-by: Petr Hlineny <development@hlineny.cz>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This fixes the following compile time warning;
drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument
of type 'void *', but argument 2 has type
'long unsigned int' [-Werror=format=]
__ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The PIT maximum load value may not be always 32-bit. Allow the SoC to
define this value from devicetree.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Depending on the SoC design, the PIT channel interrupts can be
individual or OR'ed together to a single interrupt line.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This periodic timer (PIT) has a single load value register for each
channel, which is currently used for both alarm and top callback APIs.
If using both APIs together (which is a valid use-case) it will write
to the same register causing unexpected behavior of the timer.
The nature of the PIT is to trigger an event (like interrupts) at a
certain rate, and not to produce single-shot events. Hence keep only top
callback functionality.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This is a specific case for NVMe where given data buffer pointers must
be dword (4 bytes) aligned.
There is no virtual memory management between the user thread and NVMe
driver (which one could detect such wrong alignement on physical memory
and thus reallocate the memory properly, so it would be fully
transparent for the user thread), thus the need to push that check to
the user.
This has been going under the radar so far as Qemu does not seem to
follow NVMe specifications where PRP1 (in DPTR) must always be
dword-aligned. It really does not follow the rule: specifications
details that if bits 1:0 of PRP1 are set, the controller may generate
an error or treat the address as if these bits were unset. Seems like
a bug in Qemu, I did not check the code there however.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Former way was difficult to read, so let's have a better way which
easily follows the specifications.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will provide a detailed error status report.
As for most of the original code of the driver, this is a backport of
the work done by Jim Harris in FreeBSD.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE, this allows the build
system to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Adjust some DT_INST macro as well while at it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Fix an incorrectly declared compatible and adjust some DT macros as
well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
On some STM32 families (such as F4), temperature and Vbat sensor share the
same ADC channel, which can lead to conflict when reading them, and wrong
measurement can follow.
To alleviate this problem, this commit moves the setting of the common
path internal channel to the sensor drivers themselves instead of doing
it in the ADC driver.
The teardown is still done in the ADC driver, systematically, instead of
channel by channel (which has the same result).
By moving this logic in the sensor drivers, the properties temp-channel,
vbat-channel and vref-channel becomes useless and are thus removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Introduce hwinfo driver for Texas Instruments SimpleLink CC13xx/CC26xx
SOC series, with support for retrieving device's ID and cause of reset.
By default, the pre-programmed, 8-bytes length IEEE MAC address is used
for device's ID, with option ('HWINFO_CC13XX_CC26XX_USE_BLE_MAC') for
use 6-bytes length BLE MAC instead. By default, read-only values stored
in FCFG (Factory Configuration) are used but additional Kconfig option
('HWINFO_CC13XX_CC26XX_ALWAYS_USE_FACTORY_DEFAULT') is also provided,
which allows to use values from writable CCFG (Customer Configuration)
area. In all cases, device ID value is provided in big-endian which
matches what TI's UniFlash tool returns.
For reset cause, 'SysCtrlResetSourceGet()' function from TI's driver
library is used and its value is mapped to Zephyr's implementation.
Importantly, only root cause of reset is available on CC13xx/CC26xx
platform as described in MCU Technical Reference Manual ('RESET_SRC'
field in 'RESETCTL' register):
"Shows the root cause of the last system reset. More than the
reported reset source can have been active during the last
system reset but only the root cause is reported."
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add CAN stats for MCAN drivers.
Update MCAN drivers to use CAN_DEVICE_DT_INST_DEFINE
which initialises and registers CAN stats if enabled.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
A file just named `init.c` is not that descriptive inside of a project
that has a lot of files of already. Rename to `ethos_u.c`.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The Ethos-U driver was using IRQ_DIRECT_CONNECT. This is not what the
driver needs as this will not detect a context switch when coming out
of the isr, and this is needed as the isr will release a semaphore.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add phandle prop to reference any regulator that must
be enabled in order for the LPADC to function as intended.
Change LPADC driver to use this property if present.
LPADC on LPC55S36 depends on VREF peripheral, enable for this platform.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add binding, include header, and driver for NXP VREF IP block.
NXP VREF is an internal voltage reference generator on some SOCs
that fits well with the regulator API in zephyr.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When timer calibration for SmartBond(tm) was added, opaque type
clock_control_subsystem_t that used to have device tree ordinal
number was changed to enum to allow values that are not in device
tree (like no clock selection).
During this process counter driver for SmartBond(tm) was not updated
accordingly, resulting in wrong frequency being reported to counter
driver.
Failure could be seen when samples/drivers/counter/alarm was execute on
da1469x_dk_pro board.
With this fix counter driver uses correct type when
clock_control_get_rate is called and counter test works again.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Add an explicit include of zephyr/arch/cpu.h before fsl_clock.h so that
the Zephyr cpu definitions are parsed before the hal ones.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
PRE_KERNEL_1 is more suited for dealing with devices, so move out of
EARLY.
Verified on hardware and things seem to behave the same. Something was
changed since this was first introduced as this was not possible for
some reason.
Fixes#62627
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added ability to read contents of TMP116 configuration register by adding
an attribute get function that supports the SENSOR_ATTR_CONFIGURATION
option. Followed the same approach as the TMP108 driver. Interpretation of
the returned value is left up to the caller.
Tested using Nucleo-F401RE and Temp-Log 2 (TMP116) click board and
confirmed a read of the configuration register returned the expected
value.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
The Cat.1 STM32L1 MCUs do not provide the subsecond feature. This disable
subsecond related code for these MCUs.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
STM32 BBRAM depends on RTC to work. This changes STM32 RTC init stage to
PRE_KERNEL_1 to allow RTC driver to initialize before BBRAM driver.
Some adjustments are made so that kernel API is not used during the init
procedure.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
Modify STM32H7 SPI driver so that it updates the rx/tx
pointers correctly (depending on the frame size) when DMA
is enabled. Also, make the dummy rx/tx buffer cache-coherent.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
The way of setting a nocache region in devicetree has changed.
Adapt the H7 SPI driver to this new circumstance.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
This commit fixes an issue with the nrfx uarte driver to allow the
async and interrupt driven UART APIs to coexist on different uart
instances. As both APIs cannot be used simultaneously for a given
instance, there is no need to handle
CONFIG_UART_EXCLUSIVE_API_CALLBACKS in this driver.
Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
There was a new Kconfig for USB-C init priority that is conflicting
with currently used Kconfig for init of VBUS and TCPC.
This commit changes the names to more specific related to the subsystem
they belong to.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The SDK function ENET_SetCallback is deprecated and has
been removed in the latest SDK.
Update the driver to set the callback during Init by using
the callback config param.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
bsearch() tries to find the exact match for the key, otherwise it
returns NULL. However, here we want to find two elements our key lies
in-between. This requires some rather complicated logic that pretends
it found the exact match even if it didn't. Replace this with a simple
implementation of binary search.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
The value of n_comp is wrong for ntc-thermistor-generic. Introduce a
helper macro to compute n_comp correctly for both thermistor types.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
The pullup resistance was assumed to be the maximum ADC value. This is
incorrect when the reference ADC voltage and the thermistor pullup
voltage differ. Use the pullup_uv property from DT instead.
The equations for the thermistor resistance are also wrong. The correct
equations are (see https://en.wikipedia.org/wiki/Voltage_divider):
R1 = R2 * (Vin / Vout - 1)
for the positive-connected resistor, and
R2 = R1 * (Vin / Vout - 1)^-1
for the negative-connected resistor. These were transformed so that
they can be computed using integer math.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
GSM_MUX and UART_MUX are being marked as deprecated.
The new modem subsystem MODEM_CMUX and MODEM_PPP
should be used instead.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
GCC format-truncation kicks in on this printk whenever the logging
configuration transforms the LOG_WRN below into a noop, and the snprintk
return argument become unused.
Fix that by switching to strncpy, fixes:
zephyrproject/zephyr/drivers/modem/hl7800.c:1786:74: warning: '%s'
directive output may be truncated writing up to 53 bytes into a region
of size 21 [-Wformat-truncation=]
reproduced with:
west build -p -b mg100 -T samples/net/telnet/sample.net.telnet
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds Kconfig variables to configure ADLTC2990. This commit adds
basic driver code for analog devices ltc2990 sensor.
Signed-off-by: Jilay Pandya <jilay.pandya@zeiss.com>
Rework RAM disk driver to be configured using devicetree and
support multiple instances.
This patch also removes a copy of the RAM disk driver,
tests/subsys/fs/fat_fs_dual_drive/src/disk_access_test_drv.c,
that was there for testing multiple disk drivers support.
Bonus: one SYS_INIT() less and a memory region can be exported to the
host.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit updates the modem_cellular driver to use the
new naming scheme for the modem_chat functions.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This driver only supports a single instance. This commit cleans up the
device definition and indicates this.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Assert the source clock is defined in the device tree to ensure the
reference is valid.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Dom0less is Xen mode without privileged domain. All guests are created
according to hypervisor device tree configuration on boot. Thus, there
is no Dom0 with console daemon, that usually manages console output
from domains.
Zephyr OS contains 2 serial drivers related to Xen hypervisor: regular
with console shared page and consoleio-based. The first one is for
setups with console daemon and usually was used for Zephyr DomU guests.
The second one previously was used only for Zephyr Dom0 and had
corresponding Kconfig options. But consoleio is also used as interface
for DomU output on Dom0less setups and should be configurable without
XEN_DOM0 option.
Add corresponding XEN_DOM0LESS config to Xen Kconfig files and proper
dependencies in serial drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Co-authored-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Drivers should only log extra information during initialization if
debug logging is enabled. Otherwise it always clutters the console
when not required.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The fuel gauge API uses separate get/set property structs to indicate what
properties are readable or writable. This lead to duplication in property
names and potential confusion for new users of the API. See issue #61818.
In addition to above, drivers already determine at runtime if a property is
supported for read or write actions.
Join the get/set fuel gauge property structs as a single struct.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
There's no need to use APPLICATION level. Also create a custom init
level that runs late in the process (depends e.g. on SPI which runs at
high priority level, 70).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add wrapper functions for Xen memory managment hypercall. They can be
used for unprivilaged Zephyr guest initialization and for domain
management, when Zephyr is used as Xen Domain 0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds possibility to call hypervisor HVM parameter functions
for specified domain (instead of only DOMID_SELF). It is needed for
configuring domains, that were created from Zephyr control domain.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Add Xen domctl API implementation for Zephyr as control domain.
Previously Zephyr OS was used as unprivileged Xen domain (Domain-U),
but it also can be used as lightweight Xen control domain (Domain-0).
To implement such fuctionality additional Xen interfaces are needed.
One of them is Xen domain controls (domctls) - it allows to create,
configure and manage Xen domains.
Also, used it as a possibility to update files copyright and licenses
identifiers in touched files.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds interface for evtchn allocation that can be used by
privilaged domain. Domain 0 can specify both dom and remote_dom
parameters for hypercall, where in others domains dom should be always
DOMID_SELF. It is needed for creating pre-defined channels during
domain setup in Zephyr Dom0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Xen-related Kconfig options were highly dependand on BOARD/SOC xenvm.
It is not correct because Xen support may be used on any board and SoC.
So, Kconfig structure was refactored, now CONFIG_XEN is located in
arch/ directory (same as in Linux kernel) and can be selected for
any Cortex-A arm64 setup (no other platforms are currently supported).
Also remove confusion in Domain 0 naming: Domain-0, initial domain,
Dom0, privileged domain etc. Now all options related to Xen Domain 0
will be controlled by CONFIG_XEN_DOM0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Move memory mapping of Xen node to Grant Table driver system init
function. After moving mapping we don't need anymore records of
xen-xen node into 'mmu_regions' array, so they were deleted from
all SoCs: Rcar Gen3/Gen4 and XenVM.
We need at least 16M of virtual address space to map memory of Xen
node, so the virtual memory sized has been increased to 32 MB, it
should be enough for basic use-cases and mapping of 16M mem region
of Xen node.
Unfortunately, after moving we also need to increase number of XLAT
tables. The previous code was more efficient if we talking about
usage of XLAT tables, because it mapped grant tables using a higher-
order table that allows mapping blocks of 2MB. And after the changes
is maps every 4KB page, so we need more XLAT tables.
Increase number of grant frames, it is needed to sync stage 1 and stage 2
memory mappings, previously we map only one page on stage 2 and further
usage of unmap regions can cause MMU translation errors.
Perform mapping stage 1 before mapping for stage 2 (add to physmap),
because right after stage 1 we can try to access memory and if it is
unmap in stage 2, error will be received during translation.
Note: Xen Grant Table driver doesn't use Zephyr Device Model.
Authored-by: Mykola Kvach <mykola_kvach@epam.com>
Co-authored-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add RSU UPDATE function id in sip_svc to set the RSU UPDATE
ADDRESS in sip_svc_v2 for Intel Agilex SOCFPGA platform.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
This commit adds support for the ATMEL HSMCI peripheral
for the SAM4E MCU series, enabling native SD card support.
Signed-off-by: Vincent van Beveren <v.van.beveren@nikhef.nl>
Add all available instances of the ADC series
MAX11102-MAX11117 to the ADC shell.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add a MBOX driver wrapper around the NXP MU, simular to
the existing wrapper around the NXP S32 MRU. This allows Zephyr IPC
to work based on the MU, on a number of NXP boards.
Also update the SHA of NXP HAL to enable the Kconfig for this driver.
Signed-off-by: Yicheng Li <yichengli@google.com>
The ipm_cavs_idc driver was used with the old intel_s1000
board which has been removed. On the audio DSP side,
the IDC under CAVS is being handled by SoC layer code.
Now the ipm_cavs_idc is not needed anymore for anything.
So remove it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Support connecting different display for each SPI and I2C
at the same time.
In a case like DTS below.
```
&spi1 {
ssd1306_spi: ssd1306@0 {
compatible = "solomon,ssd1306fb";
...
};
};
&i2c0 {
ssd1306_i2c: ssd1306@3c {
compatible = "solomon,ssd1306fb";
...
};
};
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Determine sh1106 from the `compatibility` value instead of
the SSD1306_CONTROLLER_TYPE setting.
Change the settings in `boards/shields/ssd1306/sh1106_128x64.overlay`
to follow this change.
Remove the SSD1306_CONTROLLER_TYPE from its Kconfig.defconfig,
and set the `compatibility` to `sinowealth,sh1106`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
When multiple devices are connected, the SSD1306_REVERSE_MODE setting
cannot switch for each device.
Add an equivalent setting to the devicetree properties to replace it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Store properties defined in dts in ssd1306_config's fields.
And replace code that uses DT_INST_PROP (0, ...) by config properties.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Split the native tty serial driver in a top and bottom to enable using it
with embedded libCs.
Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
Update single phase bit in register when changing data->qdec_config.
Otherwise the changed settings has no effect.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
The Cadence I3C was not building with CONFIG_I3C_USE_IBI, this fixes
the build and will give a small code size reduction when enabled.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
If a transfer happen in rapid sucession. It was possible for
the core to not be ready to accept another command. Poll on
the idle status bit until the core is ready to accept new data.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Due to a bug, after a completed transfer happen. Only the first
command response error was read. This fixes the issue so all
commands are read for if an error occurred.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The current implementation uses both, host and card capabilites to derive
the maximum bus width to be used. However, in cases where a MMC device is
not connected to the host via shdc using the full bus width of 8 lines,
device initialization fails. Introducing the `bus-width` property
circumvents this by reducing the host bus capabilites and forcing
communication with the MMC device using 1, 4 or 8 lines.
Signed-off-by: Mourad Kharrazi <mourad.kharrazi@ithinx.io>
Fix another i2c_dump_msgs_rw:
/drivers/fuel_gauge/bq27z746/emul_bq27z746.c:282:26: warning: passing
argument 1 of ‘i2c_dump_msgs_rw’ from incompatible pointer type
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Zephyr version 3.4 changed the SPI context structure and macros
which broke the logic in the MEC172x SPI driver configuration API.
This was not detected by CI due to no tests for this driver are in
the tree. The driver now behaves like most other SPI drivers requiring
a different configuration structure pointer to be passed if any item
in the configuration changes.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Enable PM on STM32 entropy driver.
Only supports PM_DEVICE for now, runtime support will be added later.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Regulator voltage setting is not applied if the device output
is already configured for the requested voltage.
This change is needed to ensure correct device behaviour.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
According to the reference manual the overdrive should be enabled after
setup of the sysclock (HSE or HSI) and enabling the PLL (PLLON).
The flash latency should be enabled after the PLL has been turned on,
but before switching the system clock to the PLL.
Signed-off-by: Max van Kessel <max_van_kessel@msn.com>
This commit follows the parent commit work.
This commit introduces the following major changes.
1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
to the 'include/zephyr/arch/arm' directory.
2. Change the path string which is influenced by the changement 1.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Warning callback by default is configured to happen
at the same time as reset, which results in unexpected
behavior from the point of view of Zephyr API. Return
-ENOTSUP from install_timeout if trying to set up
callback with 0 warning time, and add kconfig to configure
the warning time.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
STM32F2 and STM32L1 Cat. 1 only provide the coarse calibration feature
which is not supported by the code yet.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
This replaces the verbose LL_RTC_CONVERT_BCD2BIN and LL_RTC_CONVERT_BIN2BCD
by the bcd2bin and bin2bcd Zephyr provided equivalent
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
This adds mutex a lock in rtc_stm32_set_time and rtc_stm32_get_time to
ensure consistent data reading. Also performs register reading in a single
operation in rtc_stm32_get_calibration for the same reason.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
LL_RTC_Init() internally uses LL_RTC_EnterInitMode() wich uses a blocking
while loop. This rewrite uses the less CPU time wasteful local
rtc_stm32_enter_initialization_mode() instead. As a side effect
LL_RTC_InitTypeDef in rtc_stm32_config is not needed anymore.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
Calling LL_RTC_Init causes the RTC to stop while being configured thus
inducing time drift. This commit avoids doing it at each reset if the RTC
is already properly configured.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
As shadow registers bypass is enabled, an erroneous reading may occur at
each day or second increment. This commit fixes this issue.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
The redefinition of ZTEST_DMEM in the SBS emulator is unused. We ought to
remove it as it's dead code.
Remove the unused #define ZTEST_DMEM.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In order to ease user thread testing with fuel gauges, enable syscalls for
the fuel gauge emulator backend API.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Manufacturer id is skipped when reading jedec_id, due to wrong
address mode.
Before: flash_stm32_ospi: Jedec ID = [60 20 00]
After: flash_stm32_ospi: Jedec ID = [ef 60 20]
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Change introduces a new configuration option that can be used to disable
GPIO interrupt support to reduce memory footprint.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Configure the Number of Completed Packets event threshold to 1, so the
SiLabs Bluetooth controller will always send the Number of Completed
Packets HCI event to the host, even for small numbers of transmitted
packets.
Fixes#62279
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
Make HCI driver compatible to the updated versions of the
EFR32 Bluetooth library BLOBs consisting of:
* libbluetooth_controller
* libbgcommon
* librail
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
Use DEVICE_DT_INST_DEFINE instead of DEVICE_DEFINE to declare the device
structure. This ensures that the device gets an ordinal and is
initialized before any device depending on it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Initial version of Infineon CAT1 SPI Driver supporting synchronous
and asynchronous data transfer API
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Adds support for forcing XIP support at boot time, and reduces the
init priority of the driver so that it inits earlier.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
ST7735S requires the COLMOD command be repeated as part of writing
pixels, otherwise it goes back to some kind of default which is likely
wrong.
ST7735S works correctly after this plus the previous two commits; tested
on STM32L462 + KD0096FM.
Signed-off-by: David Lamparter <equinox@diac24.net>
Use a continuous transaction with CS kept low for the entire batch of
row address, column address and actual pixel data write. This is
required by ST7735S and shouldn't hurt elsewhere.
Signed-off-by: David Lamparter <equinox@diac24.net>
When doing a TX-only SPI operation, the RX not empty flag will never get
set, thus this will just hang forever.
Found/tested on STM32L462 trying to drive some WS2812 RGB LEDs.
Signed-off-by: David Lamparter <equinox@diac24.net>
Add driver for the TI TCAN4x5x series of CAN controllers. These CAN
controllers are based on the Bosch M_CAN IP and interfaced via an SPI bus.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Create dac_mcxu_lpdac.c file to implement mcux lpdac, add binding for
the mcux lpdac, update Kconfig.mcux and CMakeLists.txt file to support
mcux lpdac.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Reset the device on initializing if reset-node is available in dts.
`snps,desingware-i2c` does not define reset-node itself.
Add more of an element that inherits `reset-device.yaml` to
the `compatible` section to allow defining the reset-node
for using this feature.
For example.
```
compatible = "reset-device-inherit-node", "snps,designware-i2c";
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit resolves an internal dependecy between GET_DIRECTION and
GET_CONFIG configuration. GET_CONFIG api is internally needed by
GET_DIRECTION api.
Signed-off-by: Martin Kiepfer <m.kiepfer@teleschirm.org>
The Nuvoton NCT38xx is a multi-function device providing a TCPC
controller and a I/O expander (GPIO driver). Add a multi-function
driver to manage exclusive access to the device.
Tested with "twister -T tests/drivers/build_all/gpio".
Signed-off-by: Keith Short <keithshort@google.com>
the sam xdmac driver does not yet implement the
get_status() function. with this commit the function
will be implemented. Fixes#62003
Signed-off-by: Sven Ginka <sven.ginka@gmail.com>
Seems like the SSD1306 controller needs a bit of time after power up
before it can take i2c commands. This causes problems with
microcontrollers that have no other delays in the startup sequence, like
rpi_pico.
There's currently no good way of modeling this in Zephyr right now, and
there's also no clear indication of how much time the device needs in
the datasheet that I could find, but it seems like 10ms is enough for
that to start reliably so add a delay in the ssd1306 init function to
ensure that at least that time has passed from system power up.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Remove `threshold-reg-offset` DT property and implement them with static
inline functions in `reg_def.h`
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add `thr-sel` prop. to select the relevant threshold register for adc
comparator since there're two adc modules in npcx4 series.
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add multi-device support in npcx adc driver since there is more than one
adc module in npcx4 series. And each adc's reference voltage might be
different, this CL introduces the `vref-mv` prop. to select its own
reference voltage.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Only provide implementations for optional operations if needed. This
patch deletes quite a few dummy `pin_interrupt_configure` ops (now
optional), and adjusts ifdeffery on some drivers so that optional ops
are only provided if they implement real functionality.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This change allows to have GPIO interrupts configured
that will work while chip enters low power modes where
PD_COM is turned off.
PDC controller can wake up system on GPIO changes even when
PD_COM is off.
This is done by adding PDC entries that will wakeup Cortex-M33
at the same time when WAKEUP controller is programmed to
handle GPIO state changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Hardware supports only one edge for GPIO interrupt.
This adds software implementation that hides hardware restriction.
With this change user code can use GPIO_INT_TRIG_BOTH and does not
have to do it in application code.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Init level for GPIO drivers is set PRE_KERNEL_1.
Smartbond(tm) driver had it set to POST_KERNEL by accident.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Fix the whole v_empty setting code, this was using a wrong scaling
factor, but also incorrectly clearing the recovery voltage part of the
register.
Change the code to read the previous value and mask out the bits not
used by VE.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Disable the timeout setting when both the clock and data are
in a low state. This allows for I2C host clock stretching
without a timeout limit.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The old acpi implimentation is replaced with acpica interface
and updated x86 arch porting with the new interface.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.
This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This commit adds option to dump i2c messages of only specified
devices. It makes it easier to debug communication of specific
i2c device instead of logging all i2c communication.
The filter of devices is specifiec in device-tree using the
node with "zephyr,i2c-dump-filter" compatible string.
Example of device-tree node:
i2c-dump-filter {
compatible = "zephyr,i2c-dump-filter";
devices = < &display0 >, < &sensor3 >;
};
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the format of printed messages to align the
following strings and make it more readable.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the parameter of i2c_dump_msgs function from
string name to pointer to the device structure.
It allows for comparison of device pointers and allow to use
the printed device name in i2c shell commands.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
LOG_LEVEL > LOG_LEVEL_OFF guards were protecting a couple of function
declarations. These functions were being used without taking this fact
into consideration. These guards are now applied around the stack_stats()
function only.
Signed-off-by: Diogo Correia <diogo.correia@fraunhofer.pt>
This introduces PWM driver with supporting PWM output
APIs based on NXP S32 EMIOS peripheral. This supports
three mode: OPWFMB, OPWMCB and OPWMB.
OPWFMB uses internal counter, the new period and duty
cycle takes effect immediately.
OPWMCB and OPWMB use external counter as timebase, changing
PWM period at runtime will impact to all channels share the
same timebase. Also the new period and duty cycle take effect
in next period boundary of the timebase
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This PR adds a misc driver for NXP S32 eMIOS peripheral.
eMIOS provides multiple unified channels (UCs), there are
several channels can be used as reference timebase
(master bus) for other channels. At this time, the
driver does initialize global configuration for eMIOS
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit improves the usage of the bus pipe (connected
to UART) to only open it when the modem is actually
powered and ready, not when leaving the idle state. This
ensures the pipe is flushed before sending the init script,
and re-enables the UART driver if it is disabled due to
errors.
While building a test platform based on the nRF9160 and a
Quectel BG95, it was discovered that the nRF9160 correctly
throws UART errors if the RX is enabled while the UART RX
line is low (which was due to the modem being powered
down).
The improvements should also help help remove the
"<wrn> modem_chat: receive buffer overrun" warning which
would occur during startup as the pipe was opened, but
nothing was receiving the data, causing the buffer to
overflow.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Add support for device power management. When the sensor
is not powered, the fetch function will fail. When the
sensor is not connected to a power domain, it will behave
as usual.
Signed-off-by: Albert Jakieła <aja@semihalf.com>
`CONFIG_BT_L2CAP_TX_MTU` drives the maximum supported MTU on a Bluetooth
connection, but the SPI backend also imposes its own hidden limits.
Display a warning if a value is chosen that can result in failures to
send. This is done here instead of as a range on `BT_L2CAP_TX_MTU` as
ranges on that symbol are already defined in terms of software features,
which would conflict with this check.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The eswifi spi driver sets up spi buffer length as number of frames,
but the length shall be number of bytes. Because eswifi use 16 bit as
frame size, so this turns out reading and writing half of data and
fails to sending any at command request and getting any responds from
eswifi module.
Fix it by setting up length as number of bytes.
Fixes#62056
Signed-off-by: Chien Hung Lin <chienhung.lin.tw@gmail.com>
Fix a shadow variable build error:
dmic_nhlt.c: In function 'dai_dmic_write_coeff':
dmic_nhlt.c:57:78: error: declaration of 'base' shadows a global
declaration [-Werror=shadow]
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Created set of new functions for configure fir coefficients with support
for packed format. This allowed to make the dai_dmic_set_config_nhlt
function simpler.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
More verbose variable pdm_idx was used instead of n. The series of
references to the array of pdm base addresses has been replaced with
a pdm_base variable.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
All fir filters have an identical set of registers so their definitions
were combined to simplify the code. From the dai_dmic_set_config_nhlt
function, a duplicate piece of code responsible for configuring fir was
separated into a new function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Created dai_dmic_start_fifo_packers function corresponding to an already
existing dai_dmic_stop_fifo_packers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The while loop in the code fragments waiting for a bit to be cleared has
been replaced with the WAIT_FOR macro call. Added a warning in the case of
timeout.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
All PDM controllers have the same set of registers. Their definitions have
been merged to simplify the code.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Moved code fragments responsible for logging and verification of the
configuration register values from the dai_dmic_set_config_nhlt function to
a separate functions. Behavior of the code verifying the correctness of
register values has been changed so that it only displays warnings.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Definitions of a configuration blob structures were separated from the main
drivers header file and moved to a dedicated file to improve code
readability. Removed unnecessary nhlt_pdm_fir_coeffs structure.
The nhlt_pdm_ctrl_cfg structure was extended with nhlt_pdm_ctrl_fir_cfg
and fir coefficients.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Add TI VIM (Vectored Interrupt Manager) interrupt controller support.
VIM is a TI specific custom interrupt controller for ARM cores.
In J721E soc, VIM aggregates interrupts to Cortex R5 cores.
TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
VIM: section 6.3.3.6
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
Only statements can be labeled in C, a declaration is not valid. This is
an FAQ.
While compilers currently in use don't seem to care, the "sparse" static
analyzer complains loudly (and cryptically):
https://github.com/thesofproject/sof/actions/runs/6052920348/job/16427323549
```
drivers/dma/dma_intel_adsp_hda.c:190:17: error: typename in expression
drivers/dma/dma_intel_adsp_hda.c:190:26: error: Expected ; at end of stmt
drivers/dma/dma_intel_adsp_hda.c:190:26: error: got rp
```
Add an empty ";" statement after each label makes `sparse` and probably
others happy.
Also add missing `const` to constants for clarity.
Fixes commit a026370461 ("drivers: hda: use interrupt for timing L1
exit on host DMA")
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Modify the signature of the k_mem_slab_free() function with a new one,
replacing the old void **mem with void *mem as a parameter.
The following function:
void k_mem_slab_free(struct k_mem_slab *slab, void **mem);
has the wrong signature. mem is only used as a regular pointer, so there
is no need to use a double-pointer. The correct signature should be:
void k_mem_slab_free(struct k_mem_slab *slab, void *mem);
The issue with the current signature, although functional, is that it is
extremely confusing. I myself, a veteran Zephyr developer, was confused
by this parameter when looking at it recently.
All in-tree uses of the function have been adapted.
Fixes#61888.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
LOG_INF() inside of a sample_fetch create noise in the logs and is
inconsistent with other sensor driver implementations.
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
When Ethernet or Wi-Fi subsystems are enabled, but no driver source
files are provided in the Zephyr source tree (which is the case for
out-of-tree drivers), CMake throws warnings about empty libs, for
example:
No SOURCES given to Zephyr library: drivers__ethernet
No SOURCES given to Zephyr library: drivers__wifi
This commit sets ALLOW_EMPTY property for those libraries, to allow for
seamless out-of-tree drivers integration.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add fundamental feature support for RP2040 PIO SPI peripherals.
This commit implements synchronous transfer with 8-bit MSB
format. Using PIO allows any GPIO pins to be assigned the roles
of CS, CLK, MOSI, and MISO.
Optional features not implemented yet:
- Interrupt based transfer
- DMA transfer
- Slave mode
- Varying word size
- 3-wire SPI support
- LSB-first
Updated in response to review comments.
Further updates from second round of review.
Rename spi_pico_pio.c source to match zephyr/MAINTAINERS.yml
Remove unnecessary initialization code.
Resolve merge conflicts
Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
As per #26393, Local APIC is using Kconfig based option for
the base address. This patch adds DTS binding support in the driver,
just like its conunter part I/O APIC.
Signed-off-by: Umar Nisar <umar.nisar@intel.com>
The Calibration value of the VRef on stm32U5 is acquired on 14Bit by ADC1
and should be adjusted on 12bit becasue the resolution is 12bit
in this stm32_vref driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Interrupt is enabled before reset is released to make sure that the
first IRQ edge is captured, and rx thread can process it.
Remove delay in spi_open as it was redundant due to the "sem_initialised"
semaphore.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.
Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.
Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.
This promotes a more modular file structure.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
i.MX RT SoC have some pins related to the watchdog.
For example, iomuxc_gpio_ad_b0_15_wdog1_rst_b_deb allows WDOG1_RST_B_DEB
signal to be used as reset source for i.MX RT10xx boards.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
The var "uart_xlnx_ps_driver_api" is defined twice in the source,
so remove one definition of it.
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Remove commands which are already defined as subcommands for command
ivshmem. Moreover those commands recursively include themselves as
subcommands.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
To properly setup L1 exit timing this patch will use buffer interrupt
for HOST DMA and wait for Host HDA to actually start
First interrupt will clear all others.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Davinci gpio controller support to add various soc gpio
support (J721E, AM654).
TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
GPIO: section 12.1.2
BeagleBone AI_64 https://beagleboard.org/ai-64
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
GIC-600 and later interrupt controllers have an additional
GICR_PWRR register that controls the power up sequencing
of the redistributors. Added logic to gicv3_rdist_enable to
configure GICR_PWRR if required.
Signed-off-by: Chad Karaginides <quic_chadk@quicinc.com>
Since __sha256_ram_block section must in the first 4KB,
h2ram_pool section is no longer included first inside the
RAMABLE_REGION.
Append h2ram_pool section at the end of used memory, so gap
due to alignment is still available for newly added variables.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The npcx ps2 controller calls Kernel APIs without including the kernel.h
header file. This commit adds the header file to fix the issue.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The npcx ps2 driver does not use the DT_HAS_<compat>_ENABLED Kconfig
symbol to enable the driver. This commits update the Kconig file to
use it and also drop the dependency on ESPI_PERIPHERAL_8042_KBC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Allow use of multiple mb85rc frams at contiguous i2c addresses as a single
big fram module.
Tested on mb85rc1mt used as two 32K modules, where the first one was at
mb85rc1mt's first i2c address and the second one at mb85rc1mt's second i2c
address.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
On my end, the ISM330DHCX was stopping working after a few seconds.
After investigation, it seems that the function used to set the device
in pulse mode only works for special modes like tap and embedded functions
and not for data-ready as intended.
The data-ready was then in the default latched mode which does not work
sustainably with the rest of the driver logic. In this mode, the driver
can miss an interrupt and be forever waiting on a new data-ready pulse
which will never happen as the interrupt line is already active.
This calls the correct function to enable pulsed data-ready mode as
described in the datasheet section 9.7 COUNTER_BDR_REG1 (0Bh).
Signed-off-by: Francois Gervais <francoisgervais@gmail.com>
The added cellular modem driver is a naive driver, which
shall serve as a template for implementing tailored
drivers for modems like the UBLOX-R4. It uses only
generic at commands, described in 3gpp, and protocols,
like CMUX and PPP.
A binding for the BG95 has been added, which replaces
the quectel,bg9x. This is neccesary since the BG95 does
not have a usable reset pin, the reset and powerkey are
internally connected to each other.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
LSI clock configuration for STM32WBA is located in backup domain.
The backup domain needs to be enabled before the LSI can be enabled.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Based on the 'Technical Reference Manual' for CC13x2/CC26x2 SimpleLink
MCU family, the device contains factory pre-programmed 64-bit IEEE MAC
address for 802.15.4 radio inside two FCFG 32-bit registers:
1. MAC_15_4_0: first 32-bit of the 64-bit IEEE MAC address
2. MAC_15_4_1: last 32-bit of the 64-bit IEEE MAC address
The way current version of the driver setups the address results in
incorrect bytes order (the address is reversed):
uart:~$ ieee802154 get_ext_addr
Extended address: AF:03:B7:25:00:4B:12:00
This fixes the problem in both drivers (also in the Sub-GHz version)
which results in use of proper EUI-64 address:
uart:~$ ieee802154 get_ext_addr
Extended address: 00:12:4B:00:25:B7:03:AF
IEEE MAC address was confirmed with UniFlash, nRF Sniffer for 802.15.4
and IEEE OUI database (00:12:4B is one of registered OUI for Texas
Instruments).
To prevent confusion in future, short notice about bytes order for
'mac' field in driver's data structures was also included.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Fix few mismatched CONTAINER_OF, one missing k_work_delayable_from_work
conversion and few cases where the target should be pointing at the
first element explicitly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Check the TXC flag instead of EOT for the case of endless
transactions (TSIZE = 0), which in this case is always as
the stm32 SPI driver doesn't set TSIZE.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
In case asserts are deactivated, no check is done on buffers length.
Remove asserts and return an error when lengths are not correct.
Check error in case length is set by API user.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fix compilation error on variable used for size of array in
OSPI and QSPI drivers.
Fixes#61804
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
After conducting tests with a a virtual Bluetooth controller
over TCP it was noticed that some HCI packets may arrive on the
same buffer if sent over a short period of time.
This update ensures the hci packets are parsed correctly in the case
multiple packets are in the same recieving buffer according to
the Bluetooth Spec v5.4 Part E.
Signed-off-by: Victor Chavez <chavez-bermudez@fh-aachen.de>
Change few data units that are currently reported three order of
magnitude off from what the sensors API specifies.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The various BQ27xxx datasheet seems to indicate a typical power-up or
shutdown to communication time of 250ms typical.
Adjust the driver to include:
- a check to ensure that the MCU has been powered for at least 300ms
before any communicaton
- the same delay when exiting shutdown state
Link: https://www.ti.com/lit/gpn/BQ27427
Suggested-by: Nick Ward <nix.ward@gmail.com>
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The BQ27427 appears to work incorrectly with the ROM configuration
value, it battery power and current are the inverse of what they should
be, and SoC is decresing when charging and increasing when discharging
as a consequence.
At this time this only appears documented in the TI E2E forums, and the
workaround seems to be to invert the sign of the CC Sense register of
the device.
This register is not documented on the BQ27427 device technical
reference manual, as the device has an internal shut and the sense value
should not have to be tweaked, so the CC Sense details are taken from
the BQ27426 one instead, which is supposedly the same silicon with an
external shunt.
Also the CC Sense value, which is just documented as "F4" (as in 4 bytes
float) is actually in a proprietary floating point format, so instead of
trying to decode, just swap the known sign bit as documented in the E2E
forum post.
Link: https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1215460/bq27427evm-misbehaving-stateofcharge
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Rework the device configuration code. The current code has a bunch of
leftover functions that read data and compute checksums that are never
used, but that break the initialization sequence if removed because
there are also some missing delays in their place.
Redo the initialization code from scratch, this is mainly inspired from
the Linux driver and taking some part from the (somewhat confusing and
incomplete) datasheet.
This drops the dead code and adds the necessary sleeps to guarantee
correct operation.
The device configuration is also now changing the local copy of the data
block, and soft reset is also issued only if the device configuration
has changed, which should only happens if the battery is replaced or
went completely flat. This should also result in a consistent battery
measurement operation across resets.
Link: https://elixir.bootlin.com/linux/latest/source/drivers/power/supply/bq27xxx_battery.c
Link: https://www.ti.com/lit/ug/sluucd5/sluucd5.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Use sys_put_le16 in bq274xx_ctrl_reg_write to convert the two bytes
value. This is coherent with the rest of the file.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Restructuring code for poll_in/poll_out/fifo_fill/fifo_read because for
wide data support, all code is identical except the calls to
LL_USART_{ReceiveData8/TransmitData8}.
This allows both implementations, 8 and 9 bit data-width to call a
visitor function, passing the either the 8 bit or 9 bit data-width
function pointer.
Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Preventing code duplication of macros checking for HW support on
stop bits and data-bits during runtime configuration.
Validated runtime configuration on an STM32H743.
Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Add ability to retrieve the shunt voltage if the end user wants to do
the power calculation manually to handle negative power values.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
The current-shunt calibration requires a factor of 4x if high-precision
mode is selected.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
Fix current sign extension logic and consolidate sensor scaling code
into a single block.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
Timer "drivers" do not use the device model infrastructure, they are
singletons with a SYS_INIT call. This means they do not have to include
device.h but init.h. Things worked because device.h includes init.h.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Now that everything is in place, the prescaler value picked from dts is
used to properly configure the clock.
The code is moved into its own function.
There are four main cases:
- F1 and F37x don't have prescaler (in ADC register) so nothing is done.
- F0 only has individual registers.
- C0, G0, L0, WB1x and WL have both invidual and common registers. The
individual one is used to define either synchronous mode with its
prescaler, or asynchronous mode. The common one is only used to store
the value of the asynchronous prescaler.
- All others only have a common register where both the mode and the
prescaler is stored.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Get the STM32 ADC prescaler data from dts to create the appropriate LL
macro to use for the ADC clock.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Current setup tries to initialize the bank driver before the parent one,
which is the inverse of what the devicetree hierarchy implies and
causes a bunch of:
ERROR: /soc/gpio@e000a000/psgpio_bank@3 PRE_KERNEL_1 40 32 <
/soc/gpio@e000a000 PRE_KERNEL_2 40 10
Change the bank driver to initialize at PRE_KERNEL_1 as the parent
drivers so that ordinals take care of priority between these two.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a build error:
crypto_it8xxx2_sha.c:99:26: warning: declaration of 'i' shadows a
previous local [-Wshadow]
99 | for (int i = 0; i < ARRAY_SIZE(sha256_k); i++) {
| ^ crypto_it8xxx2_sha.c:88:13: note:
shadowed declaration is here
88 | int i;
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a few issues with the reset-gpio functionality in spi_nor, missing
header, missing semicolon, unnecessary and not working condition on a
struct field that is not a pointer.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The previous implementation called k_usleep to wait if the fifo was not
empty. This leads to an exception if called from an ISR (e.g. for
for logging).
In addition to that, the k_usleep leads to noticeable interruptions
when printing strings longer than the 64 bytes of the fifo.
With this commit, the function will busy-wait until all characters are
sent or if the timeout is reached. The timeout will only be reached if
no USB host is connected to the port. After the timeout is reached
once, the function will return immediately for subsequent calls
(dropping the characters to be sent) until the USB host is connected
again.
Fixes#60825
Signed-off-by: Martin Jäger <martin@libre.solar>
Fix a shadow variable build error:
wdt_andes_atcwdt200.c:112:49: warning: declaration of 'counter_dev'
shadows a global declaration [-Wshadow]
112 | static void wdt_counter_cb(const struct device *counter_dev,
uint8_t chan_id, |
~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~ wdt_andes_atcwdt200.c:95:35: note:
shadowed declaration is here
95 | static const struct device *const counter_dev = |
^~~~~~~~~~~
Make the outer variable more specific rather than the local one.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the power_domain_intel_adsp initialization priority so that it
initializes after the DMA driver that it depends on.
Fixes a few:
ERROR: /soc/dma@72c00 POST_KERNEL 40 69 <
/soc/dfpmccu@71b00/hst_domain POST_KERNEL 75 65
ERROR: /soc/dma@72400 POST_KERNEL 40 66 <
/soc/dfpmccu@71b00/hst_domain POST_KERNEL 75 65
...
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix CONTAINER_OF usage in gpio_keys_interrupt, this should go first to
struct gpio_keys_callback and then to struct gpio_keys_pin_data. It
happens to work right now because cb_data is the first field.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix few instances of delayable work handlers using the k_work pointer
directly in a CONTAINER_OF pointing to a k_work_delayable.
This is harmless since the k_work is the first element in
k_work_delayable, but using k_work_delayable_from_work is the right way
of handling it.
Change a couple of explicit CONTAINER_OF doing the same work as the
macro in the process.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
"callback != NULL" is used to determine if the callback is in use.
The TX complete semaphone should only be given back after setting the
callback to NULL.
This would likely only be a race condition if the ISR is processed on a
different core to the TX call.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The MCAN driver operates in TX queue mode (TXBC.TFQM = 1). In this mode
TXFQS.TFQPI returns the first available buffer (usually buffer zero).
Hardware is free to re-use a buffer as soon as TX completes, it does not
have to wait for the matching TX event to be processed.
If a TX completes and that TX buffer is re-used before processing the TX
event, two TX events for the same buffer occur. The first event calls the
second events TX callback, and the second event results in a NULL pointer
exception.
In a "normal" configuration, the TX event ISR will always preempt the
queuing of a TX frame to the same TX buffer.
However, this issue could occur if:
* Sending a message with ISRs temporarily disabled.
* The ISR is processed on a different core to the TX call.
The fix is to manually track which TX buffers are available, only freeing
a buffer after the TX event has been processed.
The MCAN user manual states that this is allowed:
"The application may use register TXBRP instead of the Put Index and may
place messages to any Tx Buffer without pending transmission request"
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Move workaround methods for npcx series to soc init functions. If
there's no workaround for this series, drop its soc.c file directly.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The full scale prop was incorrectly using the enum idx which was then
to be used with a look up table which used the actual range number.
This changes it to use the int directly from the dts.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This gpio data register and keyboard scan out register are shared
register. To prevent race condition caused by access from different
thread, add critical section.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Added configuration of termination current and trickle voltage
Added option to bypass low voltage charge inhibit
Added option to disable automatic recharge
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Some log messages could be too noisy, especially if the sensor shell was
used which would call all attr and samples even though just a few are
supported.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
For now clock can be read and written.
Clock can be set in full iso8601 time format, like 2023-12-24T12:45:56
or by just providing either data or time
Alarms not accessible
Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
It mirrors the functionality of the vl53l0x driver.
Also removes an assert not needed, as the channel is checked.
Signed-off-by: Daniel Stuart <daniel.stuart14@gmail.com>
CONFIG_COVERAGE has been incorrectly used to
change other kconfig options (stack sizes, etc)
code defaults, as well as some samples behaviour,
which should not have dependend on it.
Instead those should have depended on COVERAGE_GCOV,
which, being the one which adds special code and
temporary RAM storage for embedded targets,
require changes to many features.
When building for the native targets, all this was
unnecessary.
=> Fix the dependency.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the stm32 SPI driver
nocache check. Also, don't check NULL buffers as the SPI
interface states that such buffers will result in sending
zeroes.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Increase the default init priority of nct38xx so that they work well
with the default I2C init priority (50).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This CL introduces new Flash Interface Unit (FIU) hardware in npcx4
series. The different operations of npcx9 and npcx4 FIU include:
1. 4-byte mode support for DRA mode move to SPI_DEV reg
2. To access the second flash in DRA mode, we need to configure
SPI_DEV_SEL field in BURST_CFG additionally.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This CL introduces new clock architectures in npcx4 series and wraps
clock configurations of different series by device tree files.
For example, the PWDWN_CTLx reg initialization relies on `pwdwn-ctl-val`
prop of pcc DT node now.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The return variable rc in sbs_gauge_do_battery_cutoff() needs to
be initialized, or else it would return random value if the for
loop is never entered.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
channel_get was doing using floating point constants with it's calculation.
The result is changed to be a float as this was generating a double
promotion warning.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Reported-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
With gcc from the zephyr sdk and -Wold-style-declaration is giving this
output:
zephyr/arch/arm/core/aarch32/cortex_a_r/fault.c:101:1: warning:
'inline' is not at beginning of declaration [-Wold-style-declaration]
101 | static void ALWAYS_INLINE
z_arm_fpu_caller_save(struct __fpu_sf *fpu)
| ^~~~~~
I searched to all of the source code to find these further occurances
where inline is not at the beginning of a function declaration.
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
The `<zephyr/posix/time.h>` header was unused in `fpga_ice40.c`
so remove it.
This fixes an error about `pthread_attr_t` not being defined.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Refcounting is used to track ALH block usage and to
call alh_claim_ownership()/alh_release_ownership() accordingly.
This is however incorrectly done on ALH instance basis, which
means when one instance is released, ownership can be released
even though one ALH instance is still active.
Fix the logic by tracking ALH usage as a global property
which matches the alh_claim_ownership/alh_release_ownership
semantics.
Link: https://github.com/thesofproject/sof/issues/7759
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.3
Requires https://github.com/zephyrproject-rtos/hal_st/pull/16
Signed-off-by: Armando Visconti <armando.visconti@st.com>
AXP192 is a small power management IC, that also
features 5 GPIOS.
Besides GPIO driver this commit also includes needed modifications
in axp192 regulator and mfd driver as LDOIO0 functioanlity
is multiplexed with GPIO0 pin.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
Add Kconfig to set sleep timeout between empty read attempts in rx thread
for ethernet native posix driver.
Signed-off-by: Nicola Ochsenbein <Nicola.Ochsenbein@husqvarnagroup.com>
Many fuel gauge ICs offer a battery cutoff/shipping mode functionality that
cutoff charge from the battery. This is often useful for preserving battery
charge on devices while in storage.
Add battery cutoff support to the fuel gauge API with a generic default SBS
driver showing an example of support in tests.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Added support to connect to an HCI TCP Server. This
allows to do integration tests with other frameworks
that support a virtual hci interface.
Signed-off-by: Victor Chavez <chavez-bermudez@fh-aachen.de>
This code was added to CI after the `-Wshadow` stack was prepared, so it
was not fixed together with the rest.
Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
RCX and RC32K oscillators are not precisely trimmed.
This code allows to measure actual frequency of those two
oscillators.
Device tree binding were extended to specify calibration
interval. This interval (in seconds) is used to periodically
call work that will perform oscillator frequency measurement.
For XTAL32K settle time can be provided in device tree.
After this time (depending on actual oscillator used)
XTAL32K is assumed to be stable and low power clock driven by
XTAL32K is considered OK for precise usage in bluetooth.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This enables -Wshadow to warn about shadow variables on
in tree code under arch/, boards/, drivers/, kernel/,
lib/, soc/, and subsys/.
Note that this does not enable it globally because
out-of-tree modules will probably take some time to fix
(or not at all depending on the project), and it would be
great to avoid introduction of any new shadow variables
in the meantime.
Also note that this tries to be done in a minimally
invasive way so it is easy to revert when we enable
-Wshadow globally. Source files under modules/, samples/
and tests/ are currently excluded because there does not
seem to be a trivial way to add -Wshadow there without
going through all CMakeLists.txt to add the option
(as there are 1000+ files to change).
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add shell commands to setup, disable, install timeout and feed a
watchdog device.
These commands reflect watchdog API.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
There are situations in which the async API for uart can be provided
by another driver (case in point, uart_rtt), and thus there is no valid
DMA controller for the uart_sam0 driver to talk with.
By separating the configuration, there's no need to exclude samd20-based
boards (that have no DMA peripheral) from the uart_async_api tests.
Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
Drop the data data structure and use the pin data one directly, also add
a missing const qualifier in the main conf data structure, both save few
bytes of RAM on some platforms.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add basic support of 'regulator-gpio'. For now, it is support
only controling voltage and driver presents only six functions:
* enable and disable the regulator;
* set and get voltage;
* count and list of voltage(s).
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
The prototype of `nrf_802154_energy_detected` callout has changed.
This commit adjusts to this change.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Use the symbol iface_ctx in place of ictx. This was
introduced seemingly by mistake in PR #61510
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Due to source data pointer having no alignment constraint,
extra care needs to be taken when reading source data
as dword
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
This adds support for the max1125x (max11254, max11254)
family of spi adc devices.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
Ensure the driver enables the LTE radio during init unless boot
in airplane mode is specified.
To ensure the settings applied during init are used, the LTE radio
is turned off during config.
Fix issue where PDP and GPRS connection config could have a mismatched APN.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Binding like "arm,gic" call these flags "flags" whereas binding like
"intel,ioapic" call them "sense". Allow either to work
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Commit slters z_impl_nrf_qspi_nor_xip_enable to not call
qspi_device_init in case when xip_enabled has the same value
as requested.
In case when qspi_device_init returns non-zero no further actions
are taken and xip_enabled will not be to set requested value.
Fixes#59535.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Now that all in-tree phys are declared under their mdio bus, drop the
`mdio` property and use DT_INST_BUS to find the bus.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
`k_thread_create` function has the 'adin' device passed as 1st
entry pointer. Therefore the device configuration is obtained directly
from the `dev` structure.
Adujst the code accodringly.
Fixes: 75dde83 ("drivers: ethernet: adin2111: add adin1110 support")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
`DEVICE_DT_INST_DEFINE` requires to pass pointer to the device's
private constant data so make it const.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Since VWGPSM (Virtual Wire GPIO Target-to-Controller) registers are
introduced in npcx9 and later series, the CL moves the related DT nodes
from npcx-espi-vws-map.dtsi (Used for all npcx series) to the specific
dtsi files for npcx9 and npcx4 series.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This is a follow-up to commit fa609e5844.
This driver implements SPI slave operations only and cannot be used
without the corresponding Kconfig option enabled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
To allow the ADC API unit test to skip tests for non-implemented
features, return -ENOTSUP.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
When we lock an hwspinlock, we must write the CPU identifier to
the hwspinlock register. If we want to unlock the locked hwspinlock,
we have to rewrite the same CPU identifier.
To define the CPU identifier, we use affinity 1 and affinity 2 fields
of the MPIDR register.
Signed-off-by: Aziz Idomar <aidomar@sequans.com>
The intention of hardware spinlock is to allow two processors,
that have no alternative mechanism for accomplish synchronization
and mutual exclusion operations, to share resources (such as
memory and/or any other element).
Here, we add the hwspinlock framework, that makes possible to use
those hwspinlock devices and stay platform-independent. Each
platform wishing to support hardware spinlock must describe a
driver using this framework.
Signed-off-by: Aziz Idomar <aidomar@sequans.com>
Add support for ADIN1110 10BASE-T1L Ethernet MAC-PHY.
The ADIN1110 is an ultra low power, single port, 10BASE-T1L
transceiver design for industrial Ethernet applications and is com-
pliant with the IEEE® 802.3cg-2019™ Ethernet standard for long
reach, 10 Mbps single pair Ethernet (SPE). Featuring an integrated
media access control (MAC) interface, the ADIN1110 enables direct
connectivity with a variety of host controllers via a 4-wire serial
peripheral interface (SPI). This SPI enables the use of lower power
processors without an integrated MAC, which provides for the
lowest overall system level power consumption. The SPI can be
configured to use the Open Alliance SPI protocol or a generic SPI
protocol.
Documentation:
https://www.analog.com/en/products/adin1110.html
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
To be consistent with other xmc4xxx drivers.
A few other device tree changes:
- Rename clock signal option as it's handled by DX1.
- Remove clock-frequency option as it's already added in
i2c-controller.yaml, and interrupts is already defined as array
in base.yaml.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Currently the driver is not configured as controller during initialization.
Any use of I2C in controller mode without an explicit i2c_configure() will
not work.
In this commit the driver is automatically configured.
But, delay the configuraition until first use instead of during init
because otherwise tests/drivers/i2c/i2c_target_api hangs without any
errors on xmc47_relax_kit (when internal pulls are used). This issue
needs to be investigated.
There are a few other fixes/cleanups:
- Change the default master_frequency from XMC4_I2C_SPEED_STANDARD to
I2C_SPEED_STANDARD.
- Use devicetree clock frequency for target configuration instead of
I2C_SPEED_STANDARD.
- Rename master_frequency to bitrate as it's also used by the target
configuration now.
- Remove several uneeded casts.
- Forward backup config in get_config().
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The simple executor was removed with the usage of the spsc queue but
some stray references remained. Remove those.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Remove redundant function during child node initialization.
Move log related header file near log related macro.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Based on the standard based definitions given in previous commits, the
TX timestamp used for timed TX now refers to the start of PHR. As OT
continues to calculate timestamps based on a "start of SHR" definition,
the duration of the PHY specific SHR is added in the OT adaptation layer
to make up for this OT quirk.
Fixes: #59245
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Builds upon the newly introduced nrf_802154_phr_timestamp_get() function
to calculate RX timestamps according to the timestamp definitions
introduced in earlier commits and removes the prior workaround to
calculate the start-of-frame message timestamp point.
Fixes: #59245
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
OT does not have 64 bit timestamp support. This is a limitation of OT
and not of the IEEE 802.15.4 driver API. Therefore any workaround
related to such OT idiosyncracies should be encapsulated inside the OT
adapatation layer.
This change moves the OT-specific conversion of OT 32 bit timestamps to
Zephyr 64 bit timestamps into the OT adaptation layer.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Fixes#61401
The ADS1x1x driver has a bad habit of assuming i2c operations will
always suceed - this fixes the two worse cases in the code I could
identify (there may yet be more).
* During initial ADC setup, if either of the two I2C operations
(read or write) fails, raise the error immediately to the caller
rather than letting it fall through to the acquisition thread.
This ensures that we only ever attempt to give a result that was
definitely connected to our attempt to start the capture.
* If the acquisition thread encounters an I2C error, raise the error
but do not terminate the aquisition thread. This ensures the
application can attempt to fix the condition that caused the I2C
error and try again.
Signed-off-by: Chris Collins <kuroneko@sysadninjas.net>
Since the driver can now be also used on nRF91 Series, its name need to
be updated to not cause confusion.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of directly configuring PPI channels, use the GPPI helper
provided by nrfx. This allows using the driver on nRF53 an nRF91
Series where DPPI is available instead of PPI.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When possible, use separate GPIOTE tasks for setting the PWM output
high and low instead of using one task to toggle it. This is crucial
for DPPI where the same task cannot be used in more than one channel.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Otherwise a glitch can appear on the PWM output when the GPIOTE channel
is reconfigured (when GPIOTE releases the pin, GPIO takes control and
drives it to the last written state which may be different than that
used recently by GPIOTE).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Rework the devicetree definition for smsc91x to put the mdio and
ethernet device at the same level, and make the phy a child of the mdio
node.
This allows matching up the device initialization sequence with the
devicetree hierarchy.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Move few variable inside a case statement to avoid build warning for
unused variables in some specific configuration.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This driver implements an MDIO device. Enable the MDIO driver to avoid a
build error for:
orphan section `._device.static.3_CONFIG_MDIO_INIT_PRIORITY_'
Also set the proper compatible in mdio_shell so that the ethernet tests
build correctly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Rename the STM32H7 FDCAN driver Kconfig symbol and implementation file to
match the naming used in the ST reference manuals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the STM32 FDCAN driver Kconfig symbol and implementation file to
match the naming used in the ST reference manuals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the STM32 bxCAN driver DTS compatible, Kconfig symbol, and
implementation file to match the naming used in the ST reference manuals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fold the contents of the private header for the STM32 bxCAN driver into the
implementation file.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The timing_max parameters defined in the stm32 bxcan driver don't match the
register description in the reference manuals.
- sjw does have only 2 bits representing 1 to 4 tq.
- phase_seg1 and phase_seg2 max is one tq higher.
I have checked the following reference manuals and all match:
- RM0090: STM32F405, F415, F407, F417, F427, F437 AND F429
- RM0008: STM32F101, F102, F103, F105, F107 advanced arm-based mcus
- RM0351, RM0394: all STM32L4
- RM0091: all STM32F0 with CAN support
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Following #60410, the NXP S32 external interrupt controller device
initializes after the core interrupt controller. Bump the NXP S32 intc
init level to initialize after the core intc and before the GPIO
device driver.
Fixes#61218
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Check the packet lenght in flash_write operation beforeSigned-off-by
copying it to an internal buffer.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
In case CAN-FD mode is not enabled the mcux flexcan driver supports
CAN_MODE_3_SAMPLES.
This has been removed inadvertently while adding can-fd support.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add ipm driver to use Inter Processor Interrupts
on Xilinx ZynqMP platform. This patch also adds sample
application that shows use of xlnx ipm driver.
This driver uses default arm gic interrupt controller
and works only for lockstep mode of cortex-r5f
cluster for now.
In split mode the cortex-r5 cluster will
have two r5f cores and they are expected to work in AMP
mode. If both r5f cores run simultaneouly, only one of
the core is able to receive IPI interrupts at this time
and it will be the one that started later. In future
this limitation shall be removed.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
the dev pointer is already dereferenced before this function is
called, so this check does not make any sense.
Signed-off-by: Jacob Siverskog <jacob@teenage.engineering>
Following #56576, the `cs` field in `struct spi_config` is of type
`struct spi_cs_control` instead of a pointer to the same type.
This PR updated the driver to use `spi_cs_is_gpio()` helper to
check if SPI CS is controlled using a GPIO.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This change introduces a new PWM driver for all CC13/26xx SoC.
See the documentation in ti,cc13xx-cc26xx-timer-pwm.yaml for detailed
usage instructions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
In case of HDA Link DMA FIFORDY bit is RO according
to HW specification thus should be managed by HDA controller.
Add a logic to set FIFORDY for HDA Host DMA only
Signed-off-by: Ievgen Ganakov <ievgen.ganakov@intel.com>
Allow properties 'regulator-min-microvolt' and 'regulator-max-microvolt'
for fixed regulators: Note: they should be equal.
Add simple functions for getting list of allowed and count of voltages.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Possible situation is that in some driver, devices can be controlled in
different ways: in some, we can only turn the power on or off, in others,
we can only control the voltage, and in some, we can control power supply
or voltage level. There may also be devices where there is no control
over power supply at all. A clear example of this can be eMMC devices
where the voltage is usually fixed and they are always powered on.
However, we would like to have a common code for controlling all the
mentioned types of devices, at least the driver shouldn't worry about the
implementation details of voltage regulators. Therefore, there may exist
empty regulators - regulators that only contain information about the
supported voltage, and we cannot change anything in them. The device tree
node description for such a regulator is only necessary for compatibility
with other regulators. Hence, we need to add the possibility of the
existence of such a dummy fixed-regulator.
In this commit, support for a fixed dummy regulator without the ability
for any control has been added. Note that such support also exists in the
Linux kernel. In other words, the logic of the fixed regulator has been
aligned with the logic of the fixed regulator inside the Linux kernel.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
This commit removes the direct calls of the PPP API of the
network device used by gsm_ppp.c
These calls are now performed by the L2 PPP interface when it
is brought up or down using net_if_up() or net_if_down()
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.
Signed-off-by: Joshua Lilly <jgl@meta.com>
Select PCIE and DYNAMIC_INTERRUPTS as they are needed for driver to
work. This allows to remove board configuration overlay files.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Looking back at the current INPUT_LISTENER_CB_DEFINE api naming, it
feels like it's a bit overloaded. Rename it to a simpler
INPUT_CALLBACK_DEFINE.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This fixes a shadow variables found by -Wshadow.
The variable ep_ctx is only used in certain switch cases
so declare it when it is needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Removes the shadow variable found by -Wshadow. The value of this
variable is the same throughout the for loop, so there is no
need to assign it again for each iteration.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
TC "test_single_shot_alarm_notop" is failing because there were 2 ISR
callbacks instead of one. this is because of invoking
ifx_cat1_counter_set_int_pending incorrectly. Updated
ifx_cat1_counter_set_alarm to fix this
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Pin state after SPI deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. When the SPI instance
is disabled GPIO takes control over SCK and drives it to state set
by pinctrl driver. This might causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPI driver.
Now, when a SPI instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Pin state after SPIM deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. With the introduction
of the power-optimized SPIM driver, it disables the peripheral instance
once the transfer is completed.
As a result, the GPIO takes control over the SCK pin and drives it
based on pinctrl configuration which causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).
To address this issue, a patch was introduced to the SPIM driver.
Now, when a SPIM instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This fixes 3 issues that came within PR #59124 for ppp uart usage.
Earlier start/stop of ppp was done at enable() but that
was removed in PR #59124. Now putting enable/disable() back and
putting start/stop there.
Additionally, there was a double ppp carrier ON when NET_EVENT_IF_DOWN.
For that net_if_carrier_on/off is set in uart ppp.c driver.
Also, maybe worth to be mentioned that after PR #59124 there is no
ppp carrier off when lcp is disconnected, for workaround that change,
application should use ppp dead/running events.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
This commit adds input clock selection to the RTC driver. This
is required to allow for the real hardware to operate. The
QEMU emulated hardware ignores the input clock settings.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
The MC146818 driver was not properly initialized
by the driver, interrupts where not handled correctly,
and the alarm feature was not implemented properly.
This commit fixes these issues, while removing some
code which became redundant as the MC146818 driver
was patched.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
when ap mode is enable,
we don't enable iface by `net_eth_carrier_on` before,
this will cause wifi tx error.
this patch fix this issues.
Signed-off-by: YuLong Yao <feilongphone@gmail.com>
When channel set to WIFI_CHANNEL_ANY, ap will not work.
This patch choose channel 0 when channel is WIFI_CHANNEL_ANY.
Signed-off-by: YuLong Yao <feilongphone@gmail.com>
The default decoder would take the micro-unit value of the old sensor
value and multiply it by INT32_MAX. This would, at times, cause an
overflow for the int64_t which is the cause of some bugs like when
-7952 was used (-7952000000 * INT32_MAX < INT64_MIN). Instead the new
math converts:
- `value_u * INT32_MAX / ((1 << header->shift) * 1000000)`
to a bitmap:
- `sample.val1` consumes the upper `N` bits
- `sample.val2 * BIT(32 - N) / 1000000` consumes the lower `32-N`
bits
This both improves the accuracy, and avoids the overflow since
`shift` is guaranteed to be between 0 and 31.
Signed-off-by: Yuval Peress <peress@google.com>
Implement the backend emul API for the ICM42688 motion sensor so it can
be automatically tested by the generic sensor test (see #60394).
Supports all channels (temp, accel XYZ, and gyro XYZ) at each of the
programmable full-scale accel and gyro ranges.
Also fixes an arithmetic bug in the driver that was causing a minor
error in the returned readings.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Add support for fetching individual channels rather than forcing the
application to always fetch them all. Potentially saves few i2c
transactions.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert a few floating point operation to fixed point. May save some
stack and some flash as well on soft-fp systems.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The register space for the device is on 8 bit, use uint8_t for register
address to the low level read and write functions.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
SiLabs' sleeptimer driver supports several hardware peripherals, of
which the counter driver so far only supports the RTCC-based variant.
This patch adds support for the SYSRTC-based sleeptimer implementation,
which is required for Gecko SoCs that do not have an RTCC module.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
sensor_value_from_double was used, but sensor_value_from_float
should be used as the parameter is a float
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When compiling the cadence uart, a warning is generated for the
zephyr/zephyr.h include. Fix it to be zephyr/kernel.h.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The docstring for uart_cmsdk_apb_irq_rx_ready says "@return 1 if an
interrupt is ready, 0 otherwise" but the function actually returns 2 on
success. This commit fixes this to conform with serial driver API.
Signed-off-by: Jason Mitchell <jmitchell@radicalsemiconductor.com>
Removed single offset alignment check mechanism and replaced it with
offset alignment check for each iteration
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
The LIS3MDL driver misunderstands the MD[1:0] bits in CTRL_REG3.
Correct this so that all ODR settings are functional.
Currently, single-conversion mode is enabled when fast ODR is set,
resulting in only one measurement being taken before the device
immediately returns to power-down mode. The result is that all fast-ODR
rates (155 and higher) are not usable when assigned to CONFIG_LIS3MDL_ODR.
Continuous mode is the only mode truly supported by this driver and should
always be used.
Signed-off-by: Aedan Cullen <aedan@aedancullen.com>
Change the gpio-keys and zephyr,gpio-keys so that they can both be used
with the input subsystem driver. Make the zephyr,code property optional
so that existing out of tree board can still use this node with their
custom code, but change everything else so that an existin gpio-keys
node can be used with the input driver as long as the codes are defined.
From the application perspective, this means that the application can
still use the GPIOs directly, the input specific driver only gets
enabled if CONFIG_INPUT is enabled and the driver can always be turned
off manually.
This makes gpio-keys behave the same as gpio-leds with CONFIG_LED.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since the sensor shell command was converted to use qt31_t, all the
integer values started to show up as rounded up by a fractional unit
when displayed, due to the conversion always rounding down.
Fix that by using the recently introduced DIV_ROUND_CLOSEST and handling
rounding up to next integer explicitly.
Before:
channel idx=44 gauge_state_of_charge value=83.999999
after:
channel idx=44 gauge_state_of_charge value=84.000000
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
After boot the channel used for loading the basefw might be left enabled
by ROM.
Make sure that all channels are in stopped state to have consistency.
On TGL during Zephyr boot one channel is left running:
0:0x0x72800: Channel 0 of host out DMA (used for bassefw loading)
dgcs: 0x4800100,
dgbba 0x6000,
dgbs 32768,
dgbrp 8192,
dgbwp 8192,
dgbsp 0,
dgmbs 0,
dgbllpi 0x0,
dglpibi 0x0
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The controller and the driver support two hardware configurations:
- one three-channel (RGB) LED
- or three single-channel LEDs
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Instead of implementing a custom power off API (pm_system_off),
implement the sys_poweroff hook, and indicate power off is supported by
selecting HAS_POWEROFF. Note that according to the PSCI specification
(DEN0022E), the SYSTEM_OFF operation does not return, however, an error
is printed and system is halted in case this occurs.
Note that the pm_system_off has also been deleted, from now on, systems
supporting PSCI should enable CONFIG_POWEROFF and call the standard
sys_poweroff() API.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
So far the init priories were:
enetc_psi0=60 < enetc_vsin=61 < emdio=70 < ethernet-phy=80
because the Ethernet PSI driver was doing global initialization for the
whole NETC complex, including enabling MDIO function (due to the way
the HAL works).
Change to use the default init priorities:
mdio=60 < phy=70 < eth=enetc_psi0=80 < enetc_vsin=81
by executing at an early stage the NETC global initialization. This also
allows to match the DT hierarchy representation of NETC with the
effective priorities assigned.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The led identifer should refer to devicetree ordering, not to the index
used by the controller. This way, it will be possible to deactivate
some leds or to reorganize the indexing if necessary.
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Some boards may have connected the enable pin of the chipset to a GPIO.
On these boards, it is necessary to configure and set this GPIO before
using the chipset, otherwise the I2C circuitry is disabled.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
The LP50XX family has a specific register to reset the configuration to
default state from any other state. Use this instead of relying on the
manual configuration of registers during startup.
Based on initial work from: Marek Janus <marek.janus@grinn-global.com>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Add support for LP5009, LP5012, LP5018 and LP5024 devices which only
differ by the number of LEDs they can control.
Also, update application sample to run on all these new supported
devices.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
registers.
The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Add definitions for CLKEN/CLKSEL registers, which are used to control
peripheral clock on the variant of the PL011 UART present in Ambiq SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
This commit addst pinctrl support for Apollo4 SoCs.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The spi_nor erase op selection was based on the alignment of the end of
the region to be erased. This prevented larger erase operations being
selected in many cases
Closes#60904
Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
Adds a new I2C shim driver for Intel SoCs. Builds upon the SEDI bare
metal I2C driver in the hal-intel module.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Sometimes, channel C may write wrong register to the target device.
This issue occurs when FIFO2 is enabled on channel C. The problem
arises because FIFO2 is shared between channel B and channel C.
FIFO2 will be disabled when data access is completed, at which point
FIFO2 is set to the default configuration for channel B.
The byte counter of FIFO2 may be affected by channel B. There is a
chance that channel C may encounter wrong register being written due
to the FIFO2 byte counter wrong write after channel B's write operation.
The current workaround is that channel C cannot use FIFO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
On ACE a seperate, soc specific, interrupt mask needs to be enabled
to unmask the interrupt. Do so for GPDMA.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
ESP32 SoC refactoring added new SOC_SERIES definition,
which was missed by #60183. This fixes it.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
SPI driver is current working for common SPI devices.
However, addressable LED like WS2812 requires MOSI line to be
default LOW during initialization. This PR adds such option.
This has no effect on common SPI operation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Modify the NPCX driver erase method to allow 0x1000 byte size erases
along with 0x10000 byte size erases based on input parameters
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Add initial support for NXP S32 GMAC/EMAC:
- it's a copy-implementation with DMA data buffers and buffer
descriptors in non-cached memory (buf len and ring size configurable)
- PHY interface selection only implemented for S32K3 devices as it is
SoC-specific
- no PHY driver integration, it works as a fixed link with speed/duplex
configured through devicetree
- supports multicast hash filtering, promiscuous mode, MAC loopback
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Change the eth-phy definition so that the phy is pointed by a phandle
rather than a child node, make the phy device a child of mdio. This
makes more sense from a devicetree hirearchy where the phandles have to
be initialized before the device itself, allows keeping the priorities
in check with CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Format the file `drivers/sensor/max17262/max17262.c` but exclude the
regsiter lookup table in `max17262_sample_fetch()`
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The init function of the MAX17262 sensor doesn't check the return value
of its I2C read and write functions. In case a read operation fails, the
output variable is not updated but the driver proceeds anyways. This can
cause unintended operation due to the potentially un-initialized memory,
such as getting stuck in the polling loop on line max17262.c:245. Update
the init function to abort and pass along the error code when I2C
transactions fail.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Make ethernet phys childs of the mdio device and move the mdio device up
a level on the tree. That makes the device hierarchy coherent with the
required initialization priority and allows keeping the sequence in
check with CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fixes sensor drivers to consistently return -ENOTSUP when an unsupported
channel argument is passed to the sensor_channel_get function.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactor the function to make the execution flow in transceive()
clearer. In particular, return error codes directly, not through
spi_context_complete() which is unnecessary in this case.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver would return the temperature for all channels requested
except relative humidity. Instead, ENOTSUP should be returned for
unsupported channels.
Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
Introduce support for NXP FS26 SBC watchdog. Both Challenger and
Simple watchdog types are supported. Only watchdog functionalities of
the device are supported and any other monitoring feature is either not
supported or disabled.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Do not select CONFIG_CACHE_MANAGEMENT in the Microchip SAM CAN driver
Kconfig but rather leave it up to the SoC/platform Kconfig to enable it as
needed and enable CACHE_MANAGEMENT by default for the Atmel SAM E70/V71 SoC
series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.
Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
Currently on zephyr, RAIL is used only for bluetooth. RAIL library is
needed to use efr32 radio regardless of the protocol used. We add
SOC_GECKO_USE_RAIL kconfig option to indicate if we use radio.
FPU is needed when using RAIL, we configure it if SOC_GECKO_USE_RAIL
is set.
Signed-off-by: Antoine Bout <antoine.bout@silabs.com>
Fix an unused variable build warning that was happening in certain
configurations. Move the variables in the only condition where they are
actually used.
west build -p -b nucleo_f429zi \
-T samples/net/cloud/aws_iot_mqtt/sample.net.cloud.aws_iot_mqtt
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Calculate the Bosch M_CAN Message RAM addresses relative to the Message RAM
Base Address (MRBA), not the offset.
Fixes: #59624
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename the phy-dev property with phy-handle to match the Linux
ethernet-controller binding and move it up to ethernet.yaml so that it
can be used by other drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.
Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
This PR introduces a backend API to be implemented by sensor emulators
that creates a standardized mechanism for setting expected sensor
readings in tests. This unlocks the ability to create a generic sensor
test that can automatically set expected values in supported sensor
emulators and verify them through the existing sensor API. An
implementation of this API is provided for the AKM09918C magnetometer.
A generic sensor test is also created to exercise this implementation.
Observe that this test knows nothing about the AKM09918C; info about
supported channels and sample ranges is discovered through the backend
API. The test iterates over all devices attached to the virtual I2C and
SPI buses in the test binary's device tree, which (theoretically) covers
all sensors. Sensors whose emulator does not exist yet or does not
support the backend API are skipped.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The sensor driver uses the value 500 to convert bit counts to microgauss
values, but it should actually be 1500. Edit the driver unit test to use
the macro instead of a magic number.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
DMA only works with non-cached memory regions in H7. Check them
and return an error if they don't match this condition.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Add support ADC SAR for NXP S32. ADC SAR diver
support 3 group channels (precision, standard
and external), run normal trigger in oneshot
conversion mode with 2 callbacks normal end
of conversion and normal end chain callbacks.
An instance only run on 1 group channel and
1 kind of callback at the same time.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Enable SPI SDHC driver to manage card power via pwr-gpios property.
Control for this property was previously partially implemented. When
this property is present, the SPI SDHC driver will use it to control
power to the SD card.
Power is toggled during SD init, so this power control can make SD init
more reliable as the power toggle will insure the SD card state is reset.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The IEEE 802.15.4 API and networking subsystem were using several
inconsistent timestamp resolutions and types. This change defines all
timestamps with nanosecond resolution and reduces the number of
available types to represent timestamps to two:
* `struct net_ptp_time` for PTP timestamps
* `net_time_t` for all other high resolution timestamps
All timestamps (including PTP timestamps) are now referred to a
"virtual" local network subsystem clock source based on the well-defined
types above. It is the responsibility of network subsystem L2/driver
implementations (notably Ethernet and IEEE 802.15.4 L2 stacks) to ensure
consistency of all timestamps and radio timer values exposed by the
driver API to such a network subsystem uptime reference clock
independent of internal implementation details.
The "virtual" network clock source may be implemented based on arbitrary
hardware peripherals (e.g. a coarse low power RTC counter during sleep
time plus a high resolution/high precision radio timer while receiving
or sending). Such implementation details must be hidden from API
clients, as if the driver used a single high resolution clock source
instead.
For IEEE 802.15.4, whenever timestamps refer to packet send or receive
times, they are measured when the end of the IEEE 802.15.4 SFD (message
timestamp point) is present at the local antenna (reference plane).
Due to its limited range of ~290 years, net_time_t timestamps (and
therefore net_pkt timestamps and times) must not be used to represent
absolute points in time referred to an external epoch independent of
system uptime (e.g. UTC, TAI, PTP, NTP, ...).
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Adapts a return type to the API specification. The changed return type
is not referenced anywhere so it can be changed without breaking
backwards compatibility.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Add driver for HX8394 TFT LCD controller. This controller is driven via
MIPI DSI, and is configured for a 720x1280 display
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Most implementations have the same logic, with only a different write
block size. Now that we are using write-block-size from the device tree,
it is possible to use a default implementation that can be overridden if
necessary.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
STM32L5 have a write block size of 8, but STM32U5 and STM32H5 have a
write block size of 16. Convert write_dword() and
flash_stm32_write_range() to write write-block-size data at a time.
Fixes#60724
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
STM32L5 have a write block size of 8, but STM32U5 and STM32H5 have a
write block size of 16. Use write-block-size from the device tree
instead of hardcoding this value when validating the range of write
operations.
Fixes#60724
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
Update to shim driver compatible with the hardware block
in S32K344. Configure the pins before initializing I2C
to avoid happening bus busy.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Each CAN instance of S32K344 has different maximum number
of message buffers, depends on payload. Add kconfig that
defines maximum number of message buffers for concurrent
active instances and update driver to compatible
support S32k344.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Return ENOTSUP when getting the humidity channel if the driver is used
with a BMP280, since this device does not provide humidity readings.
Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
LEUART_Typedef isn't defined for every possible target.
It should be included in the conditional compilation part.
For proper handling of UART location, the driver needs
to remember pin configuration of both TX and RX.
This was broken in #60695 is brought back here.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
When testing Wi-Fi with MQTT/HTTP/Socket features,
network stacks can be full very fast, causing network issues
and eventual crash.
By analyzing used stacks,increasing the stack size described
in this PR fixes most use cases related above.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a mutex to protect shared data-structures, since shell can have
multiple backends.
Signed-off-by: Marco Argiolas <marco.argiolas@ftpsolutions.com.au>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.
Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.
The CCU4 module also has a capture mode. Capture support will be added
in the future.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
CC13/26xx's pinctrl_cc13xx_cc26xx.c driver included ioc.h and
(indirectly) pinctrl_soc.h which contained duplicate defines.
This change removes the header conflict and redundant definitions.
This prepares for subsequent changes in this change set that add
additional flags to the pinctrl driver which would otherwise trigger the
header conflict.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Added a driver for the DFRobot A01NYUB distance sensor. This sensor
sends its readings via UART at 9600 baud. This driver uses interrupts
to read the data from the sensor.
Signed-off-by: Oliver King <oliver.king@steadconnect.com>
Startup power domains according to the expected final state given the
power supply and PM device runtime support.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Let the driver compile without `PM_DEVICE_POWER_DOMAIN`, in which case
the driver only controls the GPIO, without notifying dependant devices.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This is a follow-up to commit 4c20403629.
CONTAINER_OF() cannot be used to obtain the device pointer from its
data pointer as this data is not contained in the device structure.
Instead, use a dedicated member in the device data structure to store
the device pointer.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for flash NOR memory devices on a NXP S32 QSPI bus. The
driver uses a fixed LUT configuration assuming a default standard page
size and erase types, and allows to select between multiple read/program
instructions/modes. It is also possible to read the flash device
characteristics from the device at run-time as long as the memory is
JESD216 compatible, providing more flexibility.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The NXP S32 QSPI controller acts as an interface to up to two serial
flash memory devices, each with up to eight bidirectional data lines,
depending on the platform. It is based on a LUT enginee to interface
through commands with different memory types including flash NOR and
Hyperram.
This patch adds support for the QSPI in S32K344 which supports a single
memory device (side A) with up to four bidirectional data lines and SDR
only. Nevertheless, the memory controller is implemented flexible enough
to be extended to support more feature-rich QSPI blocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit aligns TWIM shim to utilize memory-region property.
The memory-region is not required property that enables user
to specify placement of dma buffers in memory region.
It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
There are two different i2c node properites `zephyr,flash-buf-max-size`
and `zephyr,concat-buf-size`. In the end max value of that two is used
to define size of the message buffer.
It's redundant to store both values in device config structure.
Changed config structure to contain only bigger value.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Add initial version of Infineon CAT1 counter driver
Add initial version of binding file for Infineon
Add counters to psco6 dtsi
Add external trigger pin that runs counter
Signed-off-by: Pavlo Havrylyuk <pavlo.havrylyuk@infineon.com>
Each PSCI interface versions have different DT compatible strings
like arm,psci-0.2, arm,psci-1.1 and so on. However, the same driver
can be used for all the versions by adding #define DT_COMPAT for
required version and #undef DT_COMPAT for default version.
Add support for PSCI cold reset, warm reset and cpu-on function IDs.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
This is Intel's proprietary IP which controls individual module
reset signals. During each system driver initialization, these
reset signals will be used to bring module out of reset state.
Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
This is Intel's proprietary IP which supply the clock for all the
system peripherals. Clock manager is initialized only one time
during boot up by FSBL (ATF BL2) based on external user settings.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Ethernet MAC addresses are not unique enough
use unique_device_ID full range (96 bits)
call crc32_ieee() to generate last 3 bytes of mac address
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Currently, HCI packet handling does not consider the BT_RECV_CONTEXT
choice selection. It calls bt_recv() and bt_recv_prio() only depending
on the HCI packet type and event flags.
However, for selections other than BT_RECV_BLOCKING, the "HCI driver
shall not call bt_recv_prio()". Fix that by only calling bt_recv_prio()
when CONFIG_BT_RECV_BLOCKING is enabled.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
and enabled proper nrfx driver instance; instead, use one option per
peripheral type and include the corresponding shim driver flavor into
compilation basing on that option (not the one that enables the nrfx
driver as it was incorrectly done so far in some cases)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previously the driver was retrofitted to the kscan api, handling it as a
input device with one row and three columns. With the move to the input
subsystem each input can have its proper input code instead.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
STM32H5 series lacked support for MCO configuration.
Added SOC_SERIES_STM32H5X to approperiate kconfig MCO source
configurations. Added new MCO sources from H5 series and
updated the clock_stm32_ll_h5.c with MCO configuration.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
This commits adds the ability to use Silicon Lab chips as an I2C
target. This could be used together with the EEPROM target
driver.
Signed-off-by: Kai Meinhard <kaimeinhard@hotmail.de>
The support for capability IEEE802154_OPENTHREAD_HW_MULTIPLE_CCA is added
to the ieee802154_nrf5 driver.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Startup power domains according to the expected final state given the
power supply and PM device runtime support.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Let the driver compile without `PM_DEVICE_POWER_DOMAIN`, in which case
the driver only controls the GPIO, without notifying dependant devices.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enable display rotation using the NXP pixel pipeline (PXP). The ELCDIF
will only utilize the PXP if a framebuffer equivalent in size to the
screen is provided to display_write. The rotation angle can be
configured via Kconfig at build time.
Fixes#59921
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP Pixel pipeline engine (PXP) is a 2D DMA engine capable of
accelerating display rotation, color space conversion, and limited
2D blending operations. This DMA driver only supports rotation of a
framebuffer, via a set of custom dma_slot values. Only DMA channel 0
is supported or utilized.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Updated the driver to support low power mode.
Introduced "enable-low-power" flag in device tree to
control(on/off) low power mode.
If flag added in DTS, during sleep BBLED will switch off the LEDs.
Otherwise BBLED will continue the configured blinking pattern on LEDs.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Add support for resetting controller at boot, and update FT5336
documentation to indicate that the FT3267 IC is also supported by this
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for RM67162 MIPI display controller. This controller
is configured to run in MIPI command/DBI mode, driving a 400x392 OLED
display.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix support for DCS long write command in DSI mcux driver, to enable use
with displays that require this command for full support.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Only setup DPI input from LCDIF if MODE_VIDEO is set, as this
is the the only case where input from the LCDIF would be required to
drive the display. Do not populate the dpi_config structure unless a
reference the the NXP LCDIF device is provided, since this is the output
device providing DPI data.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fixup support for DCS_LONG_WRITE command in DSI MCUX 2L driver. Since long
DCS commands may benefit from nonblocking I/O, add support for non blocking
transfers to the DSI driver.
This commit also corrects the interrupt number for the RT595, which uses
the DSI_MCUX_2L IP block.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Make DPI mode an optional configuration for the DSI MCUX 2L driver.
DPI mode will only be enabled when the MIPI is attached in video mode,
since this is when DPI formatted packets are expected.
This will enable the DSI driver to also support DBI/command mode, for
displays that use this format.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add DSI video mode flag to MIPI configuration, to indicate to MIPI
drivers that this display uses video mode and must be refreshed
constantly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement a driver for the PWM controller MAX31790. This driver
also implements the RPM mode of the controller, which can
be accessed via setting pwm_flags_t accordingly to macros
defined in the driver specific header.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fix a build error introduced in 9f02eeadf8, the async pointers are only
available when UARTE_ANY_ASYNC is set.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
STM32F1 series RTC is not compatible with other STM32F1 series,
and it uses a different LL API.
Current implementation of the driver doesn't take this into account,
so we need to explicitly exclude STM32F1 series support until
some changes are made.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Define only once the CRYP_DATATYPE_8B for the stm32h5 serie
This macro is in modules/hal/stm32/stm32cube/stm32h5xx/d
rivers/include/stm32h5xx_hal_cryp.h
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Previously, only a single type of ADCs was always available
in the ADC shell. This change enables the usage of the ADC
shell for different ADC types at the same time.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This puts a ifdef guard around the inclusion of ACPICA header
file. The ACPICA module is not active unless CONFIG_ACPI is
also enabled so we should not be using that header without
CONFIG_ACPI also being enabled.
This was discovered by Coverity.
Fixes#60484
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a check of the return of clock_control_get_rate(),
and returns error in uart_configure() if unsuccessful in
getting clock rate.
Fixes#60478
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Interrupt callbacks may want to configure GPIO pins on the port expander,
e.g. to change the polarity of a level interrupt. This would cause a
deadlock because the callback handler would still be holding the lock.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This adds the CONFIG_UART_USE_RUNTIME_CONFIGURE guard to
disable the API function pointers if the kconfig is not enabled.
Both .configure and .config_get should only be usable if runtime
(re-)configuration of UART is needed.
Ifdef guards are added to drivers previously lacking this guard.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When building the driver for efr32bg27_brd2602a none of the condition
matches and the compiler warns for:
hwinfo_gecko.c: In function 'z_impl_hwinfo_get_reset_cause':
hwinfo_gecko.c:38:18: warning: unused variable 'rmu_flags'
38 | uint32_t rmu_flags = RMU_ResetCauseGet();
This fails the bi-weekly build, add a __maybe_unused to silence the
warning.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This fix a build issue where ICM42688_DECODER is enabled but
SENSOR_ASYNC_API is not, which results in some structures in an
orphan section:
warning: orphan section
`._sensor_decoder_api.static.invensense_icm42688__decoder_api_' from
`libdrivers__sensor__icm42688.a(icm42688_decoder.c.obj)'
being placed in section
`._sensor_decoder_api.static.invensense_icm42688__decoder_api_'
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Use a combination of sys_cpu_to_be16 and i2c_burst_write_dt for setting
16 bits registers. Get rid of a bunch of temporary variables, custom
conversions and few bus writes.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The current ID for BQ274XX_DEVICE_ID is actually the one for the
BQ27421. The driver seems to work with the BQ27427 as well, at least the
common and extended commands are the same, so add that variant as well,
rename the existing one and print the currently read ID when the ID
check fails.
The configuration registers have a different offset though, so add a
register offset table and make the device rcognize the right one un
runtime based on the device ID.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Use i2c_reg_write_byte_dt instead of bq274xx_cmd_reg_write. The wrapper
does not add anything anyway.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change bq274xx_sample_fetch to support SENSOR_CHAN_ALL. This makes it
possible to get the sensor data using the sensor shell, besides being
generally convenient.
Also drop a redundant comment.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The device technical reference manual says "The Sealed to Unsealed key
has two identical words". Use two different defines with the same value
in the code so it's somewhat less ambiguous that the double write is
intentional.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a retry count limit to config update mode loops, this way the system
can still boot if there's an issue with the device. The normal sleep
should be enough for correct operation, adding a conservative limit.
Rework the delays to be unambiguous while at it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix the calculation for designenergy_mwh, as right now it's using a
float casted straight to an int, which results in the factor rounded
from 3.7 to 3. Also rework both that and taperrate so that they don't
use floating point.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Control reg write seems to support two bytes mode (the technical
reference shows example of that), so use a single i2c_write_dt there.
Also drop a couple alias variables from bq274xx_cmd_reg_write.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add the bq274xx_ back to the static function prefixes for the bq274xx
driver.
These have been removed recently but every other sensor and most Zephyr
driver have static function prefixed, this helps avoiding ambiguity in
list files, stack traces, setting debugging breakpoints etc.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added a parameter inside the Channel Number macro since
the LPC55S36 expects an address rather than a static number.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
LL name for PLL1Q is not the same across STM32G0, STM32WL, STM32H5 and
STM32H7 families. This allows to choose the proper definition depending on
the family.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
memcpy of a sub-structure in a structure was using the structure size
of the parent structure instead of the sub-structure.
fixes: #59548
Signed-off-by: David Leach <david.leach@nxp.com>
Enabled support for is31fl3733 driver. This driver supports
the full LED API, and enables the following features of the is31fl3733:
- individual LED dimming
- individual LED enable/disable
- bulk writes of LED enabled and dimming states
- global LED current limit
- blanking (via custom API)
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
Add Nuvoton numaker series flash memory controller(FMC) with erase,
read & write features of soc-flash. Also update Nuvoton manifest
to include zephyrproject-rtos/hal_nuvoton#6.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
channel_pos_read bit was being cleared with a sensor channel enum value
instead of the encoded bit position.
Signed-off-by: Al Semjonovs <asemjonovs@google.com>
Forcing the usage of the RC oscillator and keeping it on turns out
to have detrimental effects to the readings by default. The default
clock mode settings are perfectly fine.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Use generic symbols defined in ieee802154.h for packet/FCS size instead
of redefining them in the driver header.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
In case upper layer does not follow the convention, and the net_pkt
provided to the nRF 15.4 driver had a payload larger than the maximum
payload size of an individual 15.4 frame, the driver would end up with
buffer overflow.
Fix this by adding an extra payload_len check before attempting to copy
the payload to the internal buffer.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add a new pinctrl type to control peripheral modules' specific IO
characteristics such as tri-state, the power supply type selection (3.3V
or 1.8V), and so on. In NPCX series, the corresponding registers/fields
are irregular. This CL wraps these definitions to dt nodes and put them
in pinctrl property if needed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Create clock_stm32_ll_mco.h file to bring stm32_clock_control_mco_init,
mco1_prescaler, mco2_prescaler, MCO1_SOURCE and MCO2_SOURCE definitions
which were previously in clock_stm32_ll_common.{c,h}. This is done so that
stm32_clock_control_mco_init can be called from clock_stm32_ll_h7.c.
Also update Kconfig.stm32 and add new MCO sources to allow H7 support.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
To demonstrate how to configure Zephyr to use the IPM
driver over the IVSHMEM subsystem. Since this driver
is intended to generate inter QEMU VM notifications
it was better to create a sample app using the shell
for quick demonstration for the users.
Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
This driver is built on top of the IVSHMEM doorbell
notification mechanism providing an unified way
to generate inter VM interrupts.
Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
If a timer is left running on an stm32mp1, (most likely) on the next run
the timer is stuck.
A simple timer reset before initialization fixes the issue.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
When ENET_ENHANCEDBUFFERDESCRIPTOR_MODE enabled,
MAC will automatic capture receive nanosecond from 1588TMR
and return back to ENET_ReadFrame. It is a highest accuracy
recv timestamp_ns, we do not need manually read from 1588TMR.
By this change, receive timestamp accuracy increase
from 20us to 200ns above.
Signed-off-by: Chen Caidy <chen@caidy.cc>
The Broadcom pcie setup has a devicetree dependency like:
/pcie/paxdma -> /pcie/pcie -> /soc/pl330
Add a separate init symbol for iproc_pax_v2 so that these gets
initialized in order, fixes this error:
$ west build -p -b bcm958402m2_m7 tests/kernel/common \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /pcie/paxdma@4e100800 POST_KERNEL 40 < \
/pcie/pcie@4e100000 POST_KERNEL 50
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Set a dedicated priority for the video_mcux_csi instead of using the
default kernel device init priority. This allows initializing the device
in a sequence that matches the devicetree hirearchy compared to mt9m114.
Fixes the error:
ERROR: /soc/csi@402bc000 POST_KERNEL 50 <
/soc/i2c@403f0000/mt9m114@48 POST_KERNEL 60
found using:
$ west build -p -b mimxrt1064_evk samples/subsys/video/capture \
-DCONFIG_CHECK_INIT_PRIORITIES=y
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59802
The DMA controller only supports one transfer size, but
the Zephyr DMA driver api allows specifying a source_data_size
and dest_data_size which might be different. An old
version was always using dest_data_size for the transfer
size (variable is called "width"), but a recent change
made the driver use the MIN for the source and dest data
sizes. The MIN choice breaks the I2S driver because it
always set source_data_size to 1, but dest_data_size was
typically 4 for like two-channel 16-bit PCM data. So the
old driver worked using dest_data_size, but the new driver
broke I2S using MIN since source_data_size was 1.
To prevent confusion, change the DMA driver to assert that
source_data_size and dest_data_size are the same.
Also assert that the source_address and dest_address for
each block_config are properly aligned for the transfer size,
since that is a documentated requirement for the DMA controller.
Also rename max_xfer to max_xfer-bytes to be more clear what
the units are, and use this value in many places that
are comparing block_size in bytes rather than converting
block_size to words by dividing by width and
then comparing to NXP_LPC_DMA_MAX_XFER.
Signed-off-by: Mike J. Chen <mjchen@google.com>
The MCUX DMA controller only supports a single data_size
for a DMA transfer, not separate ones for source and
dest. An older version of the DMA driver used
dest_data_size as the DMA transfer size, but the
current one uses MIN(dest/source) as the trasnfer
size, which breaks case when SPI wants to do 2-byte
transfers.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Fix for bugs described in:
https://github.com/zephyrproject-rtos/zephyr/issues/59803
1. the size argument passed to i2s_write() was being ignored.
change the code so that the size is queued with the
tx mem_block and the dma transfer is configured with this
size.
2. change how CONFIG_I2S_MCUX_FLEXCOMM_RX_BLOCK_COUNT and
CONFIG_I2S_MCUX_FLEXCOMM_TX_BLOCK_COUNT are used so that
the queue buffers are allocated correctly when the two
config values are not the same
3. set source_data_size and dest_data_size to be the same
since the DMA controller can only set one size per
DMA transfer. the driver was already computing a dest_data_size
but always passing 1 for the source_data_size.
For I2S RX case, I think source_data_size should be
set to the expected FIFO read size instead of dest_data_size.
Also some smaller improvements like:
* don't allocate two dma_blocks for tx in the static dev_mem
when it only needs one
* memset both rx_dma_blocks together instead of separtely
* set dma_cfg block_count for tx and rx statically instead
of at runtime
Signed-off-by: Mike J. Chen <mjchen@google.com>
Depending on the ADC implementation it might happen that
the driver is waiting on an external interrupt. If this interrupt
gets lost, for instance due to a race condition with an external
port expander, the system will get stuck.
Making this configurable allows the user to recover from such
an error.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
A recent factorisation moved F2 to non const TIM_TypeDef.
This is an error, move it back to const TIM_TypeDef.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fixes a bug in intel_adsp_gpdma_release_ownership(). Before fix, this
function actually did nothing for ACE platform and the ownership was
not released. Now ownership is released to host CPU + DSP.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
This PR is Calling "clock_control_on" and checking return value
(as is done elsewhere 10 out of 11 times)
CID 322066: Error handling issues (CHECKED_RETURN)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
AXP192 is a small and simple power management IC featuring different
LDOs, DCDCs, AINs and also GPIOs. It also offers functionaltiy for
battery management.
This change includes the basic regulator driver functionaltiy for
LDO2-3 and DCDC1-3 as well as the mfd driver layer. Further drivers
for GPIO and ADC will follow.
Drivers have been developed and tested on M5StackCore2, an ESP32-based
board. Support for M5StackCore2 is still in progress.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
Add few missing check on gpio_add_callback and gpio_add_callback_dt
calls, fixes a coverity warning.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
GT911 IC uses the INT pin to select the correct I2C address during
reset. However, some boards may not route this pin (or may only support
receiving inputs on it). This results in the I2C address selected by the
GT911 IC being arbitrary based on the state of the (floating) INT pin.
To resolve this, introduce an `alt-addr` property for this device. When
set, the INT pin will not be pulled low. Instead, the I2C address will be
probed at runtime, starting with the devicetree address and falling back to
`alt-addr`.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
New reset function which performs a full power reset
New hibernate function which powers down and wakes after
specified timeout
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The `spi_mcux_transceive` had 2 return calls when the
`CONFIG_SPI_MCUX_LPSPI_DMA` flag was active. The first return would be
called and the later was unreachable. With the fix, now the return calls
are mutually exclusive. Also, the `transceive` call is not compiled with
the `CONFIG_SPI_MCUX_LPSPI_DMA` flag is active.
Fixes#59533
Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
Only 12-bit resolution is currently available in the driver,
and each of the 16-bit samples store the actual data
aligned to the left.
A sample should be shifted 4 bits to the right to allow
proper interpretation.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
With the phy-clock being specified in devicetree (and thus under user
control), there is no need to artificially enlarge the DPHY clock to
insure it is fast enough. Instead, we can calculate the DPHY clock
directly, selecting the closest realizable value that is at least as
fast as the value requested by the user.
Fixes#59215
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.
Fixes#48606
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add support of the dedicated STM32F0 14 MHz HSI clock for ADC.
Also remove ADC clock source selection as it is obsolete.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When CONFIG_PM_DEVICE is enabled, the FDC2x1x driver includes code that
doesn't access the name of the shutdown pin's GPIO port correctly.
Correct this so the code derefences the right struct members.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The FDC2X1X driver depends on newlib in Kconfig. This prevents the
driver from being built in a native_posix testing environment, which uses
an external libc from the host. Allow the driver to be built with an
external libc as well.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
STM32 RTC driver for the new RTC API.
Can't coexist with old COUNTER based RTC
Though supported by HW, RTC_ALARM still to be supported by driver
Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
New RTC API seems to conflict with old RTC implementations based on
COUNTER
This scheme follows Zephyrproject-rtos issue 56599 while keeping backward
compatibility.
Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
The SSP driver depends on DMA as there are references in the devicetree,
but it currently initialize before the DMA driver itself. This is
exposed by the build time priority checking
(CONFIG_CHECK_INIT_PRIORITIES=y) and shows up as:
ERROR: /soc/ssp@77a00 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77800 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77600 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
...
Bumping up the SSP priority so the initialization is in sync with the
devicetree node hirearchy.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The set_brightness function of the led_pwm driver uses a default PWM
period (defined in the pwms DT property) to compute a pulse passed to
the pwm_set_pulse_dt function. If this default period is greater than
2^32/100 nanoseconds (about 43 milliseconds) then the calculation may
overflow.
This patch prevents this overflow by running the pulse computation under
a cast with a larger type (uint64_t).
Reported-by: Scott Worley <scott.worley@microchip.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Add a Kconfig to have the ability to fine tune the amount of RAM that
the driver uses based on the number of channels expected to be used.
Most of the code is already there but just need this Kconfig to get the
benefit of it by reducing the size of the statically created arrays.
Also change the number of channels field in the configuration to a byte
instead of a 32 bit integer because that should be sufficient to
describe the number of DMA channels.
Rename LPC DMA Driver Kconfigs with namespace to MCUX_LPC
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Setting higher priority to reset controller to initialize it before
other dependent drivers running at CONFIG_KERNEL_INIT_PRIORITY_DEFAULT
priority which is 40.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
The rv32m1 pinctrl driver depends on clock controller, add a new symbol
and set it so it gets initialized after that, and before other devices.
Fixes:
$ west build -p -b rv32m1_vega_ri5cy tests/kernel/common \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pinmux@41037000 PRE_KERNEL_1 1 < \
/soc/clock-controller@41027000 PRE_KERNEL_1 30
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The Kconfig IEEE802154_NRF5_MULTIPLE_CCA option is added.
The new functions `z_ieee802154_nrf5_extra_cca_attempts_set` and
`z_ieee802154_nrf5_extra_cca_attempts_get` are added.
The ieee802154_nrf5.c is updated allowing to pass extra cca attempts
to nRF 802.15.4 Radio Driver.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The macro used in an assert statement in the `sys_mm_drv_page_phys_get()`
function was using an older version of the naming scheme, fixed now.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
Convert the GT911 driver to the input subsystem, fix the existing boards
to work in the default config.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Flash API states that drivers should support write requests without
any restrictions on location or alignment of the source buffer.
Due to hardware limitations of the QSPI peripheral, the nrf_qspi_nor
driver currently fails to perform a write from a RAM buffer that is
not word-aligned. Fix this by using in such case the same mechanism
that is used when the source buffer is located in the internal flash
(copy data to a buffer located on stack).
Also correct the length parameter for writes from this stack-based
buffer to be the actual data chunk length, not always the size of
the buffer (as for CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE > 4
this may lead to overwriting of some data located next in the flash).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add UDC driver for STM32 based MCU, relying on HAL/PCD.
This has been tested with cdc_acm sample on the following boards:
- 96b_carbon (STM32F4)
- disco_l475_iot1 (STM32L4)
- nucleo_wb55rg (STM32WB)
- nucleo_h723zg (STM32H7)
- stm32f3_disco (STM32F3)
This fails at runtime for the following:
- b_u585i_iot2a (STM32U5)
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add a semaphore to ensure that only one transaction
happens at a time when threads want to transfer
simultaneously.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Cache the delimiter string length in `parse_params`, instead of
calculating it on each character in the match buffer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Given the following response: `+CIPSTA:ip6ll:"FE80::EDC:7EFF:FEDD:110C"`
The response delimiter is `:`, but there is also a quoted string that
contains the delimiter character. These delimiters should not be
considered when searching for the end of a parameter.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This adds support for the bosch bmi085 and bmi088. This also includes
support for data sync mode.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When the image is chain-loaded, clocks may already by initialized.
The driver was lacking support for already configured HSE and
PLL sources. When CONFIG_ASSERT=y get_startup_frequency was
failing since it did not recognize these sources.
It's the same issue that was addressed in #58109 for stm32u5.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
Check and propagate two return values.
Don't need to check return of the part id request, but make
sure that the value is initialized before the comparison.
Fixes#58575
Coverity-CID: 316152
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The return value is consciously not checked, because the operation
is expected to fail. And the real request is executed afterwards.
Fixes#58593
Coverity-CID: 316443
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This patch adds support for PWM blink which is found in intel's
PCH hardwares.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Changes the Kconfig option to allow disabling mutex support, this
is to allow other Kconfig options to disable the feature.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Change the default mbox initialization priority so that it initializes
before ipc, as some ipc drivers depends on it.
Found with:
$ west build -p -b nrf5340dk_nrf5340_cpuapp \
samples/subsys/ipc/ipc_service/icmsg_me \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /ipc/ipc1 POST_KERNEL 46 <
/soc/peripheral@50000000/mbox@2a000 POST_KERNEL 50
ERROR: /ipc/ipc0 POST_KERNEL 46 <
/soc/peripheral@50000000/mbox@2a000 POST_KERNEL 50
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The underlying HAL driver may improperly forward an samplerdy event even
if it's disabled in the configuration. Ignore the event to prevent error
logs until the issue is fixed in HAL.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
remove the sdk based TOTAL_DMA_CHANNELS macro and instead just use the
zephyr driver's num_of_channels field
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When reading multiple ADC channel in parallel, an ADC command chain will be
build. This is similar to a linked list, as every command references the
next command.
Before this patch every ADC command after the first, would always reference
this initial command. So that during execution only two commands (the last
and first) would be executed which resulted in readout of only two analog
values. As Zephyr expected more to come in, the `read_adc` function would
block endlessly.
The patch fixes the behaviour and allows a correct chain to build up.
Signed-off-by: Elisabeth Friedrich <auxsys@flowerpot.me>
PCIe devices refer to interrupt nodes, but are initialized with the same
priority, making the sequence depending on the linking order. Add a new
symbol and set it to one unit after intc to ensure that the
initialization sequence is stable.
Found with:
west build -p -b qemu_cortex_a53 \
samples/drivers/virtualization/ivshmem/doorbell \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pcie@4010000000 PRE_KERNEL_1 40 <
/soc/interrupt-controller@8000000/its@8080000 POST_KERNEL 40
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The intc_gicv3_its driver is currently initializing in POST_KERNEL, but
PCIe device nodes depends on it and are initialized earlier. Change the
init level to PRE_KERNEL_1 to sort that out, and also put the driver in
line with other interrupt controller drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.
Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Removed the unneccessary casts in the functions to remove warnings
during build for SoCs using RAT. Functionality reamins the same,
tested on board.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).
Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
Add I2C target driver used buffer mode. The maximum accessible buffer
is 2044 bytes, the default is 256 bytes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the callback functions of buf_write_received and buf_read_requested
to support buffer mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59575
The dma version of the version of the driver can
invoke multiple intermediate dma transfers, like
when the spi_buf_set count is greater than one.
However, there is a bug where chip select is not kept
asserted for all intermediate dma transfers required
to process the entire spi_buf_set.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Decouple interface and Wi-Fi APIs, Wi-Fi APIs are common independent of
Wi-Fi offload or implemented natively (This is preparation for
introducing Native Wi-Fi).
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
In order for TCA954X driver to work well, we know that
mux root must be initialized before channels.
(see #37786).
This commit is:
- Ensuring that this condition is met at build.
- Document needed values for menuconfig to help user.
- Edit these values for TCA954X test sample
Fixes#40833
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add support of r8a77961 SoC to gen3 series.
Create a dtsi file with a common part for both r8a77951 and r8a77961.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for Renesas CPG driver in order to avoid
mappings inside mmu_regions.c file. Remove MMU region for
Renesas CPG driver.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Delete IRQ lock/unlock calls from 'rcar_cpg_mstp_clock_endisable',
because 'rcar_cpg_mstp_clock_endisable' function is always called
under spin lock.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add associative tables for core and mod clocks.
Add possibility to enable/disable any of core clocks which presents
in the associative table.
Add handler for setting rate to driver and use generic rcar cpg
function for getting rate.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add associated tables of clocks and API for working with these tables,
from this moment the relationship between clocks and their divider are
built. After set rate of some Core clock, driver has to update all
in/out rates of all childrens recursively. During get/set rate calls
if out rate is unknown, we try to get parent in/out rates and its
divider, in case when parent doesn't have valid in/out rates we get
parent of parent and so on until we get parent with a valid in or out
rates.
Add generic Renesas functions for get/set rate of CPG.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Move cpg log module declare to common rcar cpg file. If the module
consists of multiple files, then LOG_MODULE_REGISTER should appear
in exactly one of them. Each other file should use LOG_MODULE_DECLARE
to declare its membership in the module.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for PFC Renesas driver in order to avoid
mappings inside mmu_regions.c file.
Add a new system init function pfc_rcar_driver_init to PFC
Renesas driver for invoking a memory mapping macro.
Note: PFC Renesas driver doesn't use Zephyr Device Model.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).
There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.
Note: it is common approach according to Zephyr documentation.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Added Region based Address Translation (RAT) module driver. Required by
a few Texas Instruments SoCs to fucntion. Uses
sys_mm_drv_page_phys_get() API with device_map() for address translation.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
The block data length field should be in bytes. Setting this to a value
that is not a multiple of the data size results in a user setting error.
Running the ADC DMA test prior to this commit:
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/adc/adc_dma
E: Transfer Error.
I: tc: 0, ht: 0, dte: 0, ule: 0, use: 1
E: DMA sampling complete, but DMA reported error -5
Existing tests using DMA on the nucleo_u575zi_q were not effected
because they only use a data size of one and continue to function
as expected:
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/spi/spi_loopback \
-DOVERLAY_CONFIG="overlay-stm32-spi-dma.conf"
SUITE PASS - 100.00% [spi_loopback]: pass = 1, fail = 0, ...
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/dma/loop_transfer
SUITE PASS - 100.00% [dma_m2m_loop]: pass = 3, fail = 0, ...
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
The tables for the dest and src data width constants were incorrectly
swapped. This commit uses the correct constants and renames the tables.
This change is only cosmetic for the stm32u5 since these constants are
the same but the existing names were probably inherited from another
driver where the p_*/m_* prefix was more appropriate.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Enable DMA error interrupts so that transfer errors are logged and
reported to the callback.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
- This includes the driver, test app, and sample app
- Only the boards\arm\xmc47_relax_kit board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Avoid integer overflow in temp_sq calculation.
For an analysis of the value ranges for the temp_sq calculation
of mx5837-02 see below:
calculation:
dT = adc_temperature - ((int32_t)(data->t_ref) << 8);
data->temperature = 2000 + (dT * data->tempsens) / (1ll << 23);
temp_sq = (data->temperature - 2000) * (data->temperature - 2000);
given needed storage sizes:
t_ref is uint16_t,
adc_temperature is uint24_t,
data->tempsens is uint16_t,
ranges
=> dT: -16776960 <= dT <= 16777215 (25 bit)
=> data->temperature (TEMP):
intermed.(mult): -1099478073600 <= x <= 1099494785025 (41 bit)
TEMP: 2.000 - 131068 <= TEMP <= 2.000 + 131.069
TEMP: -129068 <= TEMP <= 133069 (17 bit)
So worst case we need 17 bit for TEMP, so the square of it would
overflow an int32_t. The nominal measurement range is
only -40 to 85°C, meaning a range of -4000 to 8500.
So normally the result for temp_seq would fit into a int32_t,
but we cast to be better safe than sorry. Also the 64-bit
multiplication won't be the dominating operation of the
whole calculation.
Fixes#58585
Coverity-CID: 316294
Fixes#58594
Coverity-CID: 316521
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add the RCR_PRMS field to toggle the promiscuous mode in the Ethernet
controller.
Register a set_config function that can make use of the field when
CONFIG_NET_PROMISCUOUS_MODE is enabled.
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Replace the timeout for a SPI transceive in slave mode for STM32 DMA
operations with a K_FOREVER. Being an SPI slave means we do not
know when the transaction will start, hence it does not make sense
to have a timeout in such a case.
This will resolve issue #60000.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The adc_driver_api structure provides .ref_internal
which previously was unset.
Now .ref_internal is set to the proper value.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Move LOG_DBG print just after the printed h/w register is read, to avoid
coverity complaining about uninitialized variable.
Fix:
Coverity-CID: 316407 (issue #58591)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Refactor the part of the flash simulator that interacts with the
host when build for native platforms, so it is possible to use
it also with the embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix `PWM_SetupPwm` function being called with `numOfChnls`
argument equal to 2, when in fact only one channel is being set up.
Also add 'U' suffix to `pwmFreq_Hz` unsigned integer argument in
the function call.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
In case of remapped reference counter for physical page
is differ to zero, but TLB entry for virtual address equal to
physical address will be disabled. Valid entry will be somewhere
in virtual space where particular physical page is remapped.
Since in adsp_mm_save_context() routine we go through physical
memory range, we need to include these pages in context save loop.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Currently MIPI devices are set to initialize before display drivers,
which is incoherent with how the mcux mipi-dsi device is declared in the
device tree.
This is detected with build time priority checking:
west build -p -b mimxrt595_evk_cm33 samples/drivers/display \
-DCONFIG_CHECK_INIT_PRIORITIES=y
ERROR: /soc/peripheral@50000000/mipi_dsi@31000 POST_KERNEL 40 <
/soc/peripheral@50000000/lcdif@210000 POST_KERNEL 85
Note that this also changes the priority of dsi_stm32, though that
should be ok since does not appear to have other dependencies in
devicetree.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This change introduces the "_rtc_timer" suffix for the system tick timer
driver "compatible" property and aligns naming conventions with the
actual CC13/26xx SoC series product policy.
This frees up the "_rtc" namespace to introduce additional APIs based on
the same peripheral in the future (not part of this PR):
rtc: rtc@... {
compatible = "ti,cc13xx-cc26xx-rtc";
...
timer {
compatible = "ti,cc13xx-cc26xx-rtc-timer";
...
};
counter {
compatible = "ti,cc13xx-cc26xx-rtc-counter";
...
};
pps {
compatible = "ti,cc13xx-cc26xx-rtc-pps";
...
};
};
Or alternatively an MFD pattern with similar requirements.
Fixing the namespacing now makes sense standalone as it reduces the
chance of custom drivers being broken in the future.
Redundant extension of the mandatory system clock devicetree node is
replaced with a single `status = "okay"` which seems to be the more
sensible default to avoid user error when defining custom boards.
Knowledgeable users can still override this if really needed.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Refactor the host libC accesses to use the native simulator
host trampolines.
In this way we support building this driver with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.
This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.
This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:
$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
cut -d/ -f6 |\
sort -u
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The code declares variables in switch-case blocks. This
seems to compile without an error on GCC 11 and newer,
but older compilers don't accept this code.
Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>
The ISM330DHCX driver immediately segfaults when run in SPI mode. A bad
pointer is being passed into the `dev` param of `ism330dhcx_spi_read`.
Tracing this back, it appears that the handle field of the ctx struct
is being set to the device's data struct while `ism330dhcx_spi_read`
expects `ctx->handle` to be a pointer to a device struct.
Modify `ism330dhcx_spi_init()` to insert the correct pointer into the
context struct. Unfortunately this requires a cast to discard the
`const` qualifier, but this is how it is done in I2C mode (see
`ism330dhcx_i2c_init()`). The only other way would be to change the
declaration of `stmdev_ctx_t`, which is owned by the HAL module.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
gpio_nrfx_port_get_direction() is meant to check which inputs
are enabled, and does so by checking one bit at a time
and setting that bit into the "input" parameter.
But "input" was never zeroed, so any garbage ones it
may have remains.
Zero it.
This fixes a problem where if the "input" parameter was not
zeroed by the caller, the result of the funcion call
is undefined.
Detected by valgrind on:
tests/drivers/gpio/gpio_get_direction
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_disconnect (main.c:64)
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_output (main.c:102)
When running this test for the nrf52_bsim.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Static code analysis it has highlighted that a variable is beeing
accessed before initializing. This is a very minor fix
to resolve this potential issue.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
This change corrects the it82xx2 resumed/suspended mechanism and power
policy flow. The sof package is used to judge if the device can be set as
suspended state. If there is no sof package received(suspended), the chip
power policy is set as standby(deep doze) mode. Meanwhile, the USB D+
interrupt is enabled. The interrupt is triggered at resume signal(from J
to K state). Chip sets its power state as active(doze) mode and disable
the interrupt.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Add SHA256 accelerator support for it8xxx2 series.
This driver passes the following test:
tests/crypto/crypto_hash/
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Since we have state that gets mutated between tests in the SBS fuel gauge
emulator we ought to reset its state before each test.
Add a reset rule to the SBS fuel gauge emulator that resets the state
before each test. Note: This includes allowing the emulator state to be
modified by user-threads.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In order to support easier setup of test scenarios with fuel gauge
emulators, we should expose an API that can change internal emulator state.
Add a minimal fuel gauge emulator backend API for setting the charging
current and voltage with a sample implementation in the emul_sbs_gauge with
an associated driver test.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Calculate the calibration value at compile for ina23x.
Maximizes the precision of the calcualtion value by
using 64bit math at compile, allows for removal
of rshunt config option.
Code cleaned up with clang-format.
Co-authored-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Changes rshunt-milliohms to rshunt-micro-ohms allowing for current
sensing of greater than 16.4A (1mOhm resistor). This is commonly
set to 100 uOhm for VMU/FMU boards/applications.
Co-authored-by: James Goppert <james.goppert@gmail.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
The `SPI_EMUL_INIT(n)` macro used to instantiate SPI bus emulators
builds an array of SPI devices attached to the bus, but always checks
instance #0 of the bus and not `n`. This makes multiple instances of an
emulated SPI bus unusable and popualtes them all with bus 0's devices.
Change the `0` to `n`, which matches how the I2C bus emulator does it.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Update ESP AT modem driver to control the network interface dormant
state based on the network connection status, as described in the docs.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Support pin control for NXP S32K3 devices and enable it by default on
mr_canhubk3 board configuration.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The clock controller is a singleton controller for all the system-level
clocks (XOSC, PLL, CGM, etc) to provide run-time information to the
peripheral device drivers about the module's clocks.
Clock configuration is not yet supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Split the SDL GPIO emulator driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL input driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL display driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
When UART_INTERRUPT_DRIVEN=n, mcux_flexcomm_isr and the data structure
inside is left unused. This patch turns off the build of the entire ISR.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
without the call of LPUART_ClearStatusFlags(), the interrupt can
immediately trigger again, blocking the application.
CONFIG_ASSERTS=n removes the assert() including the call of
LPUART_ClearStatusFlags().
Also removed LPUART_ClearStatusFlags call for unclearable
kLPUART_TransmissionCompleteFlag.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Add a small delay between reading the transport header and reading the
HCI data. Failing to do so on a nRF9160<->nRF52832 link was reliably
resulting in the nRF9160 trying to read data before the nRF52832 had
set up the SPI transaction, resulting in the host reading a buffer full
of 0x00 and having to run the entire read result again.
Transceiving a 10 byte packet takes at least 31uS, while 100 byte
packets are around 150uS (duration of `spi_transceive` call). Waiting
1 tick to eliminate the need for most retransmissions is a valid
tradeoff.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add an option that signifies that the ESP modem may be reset at the same
time as the SoC by an external source. When this is the case, we first
wait for an unsolicited "ready" message from the modem, before
attempting to reset the device. This prevents two initialisation
sequences attempting to run at the same time.
We still want to wait for the complete initialisation sequence to
complete before returning in this case.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Don't unconditionally set the carrier to the off state in
`esp_iface_init`, as this is already done in `esp_reset` and the
function may be called after the modem has already completed the init
sequence and called `net_if_carrier_on`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Wait for the init process to finish again, previously removed in
a8e6fc0b83. The original reasoning (deadlock with net interface locking)
no longer applies now that `esp_reset` is called in the device init
function, not in `esp_iface_init` (332a6f084a).
Without this change, if `reset-gpios` or `power-gpios` is set,
`device_is_ready` will return true even if the chip has fallen off the
board, as no communication is validated with the board.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Support device power management in spi_nor driver. Only use
SUSPEND/RESUME if `CONFIG_SPI_NOR_IDLE_IN_DPD` is not enabled to avoid
state conflicts.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Quite a few of the drivers meant for the POSIX arch
interacted with the host directly, and will not
work when we use an embedded libC.
Until we fix them, let's add the appropriate
kconfig dependencies to avoid users trying to build them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This adds support for the TIMER1-4 counter.
Each counter has 24bits and can run on LP_CLK (15-32KHz)
or DIVN clock (32MHz) with prescaler 1-32.
Each counter can have one alarm set.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Enable automatic temperature measurements during charging.
Allows the PMIC to charge when the host is in low power mode.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The vbus current limit is now written to the vbus startup
register. It is now applied at all times and does not need
to be updated on charger insertion.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Because they are needed in SoC power.c, clock control init functions
for all other STM32 series has been exported as global.
This commit exports stm32_clock_control_init function as global for
STM32H7 series as well, making custom power management
implementations for STM32H7 series possible.
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
NO_CACHE cannot be selected for certain cores.
Use ARCH_HAS_NOCACHE_MEMORY_SUPPORT as the condtion
to select NO_CACHE config
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The blink command should blink until the user presses a key, however on
some systems a pending keypress is present when entering the loop
causing it to immediate exit before getting a chance to blink.
Add a dummy read to clear the buffer before starting the blink loop.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
The device passed to the DMA callback is the DMA device. Instead use
the ADC device available in the private data.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Add fixed-clock clock control driver. This is a first step towards
making fixed-clocks a first-class citizen in the clock control
framework.
Since the change is hidden behind a Kconfig enable this is opt-in
for now.
Signed-off-by: Moritz Fischer <moritzf@google.com>
This adds a driver for Texas Instruments Cost-Optimized, Ultra-Small,
12-Bit, System-Monitoring ADCs. Currently only TLA2021 is supported,
TLA2022 and TLA2024 may follow based on this driver.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
A "switch" statement in intel_adsp_hda_dma_status() seems to be
missing a "break". The second "break" is unneeded but seems to be a
part of the coding style.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This driver, due to its limited 24-bits counter, is already tracking a
cycle count in software. Allow that count to be a 64-bits value so this
won't wrap in a matter of only a few seconds when the hardware clock
is fast.
This is very cheap to do as expensive math operations (i.e. divisions)
are performed only on counter intervals whose values fit in 32 bits like
before.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add ACPI support for Zephyr using acpica open source
project. ACPI subsystem use to discover and configure
hardware components, perform power management (e.g. putting
unused hardware components to sleep), auto configuration (e.g.
Plug and Play and hot swapping) etc.
Signed-off-by: Najumon Ba <najumon.ba@intel.com>
To ease building for workstation tests, instead of using
the ARM CMSIS instructions instrinsics directly,
use the NRFX macro that uses the compiler builtins when
necessary.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name (Also from DT) which will be resolved
by the nRF HAL definitions.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Following the sam4s datasheet, the OVRE, PARE and FRAME flags should be
cleared after a uart error occured. This is done writing a 1 to the
RSTSTA bit in the UART_CR.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
Default scan mode is Active. User can force the scan mode to passive
through Kconfig option or using 'passive' option from shell.
Using either of this option will override regulatory settings and
forces all scan channels to be passive only.
Signed-off-by: Ajay Parida <ajay.parida@nordicsemi.no>
Convert the XPT2046 driver to the input subsystem, change the api,
remove the callback and enable logic.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix incomplete reset cause to be reported for NXP MIMXRT1062-evkb.
In the event of a reset due to core lockup
or software reset request on a 1062 board,
the current NXP hwinfo driver reports an incomplete
reset cause (only Ipp reset pin).
This is happening because the 1062 uses a combined CPU lockup
and system reset request register bit that should be checked,
whereas the current driver only checks for the existence
of a lockup-only status bit.
This commit adds a check on the flag
FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ
already present in MIMXRT1062_features.h,
to report such a reset cause should it occur.
Signed-off-by: Casper Egholm Jørgensen <cjo@trackman.com>
Identify the Wi-Fi capability to the networking stack and also the type
of Wi-Fi (Native vs Offloaded), this helps identifying Wi-Fi interfaces
that can be used by applications.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:
"warning: integer constant is so large that it is unsigned"
This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Add call to zephyr_syscall_header to kscan driver CMakeLists.txt, so
that the required syscalls will be generated when kscan drivers are
used.
Fixes#59710
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The ifdefs in in dmic headers is getting out of control and makes
maintainence very ddifficult, especially when having to maintain out of
tree SoCs sharing the same data and information.
Keep header clean and per SoC and share some common registers in one
place instead avoiding confusion and making it easier to read and
maintain.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds driver support for Microchip's PolarFire SoC I2C. This
initial support implements the Controller API only.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
This commit adds the jedec216 read sfdp and Read ID
function API. The qspi commands are issued to the
quad flash device.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
According to the stm32h5x product specifications, the values of the
voltage ragulator depends on the system clock as follows:
• VOS0 (Vcore = 1.35V) with CPU and peripherals running at up to 250 MHz
• VOS1 (Vcore = 1.2V) with CPU and peripherals running at up to 200 MHz
• VOS2 (Vcore = 1.1V) with CPU and peripherals running at up to 150 MHz
• VOS3 (Vcore = 1.0V) with CPU and peripherals running at up to 100 MHz
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add specific init priority for the stm32 DMAMUX device higher
than the CONFIG_DMA_INIT_PRIORITY, to be sure that the DMAMUX
initialization always comes after the stm32 DMA device init.
Its default value is set to 41 when the DMA_INIT_PRIORITY is
KERNEL_INIT_PRIORITY_DEFAULT (=40).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
PHY overrides have been checked against the latest version of TI's
SmartRF(TM) Studio. The result was regression tested (PER/performance)
against LAUNCHXL-CC1352P1 boards.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The length field in the header refers to the size of the MAC so it
shouldn't rely on constants describing PHY header length. While
currently both constants have the same value this will no longer be true
for enhanced PHYs and/or MAC frames as the number of FCS bytes may then
be four.
Also introduces an assertion that ensures that the given package buffer
does not exceed the TX buffer's length. An assertion is enough as the
package buffer is allocated at compile time.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CMD_CLEAR_RX and CMD_SET_TX_POWER commands are declared and
initialized but not used anywhere. They are therefore removed to reduce
RAM/flash footprint.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Switch the driver to the soft CSMA/CA algorithm as an intermediate
compromise for improved standard compliance (namely expontential
backoff) until true hardware support can be implemented by chaining
radio commands.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver's CCA method had various issues and would always return an
error code. This is fixed in this change.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This change introduces inline documentation with references to the
current version of the IEEE 802.15.4 standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CC13xx/CC26xx Sub-GHz driver announces a hardware CSMA/CA capability
which it provides only partially. This change documents the gap.
The change also fixes two related issues with the current CCA
implementation:
- The given default ED threshold was above the allowed threshold
defined in the specification.
- The CCA timeout was not calculated according to the requirements
defined in the standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This change introduces standard variable names used elsewhere in the
stack for improved naming consistency and readability.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver contained references to KConfig variables w/o the required
CONFIG_ prefix. This change introduces the missing prefixes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The low-level configuration of the chip's radio commands was mostly
redundant. This change removes redundant configuration code.
This is also relevant as a preparation to supporting further frequency
bands and operating modes on the same SUN FSK channel page with
similar but slightly different settings (center frequencies, channel
spacing, modulation index as defined in the standard). The SUN FSK
standard defines plenty of such variations with different physical
characteristics and trade-offs. Such variations are highly relevant in
industrial applications which will be targeted by TSCH. Using the
correct settings is required for additional features (e.g. frequency
hopping) and interoperability.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CC13xx/CC26xx Sub-GHz driver header file defined several constants
that were not used in the driver.
Other constants could be replaced with generic constants which were
introduced in the prior commit.
This change removes and/or replaces redundant definitions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Set the initialization priority for the pinctrl_mcux_init to
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT.
The pinmux nodes depend on pcc, which is currently initializing at a
later stage, using the default priority fixes it.
Found the error with:
$ west build -p -b frdm_k64f samples/basic/blinky \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pinmux@4004d000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004c000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004b000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004a000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@40049000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Previous fix https://github.com/zephyrproject-rtos/zephyr/pull/58891
introduced failure in driver tests suite. This patch corrects the error
and reverts max_mapped_page field definition.
Adds max_mapped_pages stats reset after unmaping of unused memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
When CONFIG_PM_DEVICE is enabled IPC Device may be during power transition
during a call to intel_adsp_ipc_send_message function.
Changed signatures of intel_adsp_ipc_send_message and its sync version
to return int and negative error codes on error.
On attempt to send IPC message during Device power transition
-ESHUTDOWN error code is returned, on busy state -EBUSY.
Updated all function references.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Generic header for system clock allows to define a sys_clock_idle_exit
function for the clock implementation.
Implemented the function in the intel_adsp_timer to reinitialize
device driver after the idle exit state.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Guard NXP PINT related code with #ifdef CONFIG_NXP_PINT.
This prevents build errors on platforms that do not have a PINT but have
LPC GPIO.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
GPIO callbacks need to be initialized before being registered with a GPIO
driver, otherwise the NULL `handler` hits an assert.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add a GPIO based quadrature decoder driver that reports relative axes
movements using the input subsystem.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Provides a way to use pinctrl to allow internal loopback
on a peripheral pin for testing purposes.
This is done by using output-enable on a input pin and
input-enable on a output pin.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Avoid timeout when taking semaphores in ISR.
This enables flash operations inside interrupted context
such as exceptions, allowing operations like saving core
dump to flash for instance.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Since the mtl platform, the stereo bit has been removed from the
CIC_CONTROL register and now it is marked as reserved. On some platforms
(mtl and above), the configuration blob still has this bit set, causing the
dmic driver to report an error. This commit changes the behavior of the
driver to only display a warning.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The argument to the dmic irq is of type "struct device *" and dmic data
is actually part of it, thus make the cast correctly.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Allows to configure OSPI Manager IO ports with devicetree.
If properties are absent, then original default values
are preserved for compatibility.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Add Nuvoton numaker series UART support, including interrupt-driven,
also apply pinctrl and clock-control.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add Nuvoton numaker series clock controller support, including:
1. Do system clock initialization in z_arm_platform_init().
2. Support peripheral clock control API equivalent to BSP
CLK_EnableModuleClock()/CLK_SetModuleClock().
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Device dependencies are not always required, so make them optional via
CONFIG_DEVICE_DEPS. When enabled, the gen_device_deps script will run so
that dependencies are collected and part of the final image. Related
APIs will be also made available. Since device dependencies are used in
just a few places (power domains), disable the feature by default. When
not enabled, a second linking pass will not be required.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for communication with serial ports on native POSIX platform
via UART driver API. Serial port driver supports polling API,
configuration of the serial ports used via devicetree and command line
options, and runtime configuration with `uart_configure`.
Multiple instances of the driver are supported.
Example use and configuration is also demonstrated in the
`samples/drivers/uart/native_tty` sample.
Closes: #56586
Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
The word cpu was added to the names of functions, structs, types
and definitions to disambiguate the names and make room in the namespace
for soc clock control functions.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Moved dmic register definitions to a separate file dmic_regs.h and added
their description. Platform-dependent registers definitions are placed in
separate files. Used standard macros FIELD_PREP, FIELD_GET in operations on
registers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Note that only the the hardware round robin port arbitration capability
is being used.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Basic support of VC capability, where a driver can enable VC and map its
traffic classes.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The initial implementation was broken during improvements.
There was incorrect assumption that all pages are unmapped at
initials state. In reality at the beginning whole memory is
powered on, so we should mark all pages as mapped. Later in
initialization code unused pages are unmapped and if after this
some banks become empty (all pages unmapped), the power is
switched off.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Update driver with low level power control and OpMode
functions to better represent operations used in power
mode transition diagram Figure 2 from the datasheet.
This also prepares the driver for use of these functions
for PM actions.
Extend the soft reset at initialisation to a full POR.
Add defines for maximum POR time and start up time.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Shorten lines lengths.
Remove bq274xx prefixes from static function names.
Removes repetition of bq274xx in logging.
Signed-off-by: Oleh Lozynskyy <oleh.lozynskyy@gmail.com>
That's correct. We are still fixing the Y2K bug in 2023 \o/
* write century to RAM register 0x32
* ensure year register is in [0,99] (inclusive)
Aside from that, there were a few other errors in the driver.
* translate epoch-centric RTC API year to begin at 1900
* fix off-by-one error with month limit
* fix off-by-one error with wday
* fix off-by-one-hundred error with year limit
* adjust timeptr values in rtc_mc146818_validate_time()
* adjust timeptr values in rtc_mc146818_validate_alarm()
With the above, the testsuite passes!
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Previous commit added support of large transactions on I2C v2,
this commit implements some changes to also add support
of large transactions on I2C v1. Some refactoring is also done
to put the code in the right source files.
Fixes zephyrproject-rtos#58866
Signed-off-by: Michael Grand <m.grand@trustngo.tech>
This commit introduces a preprocessor checking mechanism for selecting the
correct RNGOUT FIFO memory base address depending on whether SL_TRUSTZONE
is used.
Fixes#59197.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Added an MFD driver for the nPM1300.
This driver has register access helper functions that can be used
by subsystems. This will avoid each subsystem having to duplicate
the register access code.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The IS31FL3216A is a fun light LED controller. The LED current of each
channel can be set in 256 steps by adjusting the PWM duty cycle through
an I2C interface.
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Adding device power management for the ti lp5569 led controller driver.
Allow the option to either use device power managemnt while keeping the
voltage on or to use device power management including using e.g. a voltage
domain that controls the led controller voltage on-demand.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
Add a minimal driver for the ti lp5569 led controller. The driver supports
multiple instances. Commands on|off|set_brightness are supported.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
The function `z_nrf_rtc_timer_exact_set` is added to allow
setting compare channel without possible creeping of cc val.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add memory mapping to driver in order to use driver with platforms based
on Cortex A with enabled MMU.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Acknowledgment is mandatory if legitimately requested by the package's
"ACK requested" flag. The L2 layer will have to ensure that compliant
ACK packages will always be sent out automatically as required by the
standard.
For IEEE 802.15.4 compliance, the NET_L2_IEEE802154_ACK_REPLY option is
therefore being deprecated.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The existing calls to ieee802154_radio_send() and soft MAC ACK handling
were inconsistent and/or not properly integrated with more recent
radio driver capabilities as CSMA/CA and ACK in hardware.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The method ieee802154_radio_handle_ack() does not belong to the
PHY/radio layer but to the L2 layer. It is a callback called from the
radio layer into the L2 layer and to be implemented by all L2 stacks.
This is the same pattern as is used for ieee802154_init(). The
'_radio_' infix in this function is therefore confusing and
conceptually wrong.
This change fixes the naming inconsistency and extensively documents
its rationale.
It is assumed that the change can be made without prior deprecation of the
existing method as in the rare cases where users have implemented custom
radio drivers these will break in obvious ways and can easily be fixed.
Nevertheless such a rename would not be justified on its own if it were
not for an important conceptual reason:
The renamed function represents a generic "inversion-of-control" pattern
which will become important in the TSCH context: It allows for clean
separation of concerns between the PHY/radio driver layer and the
MAC/L2 layer even in situations where the radio driver needs to be
involved for performance or deterministic timing reasons. This
"inversion-of-control" pattern can be applied to negotiate timing
sensitive reception and transmission windows, it let's the L2 layer
deterministically timestamp information elements just-in-time with
internal radio timer counter values, etc.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This patch adds the ability to change virtual i2c eeprom target address
at runtime using a single function.
Added CONFIG_I2C_EEPROM_TARGET_RUNTIME_ADDR as an optional Kconfig.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.
Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
Add driver for TCN75A temperature sensor. The following features are
supported:
- TCN75A oneshot mode, which allows single shot conversions with lower
power consumtion
- Resolution selection, up to 12 bit resolution (9 bit default)
- Triggering based on temperatue thresholds. If the TCN75A exits a set
threshold range, the application can be notified via a callback.
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
Add command to set DVS mode, to aid in testing regulators that expose
this functionality. Since DVS modes are device specific, take an integer
as the mode identifier and pass it to the driver directly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This help to decipher PCIe capabilities supported by each listed device.
Shown only on a selected device and not on the general list.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_ENTROPY_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_ENTROPY_GENERATOR anyway, drivers are not
built unless CONFIG_ENTROPY_GENERATOR is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_SERIAL_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_SERIAL anyway, drivers are not built
unless CONFIG_SERIAL is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_FLASH_HAS_DRIVER_ENABLED. Since
kconfigs are guarded by CONFIG_FLASH anyway, drivers are not
built unless CONFIG_FLASH is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The I2C driver clock was initialized in board specific code, move it to
the driver as it is part of its responsabilities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new pinctrl driver for TI CC32XX SoC. The driver has not been
tested, just implemented following datasheet specs and checked that it
compiles. Consider this as a best-effort driver to remove custom pinmux
code in board files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The adc-shell uses a hardcoded list of defines to check whether it should
throw a compile-time error. The ADS1119 and ADS1112 driver both support
the APIs needed by the shell, so this commit enables support for them in
the hardcoded support list.
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.
The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.
The new driver has also been added to the existing ADC test using adc_emul
for completeness.
Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
Add new `IEEE802154_CSL_DEBUG` Kconfig option that, when enabled,
prevents the radio to sleep after a delayed reception is finished.
This allows to debug CSL timing issues due to accuracy drifts in
communications between receiver and transmitter.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
This commit replaces the workarounds spread around the
drivers and subsystems with the updated PPP L2
interface.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Don't wait for the IRQ line to be de-asserted in `bt_spi_send`. As this
function can be called by the RX processing thread, the previous
behaviour could cause deadlocks under heavy load:
* SPI RX thread starts blocking on `bt_buf_get_evt` due to load
* BT controller generates another event, asserting the IRQ line
* RX processing thread calls `bt_spi_send` in reponse to event
* RX processing thread blocks forever on the removed condition
There is no need to attempt to rate-limit how often `bt_spi_send` is
called to allow the RX thread to run. If the bus is so congested that
there is no remaining capacity, prioritising RX over TX is not going to
improve the situation.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The RSSI value in net_pkt (net_pkt_cb_ieee802154.rssi) was used
inconsistently across drivers. Some drivers did cast a signed dBm value
directly to net_pkt's unsigned byte value. Others were assigning the
negative value of the signed dBm value and again others were offsetting
and stretching the signed dBm value linearly onto the full unsigned byte
range.
This change standardizes net_pkt's rssi attribute to represent RSSI on
the RX path as an unsigned integer ranging from 0 (–174 dBm) to 254 (80
dBm) and lets 255 represent an "unknown RSSI" (IEEE 802.15.4-2020,
section 6.16.2.8). On the TX path the rssi attribute will always be
zero. Out-of-range values will be truncated to max/min values.
The change also introduces conversion functions to and from signed dBm
values and introduces these consistently to all existing call sites. The
"unknown RSSI" value is represented as INT16_MIN in this case.
In some cases drivers had to be changed to calculate dBm values from
internal hardware specific representations.
The conversion functions are fully covered by unit tests.
Fixes: #58494
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The prompt is referring to another existing driver(NXP S32),
now the correct name is displayed.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
If CONFIG_MCUX_DCNANO_LCDIF_EXTERNAL_FB_MEM is not set and
CONFIG_MCUX_DCNANO_LCDIF_FB_NUM is zero, a division by zero occurs.
Use the same framebuffer size definition as in the external-framebuffer
case to resolve this.
Fixes#58908.
Signed-off-by: Aedan Cullen <aedan@aedancullen.com>
drivers: serial: uart_sam0: fix uart_sam0_irq_update TXC reset bug
uart_sam0_irq_update function resets flags that will cause int. re-entry
existing implementation also clears the TXC flag if it is set
this breaks transmit complete detection
Per the SAMD5x/E5x Datasheet Sect. 34.8.6, writing '1' to the TXC will
clear the flag and disable TX complete interrupts, this should be
preserved through the irq_update for use in the tx_complete check function
The proper fix will cache the TXC value before conditionally clearing the
flag based on that cached value. If you do not condition this on the
cached value a race condition will periodically occur where
the TXC is cleared but never cached.
Fixes zephyrproject-rtos#55386
Signed-off-by: Peter McGaughey <peter.mcgaughey@daikincomfort.com>
Mux Control Register Index are internals of driver, now
moved from dt-binding header to driver itself.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
ARC EMSDP board has some peripherals are internal connected,
such as DW spi1 and DFSS i2c0. They are unmuxed and have fix
connection to spi-flash or sensor. For these peripheral, add
dummy mux type to avoid pinctrl ENOENT error.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This reverts commit 2d03aaf99f.
The async API for NS16550 is incomplete. We are near the next
release so it is better to revert it for now, and a proper
correct implementation can be done before next-next release.
Relates to #57103
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The source clock_control_sam_pmc.c can not build without the
symbol SOC_ATMEL_SAM_MCK_FREQ_HZ which is contained in soc.h
This bug only shows itself if CONFIG_ARM_MPU is not enabled,
which probably includes soc.h through the <zephyr/arch/cpu.h>
which is not desired behavior.
This commit adds the missing header, making the source build
regardless of CONFIG_ARM_MPU.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Write PWM match registers directly instead of using the frequency and
duty cycle fields of the MCUX HAL driver. This allows the driver to take
full advantage of the resolution supported by the FlexPWM when setting
duty cycle and carrier frequency.
Fixes#59080
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check the return value from gpio_add_callback() and fail driver
initialization if non-zero.
Fixes: #58584
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Currently the flexcomm uart driver will not unlock IRQ
if there is an error, which might cause some problems, fix this.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove excessive debug output on Bosch M_CAN register access. This was
accidentially included in commit bbfc1f905c.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fixed Input Set handling.
Flag had misleading names: whether "entry" happens to the left or to the
right is dependent on whether increment mode is active or not), so
switched to just using a "SHIFT" y/n flag instead. It also reflects better
the contents of the datasheet).
Updated romance text direction accordingly ("increment, no shift").
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Added several missing undeclared config variables causing the driver to
not compile properly.
Fixes#59078.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
1. Fix the reset function to reset correctly.
2. Ensure the controller handle is initialized before
calling the SDK functions.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fail requests if the data does not fit inside buffer.
This commit only adds missing sanity checks but the native posix driver
remains broken at the design level. The amount of work to fix the native
posix driver in legacy USB stack is deemed too great to be worth it.
Coverity-CID: 195841, GitHub issue #58564
Coverity-CID: 240244, GitHub issue #58570
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fix support for DVS modes, as the dvs_state_set implementation
previously had the mask and value parameters in the
i2c_reg_update_byte_dt function swapped.
Also, record the active DVS state and update the voltage get/set and
regulator enable/disable function to target the active DVS mode. This
will enable a user to configure multiple run modes, and modify target
voltages for those modes when in the new mode. When a user is utilizing
the MODESEL pins, update the active state but return an error so that
the application can still edit settings for the new DVS mode once it has
reconfigured the appropriate pins.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_is_pending' function return type, thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add an unconditional break to switch-clause's default case, complying
with required [misra-c2012-16.3] rule which states; An unconditional
break statement terminate every switch-clause.
Found as a coding guideline violation (Rule 16.3) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
1. use 'BIT' macro instead of explicit left shift operations, since
'BIT' macro implicitly adds unsigned type suffix, avoiding possible
[shiftTooManyBitsSigned] scenarios, and
2. add an explicit uint32_t cast to 'BIT' macro argument, complying with
required [misra-c2012-10.1] rule which states; operands shall not be of
an inappropriate essential type.
Found as a coding guideline violation (Rule 10.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
Compiling previous code using LLVM reveals that accessing line_range
values in runtime is not clean, as the following error is generated:
"error: initializer element is not a compile-time constant"
Replace runtime method by compile time using UTIL_INC and UTIL_x2
macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This makes Kconfig logging options for this driver depending on whether
the driver is enabled or not.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Recent refactoring of the uart_async_api test (see commit
eb44414af9) revealed an issue
in the uart_nrfx_uart driver that it requested the next RX
buffer even if one was already set up (such request was just
ignored in the previous form of the test, so the problem did
not come out so far).
This patch prevents such incorrect requests from appearing.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_callback_t' (function pointer), thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially Boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
change for loop iterator/counter type to unsigned int, thus matching
that of struct stm32_exti_range's len member var, complying with
required [misra-c2012-10.4] rule which states; Both operands of an
operator in which the usual arithmetic conversions are performed shall
have the same essential type category.
Found as a coding guideline violation (Rule 10.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add enclosing parentheses enforcing and clarifying precedence of
operators, thus improving code readability and maintainability,
complying with *advisory* [misra-c2012-12.1] rule which states; The
precedence of operators within expressions should be made explicit.
Found as a coding guideline recommendation (Rule 12.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is not always the same as CPU frequency.
Referring to the `/cpus/cpu@0,clock-frequency` in DTS to determine
the CPU frequency.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Increase the size of the MCUX USB driver thread stack if using
the CONFIG_USB_DEVICE_LOG_LEVEL_DBG Kconfig, to avoid stack overflow
caused by many stack frames coming from the debug logs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Change the Bosch M_CAN ISRs to only acknowledge the IRQs handled in the
given loop iteration (and not all IRQs supported by the given ISR) and move
IRQ acknowledge to the front of the ISRs.
Fixes: #58631
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Increase the default stack size for the MCP2515 CAN controller driver from
512 to 1024 bytes.
Fixes: #58761
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Increase the default CAN controller driver initialization priority from
KERNEL_INIT_PRIORITY_DEVICE (50) to 80 to allow CAN controllers on SPI
busses have their bus initialized prior to initializing the CAN controller
driver.
The only in-bound dependency on CAN controller drivers - apart from
application level code - is the drivers/net/canbus.c driver, which already
defaults to an initialization level of 81.
Fixes: #55745
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the Bosch M_CAN header file to include/zephyr/drivers/can/can_mcan.h
for use in out-of-tree drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add documentation for the remaining functions, structs, and definitions in
the Bosch M_CAN header file. Fix a few mistyped Message RAM field names
along with misnamed macros and function found while adding documentation.
No functional changes.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let's check the return values of all system calls
to ensure they do not error, or handle it gracefully
if they do.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The rf2xx does not check the return value from gpio_add_callback
function, which can prevent it from detecting unexpected states and
conditions. This add error processing check and log.
Fixes: #58595
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Fractional part of the conversion was a thousandth of
what it should have been.
Also removes LOG_ERR use which causes excessive output
when logging enabled and using the sensor shell.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Replace the otrig configuration semaphore with a spinlock.
This will allow the dma_config function to be called from an ISR
and it will no longer shift the burden of waiting to be able to configure
the dma otrigs to the caller of the function, since the driver
will just spin on the lock until it can configure them, instead of
returning an error.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add two error code check for gpio_add_callback functions to avoid
triggering a coverity warning.
Drop a redundant initialization in the process.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The IEEE802154_2015 option is misleading, as it does not introduce full
802.15.4-2015 standard compliance but only random bits, plus it's
defined at the radio driver level, which brings yet another confusion.
Because of that, the option will be deprecated, and respective parts of
code that made use of it converted to use more specific configurations:
* nRF driver will now use CONFIG_NRF_802154_ENCRYPTION to specify
whether to compile in TX security
* net_pkt will only add extra 802.15.4 control block fields if
OpenThread is used, as they were solely used by this L2
* OpenThread radio layer will now use the OpenThread version to
determine whether to compile in TX security.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Clang reports 'initializer element is not a compile-time constant' when
trying to initialize structure with elements of constant array. The
compiler is wrong in this case because the elements of the array are
known at compile time, so there are no obstacles to initialize structure
using it.
The problem was fixed by removing 'range' array and using
DT_PROP_BY_IDX() to get values directly from DT.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Clang doesn't support push_options, pop_options and optimize pragmas.
Since "Ofast" is only applied to rng_pool_get() we can use function
attributes instead of pragmas.
Please note that clang doesn't support applying optimizations to
functions.
This change was verified by comparing assembler output.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch fixes following compilation error when compiling using clang
drivers/dma/dma_stm32.c:364:42: error: equality comparison with
extraneous parentheses [-Werror,-Wparentheses-equality]
if ((config->head_block->source_address == 0)) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
drivers/dma/dma_stm32.c:364:42: note: remove extraneous parentheses
around the comparison to silence this warning
if ((config->head_block->source_address == 0)) {
~ ^ ~
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Update the asserts to match the updated Bosch M_CAN minimum/maximum CAN
timing parameters.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the STM32 FDCAN driver uses
the wrong values for the minimum, nominal phase segment values.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The STM32G4 reference manual contains contradicting limits
for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the STM32H7 FDCAN driver uses
the wrong values for the minimum, nominal phase segment values.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The STM32H7 reference manual contains contradicting limits
for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the Atmel SAM0 CAN driver
uses the wrong values for the minimum, nominal phase segment values. The
same goes for the maximum, nominal SJW value.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The Atmel SAM C20/C21 family data sheet contains
contradicting limits for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the Atmel SAM CAN driver uses
the wrong values for the minimum, nominal phase segment values. The same
goes for the maximum, nominal SJW value.
Using the static initializers fixes these and aligns them to both the Bosch
M_CAN manual and the Atmel SAM E70 family data sheet.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some NXP SoC reference manuals contain a bug regarding the minimum values
for nominal phase segments. Valid Bosch M_CAN nominal phase segment
register values are 1 and up. Same goes for the maximum value for data
phase segment 2. Here, valid Bosch M_CAN register values are 0 to 31.
Using the static initializers fixes these.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Per Kinetis USB reference manual, when USB reset interrupt is asserted,
the driver should configure and enable the default USB control endpoint
0. Generally, when the reset interrupt is asserted, endpoint 0 is
already configured so the driver only needs to reenable it.
However, when usb_dc_detach is called and the module is reset, all endpoint
configuration will be reset. Thus, we need to manually configure USB
endpoint 0 when a USB reset interrupt is received, or the USB driver
will not function correctly after usb_dc_detach has been called.
Additionally, do not zero out all BDT entries in the usb_dc_reset
function. BDT entries are zeroed when an endpoint is configured, and
clearing BDT buffer pointers during device reset will cause a memory
leak.
Fixes#58407
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The pga enum internal reference voltage and gain values
were fixed in the code, but a comment was forgotten to be
updated. Correct the comment to match how the code uses
the enum.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This patch ensures that the power domain to which the current HD DMA
instance belongs is power-up first.
In addition, it initializes the channels when coming out of SUSPEND
state, so this operation will be performed also when the stream is
started after the DSP comes out of D3 state.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The tachometer collects the data continuously setting a "data ready" bit
when it's ready. The availability bit has to be cleared before the
register is updated.
The driver also supports underflow detection, when the bit indicating it
is set the reading of "0" is returned.
The problem here is that there is that once the underflow bit is cleared
we might end up reading stale data.
To prevent that clear the "data ready" bit when underflow is detected
Signed-off-by: Kornel Dulęba <mindal@semihalf.com>
Fix the OTRIG related build error in the DMA LPC
by defaulting num_of_otrigs to 0 if a plarform using
the LPC DMA does not specify this property in devicetree.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For Intel cavs2.5, access from LPGPDMAC to Audio Link Hub
RX/TX registers needs to be explicitly enabled before use.
The logic follow hardware initialization done in
SOF project sof/src/platform/intel/cavs/platform.c
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Found EMSDP board SPI-FLASH sample broke after adding DFSS
into spi_dw. Found wrong interrput mask resulting in false
interrupt enabled. Now fixed it to fit both DFSS and DW.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This is a follow-up to commit 09fa46ee4e.
Before nrfx 3.0, the QDEC interrupt on REPORTRDY event was activated
implicitly when a `reportper` value other than `DISABLED` was used.
Now, the `reportper_inten` field needs to be used to activate this
interrupt.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There is no need for iterating all the Bosch M_CAN filter elements in
Message RAM in order to find a free filter as the driver already keeps
track of assigned filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.
This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.
As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.
Fixes: #42030, #53417
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN Message Marker, an 8-bit field copied from Tx Buffer
elements to Tx Event FIFO elements to aid software in identifying Tx frame
status, need not be split into an index and a count, as the count is
unused.
Remove this split and replace "struct can_mcan_mm" with a simple "uint8_t".
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Message RAM layout used by the STM32 FDCAN IPs contains a fixed number
of elements, even though the software can opt to use less standard/extended
filter elements. Change the BUILD_ASSERT() statements to reflect this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own Message RAM
read/write/clear functions.
This is preparation for supporting per-instance Bosch M_CAN Message RAM
layouts and for accessing Bosch M_CAN IP cores over peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN devicetree binding to use a bosch,mram-cfg property
for specifying the memory layout of the Bosch M_CAN Message RAM. This is
identical to the Linux kernel devicetree binding for Bosch M_CAN IP core
based CAN controllers.
This introduces an offset cell which can be used for controllers with
shared Message RAM between Bosch M_CAN instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Document that the Bosch M_CAN read/write register functions are allowed to
return -ENOTSUP for unsupported registers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Basically, once a pin is configured for interrupt, we enable the latch
on it, in order not to miss short pulses.
The bottom half of the interrupt then reads the input port twice, to
read the latch and then read the potentially new state of the pins, to
compute the posedge, negedge, and level callbacks accordingly.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
When accessing GPIO by pin, access only the required port register
(instead of systematically accessing both PORT0 and PORT1).
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
In case of BG95 where there is no reset pin, reseting the board
which uses a BG95 modem could result in powering-off the modem
(as oposed to "reset" the modem). This commit is an attempt
to handle this case and re-power the modem.
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Using bg9x driver with bg95 specifically has the issue that BG95
modem replies with "RDY" when it's not fully initialized and AT
commands sent to the modem after this point would result in modem
reply of "ERROR". This commit adds a new prj.conf field in the build
configuration for custom unsolicited app ready string, with
the default being BG96 one ("RDY").
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
The BG95 pin configuration does not internally ever use the reset pin.
Because of this, there is no need to make reset pin mandatory.
Commit removes reset pin dependency [e.g. in case of BG95].
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Add a property to the ADC channels which allows the configuration
of the current source pin.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This PR relocates the sensor trigger sample application from the
`sensor_shell` sample to a subcommand in the actual sensor shell. The
subcommand has a UI for enabling a given trigger on a given sensor.
A built-in handler for the data_ready trigger is included that prints
the latest data to the log. Currently, only `SENSOR_TRIG_DATA_READY` is
supported but the groundwork is there to add others. Tested on a
`tdk_robokit1` board.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Clean up whitespace etc. using clang-format after previous changes. No
functional changes intended.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added support for interrupt-driven GPIO for this driver if an interrupt
line is defined. Note that interrupt support is optional in the GPIO
core so it may or may not be present.
The core provides a single state change notification whenever any line
changes state on a given bank, so we need to check the states of the
lines ourselves to determine what has actually changed.
Also, the driver treats the first and second GPIO banks as mostly
separate devices, but a single interrupt is shared by both banks, so the
ISR ends up being registered by the first bank which also triggers
handling on the second bank if required.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The properties being read for the all-inputs and all-outputs flags in
the driver for the second GPIO channel did not match the ones listed in
the DT schema or the existing device tree files. Fix this.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added to the configuration function to enable
channel chaining for the DMA_LPC that utilizes
the total of the SOC OTrig channels.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Use CONFIG_USB_DC_NXP_LPCIP3511 instead of FSL_FEATURE_USB_USB_RAM
as the behaviour variation is based on the SDK driver used and not
if the SoC has a dedicated USB SRAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Conditionally enable the USB_DC_HAS_HS_SUPPORT as the
USB_DC_NXP_LPCIP3511 controller can have both HS and FS only.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Ports the Jinghua Display JHD1313 LCD (with RGB backlight) driver
to use the new auxdisplay driver interface. This driver is used on
the seeed grove LCD RGB display, and replaces it.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
If you compile this code with Clang it will complain about casting a larger
type into a smaller enum.
```C
zephyr/drivers/clock_control/clock_control_nrf.c:120:37:
warning: cast to smaller integer type 'enum clock_control_nrf_type'
from 'clock_control_subsys_t' (aka 'void *') [-Wvoid-pointer-to-enum-cast]
enum clock_control_nrf_type type = (enum clock_control_nrf_type)subsys;
```
Adding `size_t` to the cast removes this issue. Another option could be to
add `-Wno-void-pointer-to-enum-cast` flag to the compile flags.
Signed-off-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no>
The indended value for the delay after the software reset of adxl372 is
1ms. Adjust the value accordingly.
Fixes: a3e7cea
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Driver should just say the channel is not busy if
it is not setup rather than returning an error.
Also, change the channel index to int8_t rather
than uint32_t since it is being assigned negative
values and that width is more appropriate.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Clean up slashes in init macro to be less messy
Update copyright to reflect recent code changes by NXP
Update outdated driver description comment
Change irq driven api variables naming to be more specific
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The flexcomm uart mcux driver init macros have a lot
of unnecessary and confusing redundancy, so let's
simplify them.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The NPCX I2C controller has a port-controller hierarchy and the driver
is split in two files, with separate device struct and init functions.
These are currently initialized at the same level and priority, so the
actual order depends on what the linker does.
To avoid relying on the linking order, add a dedicated priority option
for the port that is set to go after the normal I2C one by default.
Found this by building with CONFIG_CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The uart_ite_it8xxx2 is relying on a node that depends on a matching
ns16550 symbol, such as:
ite_uart1_wrapper: uartwrapper@f02720 {
compatible = "ite,it8xxx2-uart";
...
uart-dev = <&uart1>;
};
But the two are currently setup to initialize at the same level and
priority. Add a dedicated priority symbol so that the wrapper device is
always initialized after the main one, regardless of the linker order.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Always clearing the interrupt status register was causing issues for
the sensor shell when interrupts were enabled but trying to read
one-off samples.
Signed-off-by: Yuval Peress <peress@google.com>
Update the sensor shell logic to use the new sensor_read() APIs and
make triggers an option of the sensor_shell sample (this avoids the
trigger stealing the interrupt status from one-shot reads).
Signed-off-by: Yuval Peress <peress@google.com>
Add a new async API based on the RTIO subsystem. This new API allows:
1. Users to create sampling configs (telling the sensor which channels
they want to sample together).
2. Sample data in an asynchronous manner which provides greater control
over the data processing priority.
3. Fully backwards compatible API with no driver changes needed for
functionality (they are needed to improve performance).
4. Helper functions for processing loop.
Signed-off-by: Yuval Peress <peress@google.com>
Enable direct framebuffer rendering using DCNANO LCDIF, to improve
performance when the call to display_write is attempting to refresh
the full display.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable the ELCDIF driver to directly write the framebuffer using
hardware, when an entire framebuffer update is requested. This will
enable better performance for applications that avoid partial
display updates.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS UART, SPI and I2C for
transfer and receive operations.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Added support for 64bit address source and destination
usage for dw common.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Use the DMA reload flag to indicate we wish to use
a circular chain of DMA descriptors to reload DMA
receive buffers.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Transfers are not limited by XFERCOUNT transfer length of
LPC DMA descriptor. Added code to handle block sizes
greater than XFERCOUNT.
2. Use the reload_en flag to decide if we should setup
a circular descriptor chain.
3. Improve handling of source and destination width.
4. Number of DMA descriptors are defined by a Kconfig value.
5. Changed the dma_reload function to handle transfers
greater than XFERCOUNT.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Adds PHY driver. Works via MDIO API and
exposed ADIN2111 MDIO Clause 45
functions.
Link status detection is triggered by
ADIN2111 driver within offloaded IRQ
handler.
Supports:
- LED0, LED1 enable/disable
- Fatal HW error detection
- AN 2.4V tx mode enable/disable
The initialization order is important.
PHY 2 must be initialized after PHY1.
Therefore, it shall be defined after the 1st one
in the devicetree.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds MDIO driver. Works via exposed
ADIN2111 functions.
It is possible to access Clause 45 and 22 registers.
Due to MDIO API limitation Clause 45 access
is done using driver specific MDIO functions.
Provides API and functions for PHY driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds initial ADIN2111 2-Port 10BASE-T1L (SPE)
switch support. Works over SPI.
The driver creates 2 interfaces, 1 per port (PHY).
Configures multicast and broadcast filters.
The same unicast is applied to both ports.
Supports:
- Link state detection
- CRC enable/disable
- Ports config set
- Ports ETH stats
Provides functions for MDIO driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The OpenTitan watchdog driver is a watchdog driver that can be configured
with two stages: a watchdog "bark", which generates an interrupt, and a
watchdog "bite", which resets the system. The two-stage watchdog can be
enabled by setting CONFIG_WDT_MULTISTAGE=y. Otherwise, the driver
functions as a single-stage watchdog.
A callback function may be set for the bark interrupt through the
wdt setup interface, but will only be used if the two-stage watchdog is
enabled. It must be configured for the first watchdog stage.
The driver controls only the watchdog portion of the OpenTitan AON timer.
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
All posix arch boards are required to provide the same
tracing/print API.
So, instead of having a different driver for native_posix and the
bsim boards, let's have a common one which uses this API.
This in turn results in the printk strings being printed in
the same underlaying backend as before with individual drivers.
A part from this, the native_posix console driver was a full
backend for the now long gone Zephyr console shell
(named legacy_shell from 527256501f
until it was retired in fd0b7f7767).
The whole input handling in this driver was dead code
(since 140a8d0c8a)
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit enabled the Silicon Labs Bluetooth interface driver on the
EFR32BG27 SoC series in the Kconfig.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commits adapts the driver to the newer version of the EFR32 BT
blobs:
* libbluetooth_controller
* libbgcommon
* librail
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Since not all GPIOs support voltage selection, configure voltage
selection register only if it is present.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This adds support for the USB interface for the
Renesas Smartbond DA1469x device family.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
Copy the LUT to SRAM before updating it. This avoids the application
reading LUT entries from FlexSPI while trying to write them to FlexSPI
configuration registers, which could result in invalid LUT entries being
added.
This update is applied to all in tree flash FlexSPI drivers, although
the failure has only been observed with the flash_mcux_flexspi_nor
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add I2C target mode support for NPCX i2c driver. Verified with
i2c_target_api test suite on npcx9m6_evb.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Clean up the include/source lists in the sensors subsystem. Sort the
list, drop the empty lines that makes it look super long for no good
reason, get away with the tabs to align the file names that does not
really work anyway.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This make MCUboot build as Zephyr application.
Providing optinal 2nd stage bootloader to the
IDF bootloader, which is used by default.
This provides more flexibility when building
and loading multiple images and aims to
brings better DX to users by using the sysbuild.
MCUboot and applications has now separate
linker scripts.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Like other stm32 drivers, especially the stm32 flash ospi,
the DMA callback accepts a null or positive status.
It returns an error in case of negative.
BTW it also sets variable as unused, like stm32 flash ospi does.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Define two macros for calibration and oversampling for STM32 series that
possess these features, and use these macros instead of a list of series.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Rework oversampling by creating a const table containing possible
oversampling values and using this table instead of switch case.
Also disable ADC for all series before setting oversampling.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
'bw' parameter in 'lora config' command has a range of 0 to INT8_MAX.
However possible values of 'bw' (125, 250, 500) don't fit this range
and we need to extend it to 0 to INT16_MAX.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Calling for can_stop() method was not emptying FIFOs
and tx_msgq.
Resetting TX FIFO to empty it.
Emptying tx_msgq with "ENETDOWN" return code.
Fixes#50546
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Make sure MFD driver for nPM6001 gets built, and, that watchdog driver
comes later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make sure MFD driver for nPM6001 gets built, and, that GPIO driver comes
later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add an API-less MFD driver for nPM6001. In this case, the MFD device
driver doesn't expose any API as plain I2C API is used within other
device drivers (regulator, GPIO, watchdog). This driver just initializes
some device properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce the skeleton for multi-function device drivers. This driver
class is inspired by the same class found in Linux. Multi-function
devices expose multiple functionalities, for example, a LED driver,
regulator, GPIO controller, etc. The MFD driver class serves as a kind
of "parent" device where common functionality can be managed: bus
access, IRQ sharing, initialization code, etc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Using EM2 or deeper sleep states (where HF clocks are off) requires
special care if BLE radio is used, since BLE radio relies on that clock,
and its power/clock requirements need to be taken into account
On SiLabs, radio PM is implemented as part of RAIL blob, which relies
on sl_power_manager HAL service. I've implemented SoC PM
state changes using sl_power_manager instead of emlib, and added
call to RAIL PM initialization in Gecko HCI driver.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Before BURTC is initialized, clock to its APB CSR file is stopped, so
any attempt to read BURTC regs results in BusFault. However,
many parts of Zephyr may call sys_clock getters even before sys_clock
driver itself is initialized. This change adds support for that:
sys_clock_elapsed() and sys_clock_cycle_get_32() simply return 0
if BURTC is not init yet.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
The common init priority is a leftover from a previous implementation.
Remove it as it's not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Over time, some non-standard concepts and extensions were introduced
into the stack (in KConfig, in drivers, in the internal API and into the
implementation) which makes introduction of additional standard-
compliant extensions like TSCH (and others) unnecessarily difficult.
To introduce extensions like TSCH it is required for the IEEE 802.15.4
stack to become more structurally aligned with the standard again which
will be the focus of some of the upcoming preparatory changes.
One way to check and prove standard compliance is to reference the
standard from within the source code. This change therefore introduces
inline references to the IEEE 802.15.4-2020 standard wherever possible.
Deviations from the standard are documented with TODO or deprecation
labels to be addressed in future changes.
In the future, new code introduced to the IEEE 802.15.4 stack should
be documented and reviewed for standard-compliance to avoid further
divergence. Most importantly:
* MAC/PHY configuration (via net mgmt, radio API, devicetree or
KConfig) should always be directly linked to well-defined MAC/PHY
PIB attributes if visible to the MAC API or the end user.
* Net management/shell/radio API commands should have a documented
reference to the corresponding MLME action from the standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Functions nrf_802154_serialization_error and
nrf_802154_sl_fault_handler shall never return.
However `__ASSERT()` might expand to an empty instruction
CONFIG_ASSERT=n and is not enough to stop execution.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add STM32C0 SOC to combined interrupt config in order to
make it support the I2C driver.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Add a new regulator driver for Analog Devices ADP5360. While it is a MFD
device, only support for BUCK/BUCKBOOST regulators is added in this
patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If an operational amplifier is used on the DAC output it is
preferrable to disable the DAC output buffer.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Make it possible to be able to change speed and duplex for the
STM32H7xx and API_V2 from the configuration settings.
This exists for the non-STM32H7x already today, so this is basically
copying the code for the other STM32's.
Please note that ST has a series incompability. For F1 and F2,
the duplex settings are named ETH_MODE_FULLDUPLEX respective
ETH_MODE_HALFDUPLEX. For F4, H7 and F7 the duplex settings are named
ETH_FULLDUPLEX_MODE respective ETG_HALFDUPLEX_MODE.
This should really be queried from the PHY (as previous programmer have
written in the code). But while waiting for a proper PHY solution,
this is intended as a stop-gap solution.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Since aadca692b3
the board code already sets the stdout/err buffering,
even if there is no console driver;
So there is no need to set it also in the console driver.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is possible that stm32_clock_control_init function is started
when the image is chain-loaded and hardware clocks are already
initialized to some state (PLL1).
Currently due to an assert in get_startup_frequency function
(which will trigger k_fatal_halt) the boot will stop on the
early stage if CONFIG_ASSERT=y. This is reproducible for example
with standalone MCUboot and TF-M with MCUboot.
Fixed by adding support for HSE and PLL1 clock sources at
get_startup_frequency.
Signed-off-by: Denis Mingulov <denis@mingulov.com>
Add VREF+ sensor driver and DT node definition.
This driver allows determining the actual voltage applied to an SoC's
VREF+ pin, by comparing the VREFINT internal bandgap voltage reference
with its factory calibration data.
In packages where VREF+ is bonded to VDDA, this permits direct measurement
of VDDA voltage.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Logic was wrong when testing if a slave is still attached. And i2c
driver was never disabled.
Test if one of the two slave_cfg pointer is not NULL to return
immediately.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Since the introduction of the second slave address support, slave_cfg
pointer may be NULL when entering slave event function.
It happens when both targets are registered and then the first one is
unregsitered.
Test the pointer vs NULL before using it.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Without this change, there's a difference between what the V2 Ethernet
HAL claims to be its capabilities in eth_stm32_hal_get_capabilities()
and what is actually enabled when CONFIG_ETH_STM32_HW_CHECKSUM is
disabled. This difference somehow causes the checksum in outgoing
packets to become 0, and hence seems to break networking at least on
some PHYs.
This commit disables HW checksums by default even when V2 driver is in
use, and this hence fixes networking when CONFIG_ETH_STM32_HW_CHECKSUM
is disabled.
This fixes#57629.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
Introduce DesignWare ARC Data Fusion IP Subsystem(DFSS) SPI
driver for ARC boards, i.e. EMSDP, which uses DW SPI to controll
SPI-Flash and DFSS SPI to connect external devices. Both drivers
share most source code, but DFSS uses ARC auxiliary registers.
Move FIFO depth setting to device tree.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Renesas Renesas SmartBond(tm) have two ADC blocks:
GPADC and SDADC.
This change adds drivers for both.
Each ADC supports only one channel setup, drivers allow
to have multiply channels in sequence. Switching
between ADC sources in done in software.
GPADC has 10 bit resolution (accuracy can be increase
with oversampling). Values up to 3.6V can be measured
on selected pins. V30 and VBAT1 can also be measured.
SDADC has 14 bit resolution and can take measurements
from 8 pins (single of differential) and VBAT.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This is a follow-up to commit 223cc3c6bd.
When a peripheral pin is disconnected, the pinctrl driver should skip
applying of GPIO configuration, as there is no pin number available in
such case, but due to an incorrect check, it actually did not skip it
and used an incorrect pin number for that. In nrfx prior to 3.0.0, this
caused an assertion failure, but because of a fallback routine, things
could still work in most cases (when assertions were disabled) as that
GPIO configuration was just applied to P0.31. Hence the bug was not
discovered until now. In the recent nrfx, this causes a null pointer
dereference, so always a crash.
This commit corrects the mentioned check and also uses the term "psel"
instead of "pin" where it is possible that the value is not a correct
pin number, in the hope of preventing a similar problem in the future.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Until now iterable sections APIs have been part of the toolchain
(common) headers. They are not strictly related to a toolchain, they
just rely on linker providing support for sections. Most files relied on
indirect includes to access the API, now, it is included as needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The i2c_npcx_controller does not actually implement the i2c API, that's
implemented in the port driver and the controller one is in support of
that. This means there's no need to use the I2C specific instance
define, as that would end up adding the stats structure that would never
get used.
This was originally added in 7b1349cfe6.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Status readback has been added in the latest silicon revision.
.port_get_raw and .port_toggle_bits are now supported
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Replace memcpy usage in write since it is not linked to non-external
flash which might cause read-while-write issues.
Move the function that invalidated the data cache inside the critical
section to avoid context switch before it is invalidated.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Check memc_flexspi_is_running_xip before calling
memc_flexspi_set_device_config in hyperflash init.
This aligns with the nor flash driver.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Hyperflash write operations resulted in invalid writes. This commit
fixes the issue by temporarily lowering the clock during writes.
This aligns with the mcux-sdk-examples.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/53855
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a function to update the flexspi bus clock. This is
needed when write operations are done to the hyperflash.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Driver was based on can_sam. SAMC21 has only 1 interrupt for one
can "output", so can interrupt has to executes two lines of
interrupts.
CAN is configured to use OSC48M clock via GLCK7. GLCK7 is set
by divider configured from dts.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Looks like a copy/paste error when copying runtime to empty to runtime
to full. Fixing so that we're assigning to the right union member.
Signed-off-by: Peter Rowley <perowle@microsoft.com>
The buffer registers (chemistry, manufacturer name, device name) were
not implemented. Implemented by adding a new api interface for
retrieving buffer properties. fuel_gauge_get_block_property has been
added, and uses a memory buffer allocated in the app in order to
store the fuel gauge information.
Signed-off-by: Peter Rowley <perowle@microsoft.com>
Current driver only allows state-of-charge. Adding relative-state-
of-charge and absolute-state-of-charge to differentiate between the
different types. Updated sbs and max drivers to support new enum.
Discussed in issue #57523
Signed-off-by: Peter Rowley <perowle@microsoft.com>
For systems with a true dynamic 1-Wire nature, the 1-Wire devices
cannot be defined in the DeviceTree (the number of slaves in
the system is not known during the build time).
In other words, there are no pre-defined 1-Wire devices on the bus in
DeviceTree, and thus the slave_count variable is always zero.
That means the skip_rom functionality will always be called even if
there are multiple devices connected to the bus.
This commit allows the user to override this original behavior and avoid
the skip_rom call by ignoring the slave count variable.
Also, this work preserves full backward compatibility.
Signed-off-by: Pavel Hübner <pavel.hubner@hardwario.com>
Add a driver for the Xilinx AXI Timebase WDT logic core. This can be
instantiated on various Xilinx FPGA-based platforms such as the
Digilent Arty, although it is not part of the default image used with
the Zephyr board configuration.
The driver can also optionally implement the HWINFO API to allow
determining whether the last system reset was initiated by the WDT.
Since this is a standalone IP core which could be used a variety of
configurations, this support is optional in case the system/SoC it is
used with already implements this support.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
This driver implement basic functions of ili9342c controller
which comes mostly with IPS displays.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
The i2c shell write command outputs the error "Failed to read from
device" while it tries to write data to device.
This fixes the error by outputting "Failed to write to device" instead.
Fixes:
uart:~$ i2c write i2c@3ff53000 23 01
Failed to read from device: 23
Signed-off-by: Gaël PORTAY <gael.portay@rtone.fr>
This patch enables the PLL clock output and PLL ref clock
for second ethernet module in NXP's i.MxRT106x SoCs
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
1. spi.h is included twice. Remove one of the two "#include"
declarations.
2. The 'if' clause requires braces even for one line body.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The LSM6DSV16X is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSV16X embeds advanced dedicated features such as
a finite state machine (FSM) for configurable motion tracking and a
machine learning core (MLC) for context awareness.
https://www.st.com/en/mems-and-sensors/lsm6dsv16x.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Current implementation of `nrfx_pwm_stopped_check()` doesn't work
as expected when user doesn't provide event handler.
Workaround for that is to use low level function for checking whether
STOPPED event arrived.
The workaround should be removed when `nrfx_pwm_stopped_check()`
will contain needed functionality.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Set a thread name for the npcx keyboard scan task so it can easily be
identified in the stack dump shell command.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Various coding style fixes, typos, and others on the NPCX keyboard scan
driver. No functional changes.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the NPCX keyboard scan driver to the input subsystem and add the
input to kscan compatibility driver to maintain functionality with the
current API.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
video_mcux_csi_init, which setups the CSI pins (i.e: calls
pinctrl_apply_state) was called after mt9m114_init which tries to do i2c
communication with the camera to read the chip id. But since one of the
CSI pins is the camera master clock, doing things in this order won't
work. This PR inverts the order in which the devices are initialized.
Signed-off-by: Michele Balistreri <michele@bitgamma.com>
The function to enable wakeup from deep sleep modes is not
available on all SoC's. Hence compile this only when the
wakeup_source property is enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Change init level of the mcux lpc dma driver to be
PRE_KERNEL_1 because some other hardware drivers
used on the same platforms as the lpc dma will be
dependent on the LPC DMA and are also initialized
in PRE_KERNEL_1, such as the Flexcomm UART driver
when using UART_ASYNC_API.
Therefore, remove k_malloc from init function and
make those variables statically defined instead of
heap allocated.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Some miscellaneous fixes to LPC DMA driver regarding status tracking:
- If a DMA channel has not been configured for any transfer,
there will be a bug caused by the virtual channel being -1
and then trying to index -1 into the driver data structs.
Add -EACCES return code to indicate this situation.
- Return -EINVAL from get_status if channel number is invalid
- Update the busy flag in the LPC DMA callback function.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixes for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/57560
* don't do CCC if no i3c devices in device tree
* don't wait for MCTRLDONE status when issuing stop
* don't do data part of transfer if buf_sz is 0
* don't limit transfers to only i2c devices in the device tree
so "i2c scan" shell cmd works as expected
Signed-off-by: Mike J. Chen <mjchen@google.com>
Commit 246393e830
("drivers: spi: spi_nrfx_spim: Remove nrf_frequency_t handling")'
introduced two changes, one of them is removing the function
get_nrf_spim_frequency with a strange justification.
This change breaks support for peripherals written in a common way,
where the maximum frequency is set to the maximum supported
by the peripheral, not the controller, see shields for example.
On the occasion of bringing it back, the original function was
refactored to be easier to read and understand.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a USB device controller driver skeleton to use as a starting point
for implementing a specific driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
API function:
- `pl011_irq_tx_enable` is expected to enable and trigger TX interrupt.
Due to HW limiation, PL011 won't trigger TX interrupt if some data
wasn't filled to TX FIFO at the beginning. So that `isr_cb` must be
called at first time to enable TX irq.
- `pl011_irq_tx_ready` will return true when FIFO can accept more
data. Here we don't need wait TX FIFO to be empty.
- `pl011_irq_tx_complete` will return true when all data have been
sent from the shift register.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Glitches were observed if a GPIO pin was configured by
ROM to a non-default state and then Zephyr PINCTRL
reconfigured the pin. The fix involves using the correct
PINCTRL YAML output enable and state flags. Reading the
current spin state and reflecting into new pin configuration
if the pin is output and the drive low/high properties are
not present. We also take advantage of GPIO hardware reflecing
the alternate output value in the parallel output bit before
enabling parallel output mode. Interpret boolean flags with
both enable and disable as do not touch if neither flag is
present. We give precedence to enable over disable if both
flags mistakenly appear. Note, PINCTRL always clears the
GPIO control input pad disable bit.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
A glitch was observed if a GPIO PIN was configured to a
non-default state by ROM and then Zephyr programs the pin
for the same configuration. Root cause is GPIO hardware
implementing two output bits for each pin. The alternate
output bit is in the pin control register and is r/w by
default. The other bit exists in the GPIO parallel ouput
register and is read-only by default. The hardware actually
reflects the pin's output value into both bits. The fix is
to configure the pin with alternate output bit read-write
and the last step is to disable alternate output which
enabled read-write of the parallel bit. GPIO API's can
then use the GPIO parallel out registers. Add logic to
return an error from the GPIO interrupt configure API if
a pin is not configured as an input. Hardware only performs
interrupt detection if the input pad is enabled.
Hardware supports a pin being configured for both input
and output. Applications should add the GPIO_INPUT flag
to all pin configuration requiring interrupt detection.
The interpretation of input and output flags for the
get configuration API appears to be only one of the
flags can be set. Please refer to the GPIO driver tests.
Updated GPIO interrupt configure to clear the input pad
disable bit due to interrupt detection HW is connected
only to input side of pin.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Bug 1: Fix lsm6dsl_gyro_set_fs_raw does not clear FS125 to register when
setting the full range to be other values.
Bug 2: Fix lsm6dsl_gyro_channel_get does not use the current
gyro_sensitivity when getting data from the gyroscope.
Signed-off-by: Jackie Yang <jackie@jackieyang.me>
Several sections of the STM32 ADC driver are #ifdef by a combination of the
same SOC defines that share similar IPs. These are F2/F4/F7/L1, and
F1/F37x.
Each of these combinations is now replaced by a specific compatible, which
makes the code a bit lighter and more succinct.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add ifdef around some functions that don't exist for STM32F37x (ADC_V2_5)
like it is done for STM32F1x.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Inverts the logic of some #ifdef, replacing lists of newer series by a
list of NOT older series. This makes it shorter, and more future-proof as
future series are more likely to work out of the box, without need to
manually add a new define in each place.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Some STM32 families that need to check the ADRDY flag after enabling the
ADC were not doing it. The #ifdef has been updated to fix that.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix a compilation error for the ethernet driver smsc91x that
prevents the build with asserts enabled.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
This commit adds BLE support to the `efr32xg24_dk2601b` board. It also
modifies the SiLabs BT HCI driver to accomodate the EFR32xG24 SoC
series.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
BDCR and PWR_CR could be required for LSE or RTC for instance.
Enable it here as for now, no sophisticated PM handling is available
on F0 and F3 series.
Fixes#56449
Fixup for #56505
Signed-off-by: Kay P <kayo@illumium.org>
rx_thread() is started by eth_initialize(), while dev_data->iface is
populated by eth_iface_init() (called by net_init()).
Usually eth_iface_init() has completed by the time rx_thread() hits its
idle timeout and accesses dev_data->iface, but in case of a time-intensive
SYS_INIT item between eth_initialize() and net_init(), this is not
necessarily the case, causing a NULL dereference. This can be forced by
putting a k_sleep(K_SECONDS(5)) at the top of eth_iface_init().
Start rx_thread() in eth_iface_init() instead (which runs after
eth_initialize() due to init priorities) to make sure everything is
initialized properly.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Allows Ethernet communication between "cells"
in the Jailhouse hypervisor.
The vring queue deviates from a standard virtqueue
so is implemented separately.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
This allows finding the correct PCIe device when multiple devices
have the same vendor-id/device-id but differ in the class-rev register
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Driver init should be using instance based macros,
not nodelabels numbering, there is no guarantee
about which nodes will be assigned which instance numbers.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add Kconfig guards for CONFIG_CAN_MAX_STD_ID_FILTER and
CONFIG_CAN_MAX_EXT_ID_FILTER as they only apply to the STM32 bxCAN driver.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the STM32H7 specific Kconfig overrides for setting the maximum
number of standard and extended CAN RX filters as they are unused.
The number of available standard and extended filter elements for Bosch
M_CAN can be configured via the devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The SSD16xx driver used to use the SCREEN_INFO_DOUBLE_BUFFER flag to
indicate to the LVGL integration that it needs writes to be performed
twice. This was required because partial writes require both the old
and new buffer to be written.
This behavior is really an implementation detail and only applies to
partial refresh. Do this buffer maintenance in the driver instead.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Remove the optional call to ssd16xx_update_display() in
ssd16xx_clear_cntlr_mem(). This doesn't really belong in that function
and just adds a non-obvious boolean argument to the function.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add support for partial refresh profiles. This makes it possible to
use partial refresh on generation 2 devices which are able to store
partial refresh LUTs in OTP.
Partial refresh is only enabled if a partial profile has been
provided. The display will use the full refresh profile if in this
case.
Devices that need custom LUTs and voltages can specify them separately
for the full and partial profiles. The controller will be reset when
changing profiles which means that profiles always override the
default reset values. This means that it is, for example, possible to
use default values and LUTs from OTP for a full refresh and a custom
profile for partial refreshes.
For example, to use a GoodDisplay GDEY027T91 with partial refresh
simply use the following device tree fragment:
display: ssd1680@0 {
compatible = "solomon,ssd1680";
spi-max-frequency = <4000000>;
duplex = <SPI_HALF_DUPLEX>;
reg = <0>;
dc-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>;
reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>;
busy-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>;
/* Enable the built-in temperature sensor */
tssv = <0x80>;
width = <264>;
height = <176>;
/* Enable partial refresh using built-in LUT */
partial {
};
};
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Update the device tree bindings for the SSD16xx driver to make it
possible to specify multiple refresh profiles.
The only profile currently supported is the 'full' profile.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The SSD16xx driver currently provides basic support for most chips in
the Solomon Systech SSD16xx range of e-paper drivers. We currently use
the SSD1608, SSD1673, SSD1675A, and SSD1681 in various boards
supported by Zephyr.
The main user-facing difference between the various SSD16xx chips is
the resolution they support (sources & gates), but there are other
differences as well. For example:
* 8 or 16 bits used to represent x coordinates
* 8 or 16 bits used to represent y coordinates
* Differences in refresh configuration (SSD16XX_CMD_UPDATE_CTRL2)
* Differences in LUT sizes
The driver currently assumes that the user specifies the number of
bits used to describe coordinates. However, as we add support for more
chips, more of the differences will become apparent and need
workaround.
Comparing data sheets from different chips in the SSD16xx range
suggests that there are (at least) two different generations
present. These differ in the size of the LUTs they expect and the way
they handle partial refresh. This impacts register layout where
SSD16XX_CMD_UPDATE_CTRL2 uses bit 3 selects "mode 2" whereas older
devices uses this for a mode referred to as "initial".
In order to add support for partial refresh in newer devices, we need
to be able to distinguish between the different generations of the
chip. It might be possible to add a DT property to indicate the
revision, but that seems like a bit of an anti-pattern and it would be
hard for users to specify the correct chip generation.
This change introduces chip-specific compatible strings instead of the
generic SSD16xx. There is unfortunately clear pattern that can be used
to distinguish different generations, so the full chip name must be
specified. A benefit of this is that we don't need to specify the
width of the fields describing coordinates in device trees.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Only UVB_EVT_REQUEST type passes the pkt argument.
This was overlooked in the last refactoring and
resulted in a zero pointer dereference.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
LSM6DSL's datasheet [1] lists 1666, 3332 and 6664 as valid ODR values for
accel and gyro. Update those from 1660, 3330 and 6660.
[1] http://www.st.com/en/mems-and-sensors/lsm6dsl.html
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Commit e015c00300 ("sensor: add lsm6dsl sensor driver") that introduced
initial support for lsm6dsl used 245dps instead of 250dps. According to
referenced documentation at [1] the latter is correct.
Use value of 250 instead of 245 for gyro range.
[1] http://www.st.com/en/mems-and-sensors/lsm6dsl.html
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This instance member is set as part of lsm6dsl_accel_set_odr_raw()
function, so there is no need to do it right before calling it.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use the new dts properties for sampling time in the STM32 ADC driver:
- Get the sampling time from dts
- Remove all sampling time macro concatenation.
- Simplify/refactor setting of sampling time
- Check that sampling time is the same for all series using common channel
This also fixes a few cases where wrong sampling times were used for an
ADC instance (like ADC4 on U5, or ADC3 on STM32H723).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
If clock frequency was already high and a ahb prescaler greater than 1
was used frequency could temporary become higher than allowed.
Signed-off-by: Benjamin Bigler <benjamin.bigler@securiton.ch>
Update LTDC driver to use LCDIF bindings, to simplify bindings
between LCD interface controller IP blocks.
Boards supporting the LTDC are also updated to use the properties as
declared by the new lcd controller binding
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update MCUX ELCDIF driver to use new LCDIF bindings. This
update also adds support for configuring the root clock of
the ELCDIF module based on the pixel-clock property to the
RT11xx SOC clock init, as this SOC series has this IP block
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update DCNANO LCDIF IP to use shared lcd interface binding. This
requires changes to the RT5xx SOC and RT595 EVK, as this SOC
uses the LCDIF IP, and configures the clock for it based off
the new pixel-clock property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce phy-clock property, which is used by MIPI devices to determine
the target clock frequency for the MIPI PHY. This property can vary
depending on the attached display and target framerate.
Update the MIPI DSI MCUX driver to utilize this property to configure
the MIPI host, and update the RT500 clock initialization to configure
the MIPI root clock based on this property.
Remove dphy-clk-div property from the MIPI DSI 2L binding, as it
is redundant with this change.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move definitions of the STM32 FDCAN specific registers to the front-end
driver implementation and implement remapping of these registers to/from
the standard Bosch M_CAN registers.
Some of the STM32 FDCAN register bit fields are limited in size compared to
the Bosch M_CAN specification. This is due to hardware limitations on the
number of elements in the various sections of the Message RAM. Add build
assertions to ensure the number of elements specified do not exceed the
hardware limitations instead of using custom definitions for these fields.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move definition of the NXP LPC MCAN specific Message RAM Base Address
register (MRBA) to the front-end driver implementation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some Bosch M_CAN IP core implementations use a fixed Message RAM
configuration, other use a fixed memory area and relative addressing,
others again have custom registers for configuring the Message RAM.
Move the responsibility for configuring the various Bosch M_CAN Message RAM
addresses to the front-end drivers. This removes some of the front-end
specific code from the backend. Provide a helper function for configuring
the most common variations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expose the can_mcan_read_reg()/can_mcan_write_reg() along with all the
Bosch M_CAN register definitions for use in Bosch M_CAN driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own register read/write
functions.
This is preparation for handling non-standard Bosch M_CAN register layouts
directly in the front-end and for accessing Bosch M_CAN IP cores over
peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use sys_read32()/sys_write32() instead of volatile struct for register
access. Be consistent in using unsigned constants in register
comparisons. Use locking around register read-modify-write operations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is a draft to support more controller implementations
with these drivers. The goal is also to make it easier to port
this driver to the new UDC API later.
We use compatible, like st,stm24f4-fsotg to support and enable
vendor-specific quirk. The core of the driver remains generic,
and therefore described and enabled by snps,dwc2 compatible.
STM32F4 support requires PINCTRL, even though pinctrl API is
generic, not all platforms implement it, so we have to include
and compile it conditionally.
Now we also switch to use new snps,dwc2 compatible and
explicitly force the controller into device mode,
as we do not support other roles or role changes.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add definition for GHWCFG1..4 registers to be able to obtain basic
information about PHY, endpoints, and Data FIFO.
Add GGPIO defines for STM32F4 SoC family USB controllers.
This implementation uses GGPIO to enable transceiver, VBUS
detection, and a few other functions.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Align and sort defines according to the position in memory.
Remove unnecessary parentheses.
Fix USB_DW_DSTS_ENUM_SPD_MASK.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Cleanup includes, fix build and missing kernel header include.
Move copyright notice to the top.
USB_DW_* macros are a bit misplaced in register header,
which is supposed to be about registers only.
USB_DW macro is used to point to base of controller register set.
Move it to driver code and add a new variable in driver's configuration
that takes the base address of the instance. This also makes later
porting to UDC API and support multiple instances easier.
Remove redundant DW_USB_IN_EP_NUM and DW_USB_OUT_EP_NUM
macros. Do not limit number of endpoint register in
struct usb_dw_in_ep_reg as it does not reflect common
register mapping of the controller.
Fix build warnings caused by USB_DW_EP_FIFO and use base variable
to calculate data FIFO access register.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In the case that there is a situation where the controller
oscillator start-up timer doesn't expire, or the SPI can't
read the CLKRDY bit the driver would hang during init.
The config option ETH_ENC28J60_CLKRDY_INIT_WAIT_MS sets
the time that the driver will wait for OST before returning
an ETIMEDOUT error.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
According to the coding guidelines "dynamic allocation is not allowed".
This commit removes handling invalid DMA capable buffers by allocating
temporary buffer in a valid memory region, considering them as errors.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
I2C driver overwrites i2c_msgs buffers, which
causes statistics to fail counting.
This creates new variables to hold msg buffer information.
Fixes#57532
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Mutexs were added to improve the overlapping phenomenon
because there is a part that shares the i2c line.
Signed-off-by: yeongnam chu <yeongnam.chu@assaabloy.com>
Add a function to wait for the full (bulk) Nor-octoflah erase command.
When erasing the full octo-flash, the drivers waits until
the operation is ready and the external NOR mem becomes ready itself.
The full (bulk) erase operation lasts for several seconds.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Update KCONFIG for flash driver to depend on
DT_HAS_FIXED_PARTITIONS_ENABLED, since that is necessary for the
driver implementation
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add driver for OpenTitan SPI host.
Tested and verified single SPI full duplex on opentitan_earlgrey in
Verilator.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Add a semaphore to the entropy mcux caam driver
to make the driver thread safe, since some static
variables in the HAL can be the source of
some race conditions.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Rather than the rings, which weren't shared between userspace and kernel
space in Zephyr like they are in Linux with io_uring, use atomic mpsc
queues for submission and completion queues.
Most importantly this removes a potential head of line blocker in the
submission queue as the sqe would be held until a task is completed.
As additional bonuses this avoids some additional locks and restrictions
about what can be submitted and where. It also removes the need for
two executors as all chains/transactions are done concurrently.
Lastly this opens up the possibility for a common pool of sqe's to
allocate from potentially saving lots of memory.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Renamed CONFIG_ADC_GECKO to CONFIG_IADC_GECKO to eliminate confusion
between the Incremental ADC found on series 2 silabs gecko MCUs, and the
ADC found on earlier gecko series.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Introduce a new SiP SVC subsystem to provide ARM Silicon Provider based
supervisory call services. SiP SVC service provides the capability to
send SMC/HVC call from kernel running at EL1 to hypervisor/
secure monitor firmware running at EL2/EL3 and also added SiP SVC shell
commands to exercise the service.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Add driver for communicating with EL3/EL2 layer using smc/hvc call
for Silicon vendor Provided services for INTEL AGILEX SOC FPGA.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Added device tree bindings and implementaion for setting the
spi controllers chip select setup and hold time settings.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Most available AT45 flash chips have their first two sectors shorter
than the consecutive ones. Usually, the first sector is marked as 0a
and has its size equal to eight pages (one block) and the second one
(usually 0b) is the complement to the size of a regular sector.
This commits modifies the driver so that erasing of these first two
sectors is performed correctly. This modified behavior is configurable
with a new DT property so that it is still possible to also use legacy
AT45 chips that do not feature such sector split. Such legacy chips
usually also do not support the chip erase and sector erase commands,
so two more DT properties are introduced to cover that.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The HAL function PWM_SetupPwm does the inverse division to get the
number of pulses from the frequency.
In the case of a prescaler of 1 and a period of UINT16_MAX cycles
this would result in an uint16_t overflow.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The LSM6DSO16IS is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSO16IS embeds a new ST category of processing,
ISPU (intelligent sensor processing unit) to support real-time applications
that rely on sensor data. The ISPU is an ultra-low-power, high-performance
programmable core which can execute signal processing and AI algorithms
in the edge.
https://www.st.com/en/mems-and-sensors/lsm6dso16is.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add STMEMSC_CTX I2C/SPI/I3C macros that can be reused among all STMEMSC
based ST sensor drivers to populate the stmdev_ctx_t stucture.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add test case for all drivers that are supporting the sensorhub
feature, and fix right away all the yet undiscovered issues.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In the real MiV platform, UART does not have any interrupts routed to
the interrupt controller.
Up to this stage, the driver implemented a separate thread to simulate
interrupt operation to enable shell samples. This is not required anymore,
as Zephyr can run shell on interrupt-less UARTs.
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Re-enable reception on the UART instance when `UART_RX_DISABLED`
triggers, which can happen when errors occur on the line.
This stops the driver permanently moving into an unresponsive state.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The emulated espi and i2c bus controllers do not depend on CONFIG_EMUL
being enabled. When these fake bus controllers are enabled by their
assoicated compatible in the devicetree without CONFIG_EMUL it results in
linker failures for underlying peripheral emulators which may be difficult
to understand. The SPI config already depends on EMUL.
Make the ESPI and I2C emulated controllers depend on CONFIG_EMUL. Note:
This still allows linker failures if CONFIG_EMUL=n, but the linker failures
will be consistently at device driver instantiation due to a missing bus
controller. Regardless, this will be easier to debug when someone forgets
to enable CONFIG_EMUL.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The nrfx SPI driver depends on semaphores, which require multithreading
support to be enabled.
Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Use new nrfx hal function to memcpy from flash
instead of accessing the array directly.
That function is inlining a memcpy for real targets,
so there is no practical difference for those.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add charging mode support the PI3USB9201 emulator and add a backend API
for connecting/disconnecting a portable device partner.
Signed-off-by: Keith Short <keithshort@google.com>
Update the result callback routine to also provide information about the
charging mode role. This permits tests to validate plug/unplug events
detected by the BC1.2 device operating in charging mode.
Signed-off-by: Keith Short <keithshort@google.com>
This PR adds a driver for the BMI323, which implements
the following features:
* Enable and disable accelerometer and gyroscope respectively
* Set full scale for accelerometer and gyroscope respectively
* Set data rate for accelerometer and gyroscope respectively
* Get samples (x,y,z) from accelerometer and gyroscope respectively
* Get die temperature
* Set trigger to accelerometer data ready, and accelerometer any motion.
The driver implements device and device runtime power management. If
runtime management is used, it is initialized into the suspended state,
which soft-resets the device to achieve the lowest possible power
consumption, otherwise it is resumed when initialized. When resumed,
the bus is initialized, the feature engine is enabled, and INT1 is
initialized.
The driver only implements the SPI bus at this time. The driver is
prepared to be expanded with I2C support in the future.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Word size setting limited any SPI transaction to the frame
size. In addition to making the SPI inefficient this
broke drivers that set the word size. It appears that most
drivers use a one byte (8) size for this setting.
This change respects what I think is the intended use of
the word size setting. That is to set the length of
each element in a tx/rx buffer struct.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Allow defining multiple instances of enc28j60.
Remove the ETH_ENC28J60_0 Kconfig option along with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add the `full-duplex` property for the `microchip,enc28j60` node.
Replace ETH_ENC28J60_0_FULL_DUPLEX Kconfig option with this property.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
This patch adds MULTITHREADING as a dependency to the nrfx i2c driver.
The driver uses semaphores internally and can result in linker errors
if MULTITHREADING is not enabled.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Updated the code to to invoke reset using PCR block
z_mchp_xec_pcr_periph_reset() instead of resetting
using I2C Configuration register
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Do not enable SOF event interrupt when the USB device driver is going to
discard the event anyway. This prevents completely unnecessary interrupt
handler from executing 1000 times a second when device is connected.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
nrfx 3.0 introduces parameter `_frequency` in
`NRFX_TIMER_DEFAULT_CONFIG()` macro. This patch aligns use of it.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Reworked QDEC SHIM to suppor multi-instance peripheral. Patch includes
Kconfig alignment for proper instance handling.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release extended nrfx_i2s API and requires to specify
pointer to driver instance structure. This commit aligns SHIM
to reworked nrfx driver.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Although existing nRF SoCs have only one I2S instance, the nrfx_i2s
driver has now multi-instance API and the related nrfx configuration
symbols need to be used appropriately.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
With new nrfx release SPIM driver stores frequency as a `uint32_t`
type representing frequency in `Hz` in its configuration structure.
Additionally `NRFX_SPIM_PIN_NOT_USED` has been removed,
`NRF_SPIM_PIN_NOT_CONNECTED` symbol is used instead.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release aligns PWM fields in driver instance structure
to common nrfx naming convention.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release replaces `nrf_wdt_behaviour_t` type
to `nrf_wdt_behaviour_mask_t` enumerator. As a result function
setting behaviour accepts `uint32_t` bitmask of behaviour.
This commit aligns symbols used in SHIM to the ones introduced
with the nrfx release.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release brings renamed macros and symbols in nrf_rtc.
This commit alligns RTC counter SHIM to it.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release brings change of Low frequency sources symbols
in nrf_clock hal to uppercase. This commit aligns all occurrences.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
When running cppcheck on eth_stm32_hal.c it generated a warning for
shiftTooManyBitsSigned.
The solution is to make sure that the numeric value shifted is unsigned.
Updated to use BIT() macro as suggested by GeorgeGCV.
Fixes: #57336
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Fix link error when both modems' drivers are enabled
as they both define the same structure but did not
make it static.
This fixes the CI build failure of
tests/drivers/build_all/modem/drivers.modem.simcom_sim7080.build
on particle_boron
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the following build warning:
include <fcntl.h> without CONFIG_POSIX_API
is deprecated. Please use CONFIG_POSIX_API
or #include <zephyr/posix/fcntl.h>
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add the ability for the flash simulator to store its contents in a
memory region.
This allows filesystems on the flash simulator to survive a reboot.
And allows subsystems (e.g. coredump) to store their info on ram while
using the (existing) flash partition backend.
Add a example (for nucleo_f411re) that shows how to configure the flash
simulator for hardware (cfg discussion #54166).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Add support for a generic NTC, `ntc-thermistor-generic`. In this case,
the compensation table is provided via devicetree. Note that DT property
is prefixed with `zephyr,`, because while hardware related, it is linked
to a particular software implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Refactor driver to align a bit more with its Linux counterpart, ie,
ntc_thermistor. This driver did quite a few _unconventional_ things,
like using "zephyr," compatibles, a dedicated node for pre-computed
compensation table (referenced by the actual pseudo-device node), etc.
The comparison helper function should likely be simplified as well (to
avoid the need for custom wrapper for bsearch), but this can be done
later.
In this refactor, each thermistor gets a compatible, e.g. "epcos,xxxx".
Compatibles are known by the driver, so are compensation tables. This
simplifies devicetree files. There's no need to bother about
compensation tables in **every** board file if Zephyr supports a certain
NTC model.
In general we should respect Linux bindings, which in the end influence
how drivers are implemented. In this case, this principle resulted in
simplified, easier to use code.
For future developers, this is how support for a new NTC can be added:
1. Add to the end of the driver:
```c
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_model
static __unused const struct ntc_compensation comp_vnd_model[] = {
{ x, y },
...,
};
#define DT_INST_FOREACH_STATUS_OKAY_VARGS(NTC_THERMISTOR_DEV_INIT,
DT_DRV_COMPAT, comp_vnd_model)
```
3. In driver's Kconfig make sure it depends on
DT_HAS_$DT_DRV_COMPAT$_ENABLED
Note: $X$ means _value_ of X.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It looks like the Zephyr thermistor driver bindings were half-copied
from Linux ntc-thermistor. Zephyr principle is to maintain compatibility
with Linux, when possible, so there's no reason to deviate here. Convert
the connection type from a custom enum to a boolean, as Linux does.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This fixes this bug:
https://github.com/zephyrproject-rtos/zephyr/issues/57498
If bit 1 is set, then a write enable is required before
sending the 0xb7 instruction to enable the 4 byte address
mode, which this PR implements.
Signed-off-by: Frank Buss <fb@frank-buss.de>
1. Fix sensorhub names using the zephyr A.2 rule (use inclusive language).
The only exception is names within STMEMSC API and h/w register names.
2. Extend the STMEMSC API usage. It is always better to not code again
already existing functionalities.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Always set the interrupt pulse settings when sampling at greater than 4khz
to better ensure the interrupt line is toggled and caught correctly.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
SPI configuration did not set bit ordering or more importantly the clock
polarity which seemed to be misconfigured. Setting this corrects one more
quirk when working with this part on the TDK Robokit1
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Initial sensor driver for NPM1300 PMIC charger.
Includes basic configuration of charger voltage and current.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The stm32_lptim_wait_ready() is waiting for the DIEROK flag
with a while loop. It should not be repeated.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When dma is enabled, spi_xmc4xxx_transcieve_dma() needs to disable the
isr used by spi_xmc4xxx_transceive(). Renable the isr at the
end of spi_xmc4xxx_transceive_dma() instead of in spi_xmc4xxx_transceive().
Doing this in latter function will fail compilation when interrupt
support is enabled but dma is disabled.
This is regression from 8494b6413a
but was only caught when xmc47_relax_kit was added which tested this
scenario in tests/drivers/spi/spi_loopback.
Fixes#57494
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Ignore touch events from GT911 IC when TOUCH_STATUS_MSK bit is not set
in status register. This resolves an error where the GT911 driver would
report a touch event end directly after a touch occured, as the touch
status register would be 0x0, which the driver incorrectly interpreted
as a touch release.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Commit f1b0b458b0 mistakenly selected the
SERIAL_SUPPORT_ASYNC kconfig for the kinetis uart
driver when enabling the lpuart driver. Revert this,
because the kinetis uart driver does not support async api.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
SPI / QSPI flash with density above 16MB must use 4 byte addressing mode
also on sector erase.
This patch selects the right addressing mode and opcode when 4 byte
addressing mode is selected
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Use level triggered interrupts instead of edge triggered interrupts to
make it impossible for the interrupt line to be active without the RX
thread attempting to read pending data.
This fixes a race condition for re-enabling the interrupt in edge
triggered mode, where `gpio_pin_interrupt_configure_dt` is not called
before the controller re-asserts the interrupt line.
As a result the controller can be reset before booting the RX thread.
Fixes#53980.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some single-precision float constants were being compared against
double-precision floats. Make the constants doubles.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add Port 14/15 to device tree. These ports can only be configured as input.
Error out in gpio driver if user sets them as output.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Regenerate/rewrite the Bosch M_CAN register field definitions using the
GENMASK() and BIT() macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use the FIELD_PREP() and FIELD_GET() macros instead of manual bitshifts and
masking. Be consistent in the use of register field definition macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the local "const struct can_mcan_config *" variables from "cfg" to
"config" to be consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Get rid of the can_mcan_configure_timing() helper function as it provides
no benefit to just having the implementation split in can_mcan_set_timing()
and can_mcan_set_timing_data().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the driver initialization function to the bottom of the file to be
consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Pass a pointer to the struct device for internal driver functions instead
of passing around a pointer to the register struct.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reading the temperature calibration data requires disabling the icache
of the stm32h5x mcu.
Else a bus fault error occurs reading Address: 0x8fff8014-0x8fff818
Enable afterwards.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
When using gpio chip select the clock line seems to get stuck low after
some transactions. When attempting to use other SPI_CSR registers
the peripheral fails to work as expected.
Always using SPI_CSR[0] when using gpio chip selects resolves the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch introduces support for NXP S32 CANEXCEL (CANXL) peripheral.
CAN protocol supporting:
- CAN classic
- CAN FD
Remote transmission request is not supported as this feature is not
available on NXP S32 CANXL HAL.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
These variables are now provided by the FindBabbleSim
cmake module, which finds them in the environment or thru
west.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
In some cases, the enable pin may be already enabled by a previous
stage, e.g. bootloader. Therefore, it is not desirable to disable
the pin, as it could cause malfunctioning of the device. Refactor init
procedure so that we pick the right GPIO flags during the first
configuration stage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.
Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.
Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index
Signed-off-by: Marek Metelski <marek@metelski.dev>
Add another helper function to send VW notification that is
neither a warning or conveys a system state.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Remove all enabling of CONFIG_EMUL_.* in favor of automatically enabling
peripheral emulators based on the compatible string presence in the device
tree and the one true CONFIG_EMUL.
Zephyr has long since moved to a model of enabling drivers based on the
presence of their associated IC's compatible string in the final devicetree
overlay. There is no reason that emulators can't align in just the same
way, and probably ought to to remove superfluous enabling of configs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
According to the datasheet for Marvell PHY [1], the mode field of the
General Control Register 1 Page 18 occupies bits [2:0]. However, the macro
PHY_MRVL_MODE_CONFIG_MASK specifies the mask as 0x3, which would
correspond only to [1:0]. The code in phy_xlnx_gem_marvell_alaska_cfg()
uses the mask to set the mode field to 0 to set "RGMII (System mode) to
Copper" mode. Unfortunately, different chips have different reset values
(111 or 000) and in first case, the code would set the field to 100,
instead of 000.
Without this change, ethernet on Avnet MicroZed (Marvel Alaska 88E1512 PHY)
does not work.
Signed-off-by: Marek Vedral <vedrama5@fel.cvut.cz>
[1]: https://www.marvell.com/content/dam/marvell/en/public-collateral/phys-transceivers/marvell-ethernet-phys-alaska-88e151x-datasheet.pdf
If the boot loader already switched the system clock to PLL1 we need
to switch back to HSI first and disable PLL1 before we can configure
PLL1. Otherwise the register writes will simply be ignored and we'll
end up with an inconsistent state.
Most of the code has been recycled from `clock_stm32_ll_common.c`.
Signed-off-by: Sascha Silbe <sascha-pgp@se-silbe.de>
Signed-off-by: Sascha Silbe <sascha-pgp@silbe.org>
To be consistent with the current NXP clocking scheme,
move the LPADC clocking code to the SOC files where
all of the other peripheral clocking is done.
Also remove any other SOC-specific code to the
respective SOC file and out of this driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Code for power level property was accidentally
removed by accident from driver in commit 9921c59f40
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
spi_context_get_next_buf must not divide `len` by `dfs` because, in SPI,
buffer lengths are given in units of data (in this case, 16 bits), not in
bytes.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Added RTC driver that supports Motorola MC146818B
Enabled RTC set/get time and alarm, alarm callback
and update callback.
Counter and RTC uses same hardware in case of
Motorola MC146818, so they can't be used at a time.
Updated stand-alone mc146818 counter dts instances
to support rtc and counter with same compatible
string of "motorola,mc146818" on ia32, atom,
apollo_lake, elhart_lake and raptor_lake platforms.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
By default HSIDIV is set to 0x01, so default frequency is 32 MHz.
This register should be always set based on dts value.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
The SAM GMAC driver is not able to use all of the receive buffers
concurrently. Frames larger than (buffer size) * (buffer count - 1) are
silently dropped. Fix it by adding one to MAIN_QUEUE_RX_DESC_COUNT.
Fixes#55701
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
The `config` and `api` members of `struct device` are expected
to be `const`. This also improves reliability, as `config`
and `api` are stored in rom rather than ram, which has the
potential to be corrupted at runtime in the absense of an MMU.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
There are use cases for the pcie_ep driver where we don't
necessarily need the dma functionality. Added ifdef's around
the dma functionality so that it's only available if we
specify the dma engines in the device tree similar to
```
dmas = <&pl330 0>, <&pl330 1>;
dma-names = "txdma", "rxdma";
```
Signed-off-by: Tarun Karuturi <tkaruturi@meta.com>
Signed-off-by: Chris Friedt <cfriedt@meta.com>
This patch adds support for the TI INA3221 current monitor.
This is the datasheet used for reference:
https://www.ti.com/lit/gpn/ina3221
Since this device has three channels, there is a custom attribute to
select which channel is to be used when getting a sample.
Measurements are done on all enabled channels.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Make it possible to use CPOL/CPHA SPI clock modes with the SDHC driver.
Some cards require the clock to switch to low when not active.
Signed-off-by: Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
some floats were getting promoted to doubles or they needed to be
casted as doubles to be used by printf
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Following #56576, the `cs` field in `struct spi_config` is of type
`struct spi_cs_control` instead of a pointer to the same type.
`spi_xec_qmspi_ldma.c:qmspi_xec_init` tries assigning `NULL` to the
`.cs` field through a designated initializer, which causes a compilation
error.
This PR simply removes the `.cs = NULL` line. The designated initializer
will automatically zeroize the underlying GPIO pin info, which should
have the same effect that setting the pointer to NULL did previously.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Disable the hardware I2C target detection on the IT82xx2 SoC family.
Note: The register setting of I2C target detection is different in
IT81XX2 and IT82XX2 SOC.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Simplify the STM32 ADC driver code by using the new ADC resolutions
property in dtsi files.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
chip specific values documented in reference manuals
instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The MCUX USB device driver currently suffers from
some performance related issues caused by the removal
of the intermediate buffer in commit 4e6f80d37a.
This buffer was essential in the case when some USB
descriptors or data were in a slow access memory,
for example a flash memory accessed over flexspi.
USB DMA as AHB master would try to fetch the data,
but it would be too slow and USB peripheral
could not meet deadlines on the USB bus waiting for it,
and so it would send null packets instead causing errors.
This problem can be fixed by re-introducing an intermediate
buffer in RAM with the data copied from the slow memory by
the core before the USB transfer begins, so that USB DMA
is not responsible for fetching it from flexspi/flash.
Changes to MCUX USB Device Driver:
- Re-add intermediate buffer for USB writes in RAM
- Buffer is not needed for reads, add runtime check
to avoid copy overhead
- Buffer is not needed for platforms with USB RAM,
since the USB RAM itself acts as an intermediate buffer.
Compile with buffer code only when USB RAM is not present on
the platform, to avoid unecessary copy overhead.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This PR will divide the LPTIM clock freq to increase the max timeout.
Only one LPTIM instance is considered for PM timer.
The input freq becomes a fraction of the internal PCLK
source (mainly LSE clock). As the tick per sec does not change,
the minimum lptim counter must always be >0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
CAVS platforms are not fully integrated with zephyr. Some of the
registers are still programed from SOF side. This feature can be enabled
for those platforms later when integration is fully done.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Adding function that is allowing to release ownership of the DMA. When
DSP is no longer using dma instance it ownership can be released.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch is refactoring device power flow routine. DMA instance will
not be power up after kernel initialization if device power management
is enabled. Power menager will power up device and its power domain if
device will be in use and disable it when it's no longer needed.
The DMA disabling part has not yet been implemented.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
When building drivers.modem.build we get a link error since
log_source_id_get() is not defined when CONFIG_LOG_MODE_MINIMAL
is defined.
Change ifdef protection to be CONFIG_LOG_RUNTIME_FILTERING
instead of CONFIG_LOG in the code to handle this case.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Mark the device as busy when it is locked to perform a flash operation
so that the PM subsystem does not try to suspend it. Also refuse to run
a PM action when the device is busy (in case `qspi_nor_pm_action()` is
called directly, not by the PM subsystem).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implements a UART driver using PIO. Both PIOs are supported.
Only polling API is supported. Only 8N1 mode is supported.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Added a generic driver for RaspberryPi Pico PIO.
This driver is an intermediate driver for abstracting the PIO
device driver from physical pin configuration.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
In some cases, it may be desirable to not have thread-safe reference
counting. For example, when CONFIG_MULTITHREADING=n.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Original computation seems to be based on
QSPI that has prescaler range [0, 255].
However, OSPI clock prescaler has different
value range [1, 256].
Adapt prescaler computation to valid OSPI
domain and add min value assert.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Set STM32CubeHAL ethernet version in use as V2 by default, on series
supporting it (H7, F7, F4). Not yet available on F2 series.
Add a choice symbol to explicit V1 version as deprecated.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The SAM GMAC driver is not utilizing the entire receive buffer, causing
large packets to be dropped. Fix it by setting Receiver Packet Buffer
Memory Size Select to Full (RXBMS = 3) in the GMAC_DCFGR register.
Fixes#55701
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
When building with arm-clang we get warnings of the type:
wncm14a2a.c:828:14: error: array subscript is of type
'char' [-Werror,-Wchar-subscripts]:
} else if (isalpha(c2) != 0) {
^~~~~~~~~~~
Fix this by adding explicit casts to (int) when callinng isalpha()
or isdigit().
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Add spi_cs_is_gpio(_dt) helpers to check whether SPI CS is controlled by
GPIO or not. This both improves code readability and isolates SPI
internals.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As of today it is not possible to use SPI dt-spec macros in C++,
something known and documented. The main reason is because `cs` property
is initialized using a compound literal, something not supported in C++.
This PR takes another approach, that is to not make `cs` a pointer but a
struct member. This way, we can perform a regular initialization, at the
cost of using extra memory for unused delay/pin/flags if `cs` is not
used.
Fixes#56572
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The help text indicates the range of value is 0-255, while the actual
maximum value acceptable is 100.
This commit updates the text to accurately reflect the acceptable
value range for the set_brightness API.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Replace custom macrology that was checking if any instance had the
int_gpios property with DT_ANY_INST_HAS_PROP_STATUS_OKAY.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add TRNG support for BG27, which has slightly different register
definitions in HAL, compared to BG22.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
port commit f7f47dc to stm32h5
Without this fix, ADC driver will hang when reading internal channels.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The iMX platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Microchip XEC platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add STM32WL-specific sx126x_set_tx_params function based on the
STM32CubeWL modifications to LoRaMac-node.
Add the "power-amplifier-output" DT property to
"st,stm32wl-subghz-radio" for selecting between the RFO_LP and RFO_HP
output configurations provided by the above mentioned function.
Add the "rfo-lp-max-power" and "rfo-hp-max-power" DT properties for
defining the maximum design power of the respective outputs' matching
networks.
closes#48511
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
The stm32f4 and stm32f7 serie has to compile the stm32_ll_rcc
layer to get the LL_RCC_GetSystemClocksFreq function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adapt the stm32 counter-timer driver to the stm32_ll function
prototype. Some stm32 families have
LL_TIM_OC_GetCompareCHx(TIM_TypeDef some others have
LL_TIM_OC_GetCompareCHx(const TIM_TypeDef.
This will fix compilation warning.
Adds the macro for stm32L0 16bit timers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix a very old cmake warning for the nrf52_bsim due to the
console library being empty.
The printk backend was originally provided by the board
code for simplicity, but this left the console library
empty when building for this board.
Instead refactor that code to where all printk backends are.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
We should only try to register a printk backend
if printk is compiled in, otherwise we get a link
error.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
A recent commit broke the power-up sequences for other Intel
platforms.
Fixes: 1e5550d262 ("intel_adsp: ace20_lnl: ssp: Program new HW registers")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The logic to poll on CPA bit is not working on non-ACE2.0
platforms. This is causing regressions in SOF test suite with
dmic.
Fixes: 2547948544 ("intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Use PRIxPTR macros to fix compiler warnings of the form:
i2c_xilinx_axi.c:266:50: warning: format specifies type 'unsigned long'
but the argument has type 'mem_addr_t' (aka 'unsigned int') [-Wformat]
LOG_INF("Configuring %s at 0x%08lx", dev->name, config->base);
~~~~~ ^~~~~~~~~~~~
%08x
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Change init priority for SMBus from KERNEL_INIT_PRIORITY_DEVICE (50)
to KERNEL_INIT_PRIORITY_DEFAULT (40) since other devices which depend
on SMBus (like EEPROM) have the same priority.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
For the POSIX architecture, add options to:
* Clear the flash content at boot
* To delete the file on exit
* To just keep the flash in RAM instead of a file in disk
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit removes the unused argument form the `slz_bt_init` function,
and makes it consistent with what `SYS_INIT` expects - `int (*)(void)`.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The fuel gauge tests should *not* have to enable CONFIG_SENSOR in order to
get access to the sbs gauge emulator.
Allow fuel_gauge sbs_gauge direct access to emul_sbs_gauge.c
Signed-off-by: Aaron Massey <aaronmassey@google.com>
All other watchdog drivers also use POST_KERNEL, and it seems on some
platforms where the TCO watchdog is used not all dependencies are yet set
up by the PRE_KERNEL_1 level.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit adds the SiLabs Bluetooth HCI driver. It also enables this
BLE HCI driver on the efr32bg_sltb010a board.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
When ASAN is used cmd_status is kept, but it cannot be linked
as the shell module is not present, this prevents ASAN
being used with the nrf52_bsim.
Fix it by conditionally compiling this code only if the shell is
being used.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
When using a dummy buffer on the RX side, do not
increment the destination memory buffer address.
This issue was uncovered when running the SPI
loopback test.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The address increment logic was looking at both source
and destination parameters together. Separate them so
we can set one.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The function dai_ssp_poll_for_register_delay() is meant to poll the
register until the value of the mask bits is equal to the "val"
argument or until poll timeout has occured. WAIT_FOR() returns the value
of the checked expression, so the check should be modified accordingly.
This should prevent the errors seen during every SSP trigger as below:
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487432 mask 4 val 4 us 125
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487496 mask 63 val 0 us 937
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Move semicolon from end of DT_INST_FOREACH to DEVICE_DT_INST_DEFINE
to make multi-instancing possible. This caused some problems with
CI after adding adc node to native_posix dts.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
The spi-sam0 driver does not initialize DMA parameters when the MCLK
peripheral is defined in the microcontroller header file. Fix it by
copying the initialization code from the non-MCLK case.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
- Add initial version of Infineon CAT1 i2c driver.
- Add initial version of binding file for Infineon
CAT1 I2C driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Errata sheet of the stm32U5 (ES0499) recommends to avoid clearing
the DMAT bit with LL_USART_DisableDMAReq_TX to re-start
a DMA transfer on the UART Tx block. The function becomes empty.
This is also seen for stm32H5.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
The delayblock is bypassed when the <dlyb-bypass> property is true.
DT_NODE_HAS_PROP tests whether the property is defined at all,
not whether a boolean property is true or false.
To get a boolean property’s truth value,
use DT_PROP(node_id, prop) instead.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The below is the unit test result for the driver and kernel of
it82xx2_evb board.
GPIO/gpio_basic_api: PASS
I2C/i2c_api: PASS
Flash: PASS
UART/uart_basic_api: PASS
PWM/pwm_api: PASS
WDT/wdt_basic_api: PASS
KSCAN/kscan_api: PASS
kernel/sched/schedule_api: PASS
kernel/sched/preempt: PASS
kernel/timer/timer_api: PASS
kernel/sleep: PASS
ADC/adc_api: PASS.
ADC note: conversion time~=61.6us
sample time delay~=60us
wait voltage stable time~=202.8us
Set sampling time to 500us will pass for ADC test.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the pinctrl node that has been remapped in the chip of it82xx2.
And modify kscan's pinctrl for the it82xx2.
And swap I2C default pins.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
On iMX.RT devices, the number of GPIO pins exceeds the maximum of
64 that the PINT interrupt controller can support. Therefore, two
interrupt lines are now shared between the GPIO modules.
This patch allows the user to set the interrupt source for a GPIO
peripheral. For most LPC devices, this will always be the PINT. For some
RT devices, the PINT cannot use pins on GPIO modules other than 0 and 1
as input, and thus the INTA and INTB sources should be used.
Since Zephyr does not support sharing these interrupt between all GPIO
controllers, the user must configure a subset of all GPIO controllers to
use the shared module interrupts. An example of how to do so is provided
for the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove PINT management code from the LPC GPIO driver, as this code is
now contained within the PINT interrupt controller driver, which exposes
an interface to install interrupt callbacks.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.
Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch fixes i2svss field initialisation in Device Tree for LNL
platform. It fixes this bug: #482
Problem is observed only when using SSP_BLOB_VER_1_5 version.
Unfortunatelly this version is not tested in FW validation tests.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Clearing SPA bit together with OFFLEN bit causes FW hang.
This patch changes sequence to avoid that situation.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The upper ssp slot number should be retrieved from configuration
blob to support all possible settings. This patch fix this issue.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Repleace usage of shim2 device tree field with hdamlssp.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In LNL platform GPDMA and ALH is no longer used. SSP uses LINK HDA
as a DMA engine. Therefore new shim, new register definitions and new
programming flows were defined.
This patch implements new SSP programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Normally, the driver deactivates the QSPI peripheral for periods when
no QSPI operation is performed. This is done to avoid increased current
consumption when the peripheral is idle. For the same reason, the base
clock on nRF53 Series SoCs (HFCLK192M) is configured for those periods
with the default /4 divider that cannot be used otherwise. However,
when XIP accesses are used, the driver must be prevented from doing
both these things as that would make XIP to fail. Hence, a function
is provided so that applications can inform the driver that XIP is
needed and the above idle actions should be suppressed.
This function (`nrf_qspi_nor_xip_enable()`) replaces the old one
(`nrf_qspi_nor_base_clock_div_force()`) that was intended for similar
purpose but after deactivation of the peripheral was introduced in
commit 95d867e8ed it became useless.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the RTC driver menuconfig title to match the unified format
introduced in c41dd36de2.
Move the RTC driver menuconfig entry so the menuconfig list is still
(mostly) alphabetically sorted.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a dependency on CONFIG_NET_L2_ETHERNET for
CONFIG_ETH_INIT_PRIORITY. This hides the Ethernet driver initialization
priority option in menuconfig unless CONFIG_NET_L2_ETHERNET is selected.
CONFIG_ETH_INIT_PRIORITY cannot currently be moved inside the
CONFIG_ETH_DRIVER if-statement in Kconfig as it is used outside the
Ethernet driver source files.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce dedicated init priority for AT2X EEPROMs connected via
I2C or SPI to ensure they are initialized after I2C/SPI by default.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as
described in Xilinx document PG090. This can be configured for use on
most Xilinx FPGA-based platforms such as the Digilent Arty.
Both the 2.00a and 2.1 versions of the core are supported. The 2.00a
revision has a bug causing dynamic read mode to not be reliable. With
this version of the core the driver falls back to reading only 1 byte
per interrupt.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The get_status api allows to query whether clock is turned on or off.
Like the get_rate call, the status of gated clocks (for specific
peripherals), as well as domain clock sources(HSE, PCLK, PLL_P,..)
can be checked this way.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Move the Segger RTT module Kconfig to modules/segger/kconfig. The Segger
debug library is not a driver and should not reside under drivers/debug.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix isr function definition
to avoid a compile warning.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.02. Please note that now a new function
callback, mdelay(), must be provided in case the stmemsc HAL requires
to wait for a certain amount of milliseconds before or after some
special operations.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/13
(merged as 5948f7b3304f1628a45ee928cd607619a7f53bbb)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
LTC1665/LTC1660 is a 8/10-bit Digital-to-Analog Converter
(DAC) with eight individual channels.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Don't check clock configuration before kernel was started since it
will prevent message to be displayed.
After kernel initialization, message is still valid and then ASSERT
more valuable to the user.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sleep after carrier activation was badly ported so the time
was 1000 ms instead of 1 ms.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
When the phy_event state diagram ends up in the
eth_mcux_phy_state_read_status case, the eth carrier
is enabled. However, this step only happens when an
interface is available in the context.
Regardless of the state of the iface, the state machine
will switch to eth_mcux_phy_state_read_duplex in the next
iteration. Thus, the states diagram never returns to the
previous state. As a result, the eth carrier will never
be enabled in the future.
This problem is fixed by setting the wait state if the
iface is not available.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In LNL platform GPDMA and ALH is no longer used. DMIC uses LINK HDA
as a DMA engine. Therefore new shims, new register definitions and new
programming flows were defined.
This patch implements new DMIC programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Updated boot priority to PRE_KERNEL_1 for all instances
and removed dependency on PCIe. As shell is not working
in a situation where console is using a UART instance
under PCIe and boot priority set to POST_KERNEL.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Add support for negative temperature coefficient for single calibration
chips in the STM32 temperature driver.
That feature is necessary for STM32F0x0.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The native_tasks definition was directly in the soc_inf soc.h
header. But soc.h pulls a lot of other headers.
Some of those could cause conflicts, say with application
headers, for users who only wanted the be able to register
native tasks in a module.
Let's refactor the native tasks definitions into their own header
and include that header from soc_inf's soc.h.
In this way users who need only need to register a native tasks
can just include posix_native_tasks.h, and all previous users
see no change.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
add support for async call and repeat sample test
1. change the DMA req to 2 byte each
2. increase the buffer pre-dma
3. add protection on invalid buffer
depends on: PR #56104
fixing: issue #56070
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Rename the nxp,kinetis-flexcan devicetree compatible to nxp,flexcan as it
is not specific to the NXP Kinetis series.
This is preparation for adding a nxp,flexcan-fd binding.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add new compatible to separate production calibrated sensors
with single and dual calibration temperatures. Also update
stm32_temp driver to support single calibration sensors.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Removes a workaround that was required while there was a bug in
upstream STM32 HAL drivers where the oversampling was not set
correctly in all cases. This has since been fixed, and also
added to the Zephyr STM32 HAL.
The upstream issue:
https://github.com/STMicroelectronics/STM32CubeH7/issues/177
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Use CONFIG_I2C_INIT_PRIORITY instead of
CONFIG_KERNEL_INIT_PRIORITY_DEVICE as introduced in
c8f9f53322.
Looks like the priority was accidentally changed in
f2c42663b4.
Signed-off-by: Martin Jäger <martin@libre.solar>
Adds support for a devicetree property that controls the ClockDiv
value provided to the SDIO during init.
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Many areas of Zephyr divide and round up without using the DIV_ROUND_UP
macro. Make use of it, so that we make use of a tested system macro and
at the same time we make code more readable.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It was too strict to require the caller to pass in an accurate odr as a
parameter. This patch is to round the odr up to the nearest one, when odr
does not match.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
rename the function that sets the handler for the nmi.
It should be namespaced and not camel-case:
z_NmiHandlerSet to z_arm_nmi_set_handler
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Fixes a race condition between uart_xmc4xxx_dma_rx_cb() and rx timeout.
Although uart_xmc4xxx_dma_rx_cb() called k_work_cancel_delayable()
to cancel the timeout callback, it would not actually be cancelled if
the callback was already in a running state.
Fix the race condition by checking if dma transaction is already
completed in the timeout callback.
This also fixes unit test tests/drivers/uart/uart_async_api on
xmc45_relax_kit which started to fail after commit
f3afd5a4c9.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers disabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers disabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
BDCR could be required for LSE or RTC for instance.
Enable it here as for now, no sophisticated PM handling is available
on F3 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The internal socket context struct modem_socket_config
currently has members accessed directly by user. The
modem_socket_init() function has been updated to take all
user configurations as args. Thus removing the need for
the user to directly access the internal context for
initialization.
The user also currently needs to know of internal modem
socket libary behavior to determine if a socket has been
allocated and assigned an id, this is documented, and is
not safe. The functions:
modem_socket_is_allocated()
modem_socket_id_is_assigned()
modem_socket_id_assign()
have been added to the modem socket library API to perform
these checks, and to assign socket ids.
This commit makes use of the modem socket library safer and
adds documentation to the API.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
There is currently not a clear separation between
user configuration and internal context when using the
modem_cmd_handler library. This update adds a clear
separation, placing user configuration in a seperate
struct passed to modem_cmd_handler_init alongside the
internal context modem_cmd_handler_data.
There is also a lack of documentation of the user
configurations, these have been added to the new config
struct.
The new API function modem_cmd_handler_process has been
added to remove the need for the user to directly access
the process member of the internal context. This ensures
that the user is not encouraged to access any internal
context members.
Some whitespace errors exist in the modem_cmd_handler.c
file, these are outside of the scope of this PR. These
can be addressed in a later PR as they are not functional
changes.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
The UART IFACE API currently exposes the context struct
modem_iface_uart_data, expecting the user to fill in some
of the fields, with no documentation specifying which fields
and what they mean.
This API update moves all user configurable values in the context
out into a config struct, modem_iface_uart_config, within which
members are documented.
This prevents the user from interacting directly with the context
making use of the library safer and more readable.
The config structure helps make code readable by using "named args"
in a const struct instead of a long, nameless, parameter list passed
to the modem_iface_uart_init function.
The new API function modem_iface_uart_rx_wait is added to prevent the
user from having to interact with the rx sem in the context directly.
The context can now be safely interated with without direct access to
any of its members.
Pointers to the ring buffer params in the context have been moved to
config struct, as these are only useful during initialization of the
context.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Arm fvp_baser_aemv8r and fvp_base_revc_2xaemv8a boards are using
SMSC91C111 as their ethernet adapters.
Portions of the codes are based on FreeBSD code from its
'src/sys/dev/smc/if_smc.c' and 'src/sys/dev/smc/if_smcreg.h'.
This driver has two parts, one is the ethernet controller driver, which
is MAC layer driver. The other is the MDIO driver, which is the PHY
layer driver. Both of them are in the same source file due to that they
need to share the same reading and writing register functions and
the smsc object.
The mdio driver is needed by the existing 'phy_mii' driver, which is
a driver for the generic MII-compliant PHY.
This driver was developed under the fvp_base_revc_2xaemv8a target and
has been tested on the fvp_baser_aemv8r target.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
move DT_DRV_COMPAT to bmm150.h. so that can be decide which interface
to use.
define struct bmm150_bus_io interface for bmm150_i2c.c and bmm150_spi.c
in bmm150.h.
redefined bus operation interface in bmm150.c, this allow the driver
to decide which interface to use during construction.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
Convert the SDL driver to use the input subsystem. This is specifically
meant to emulate touchscreen drivers, so it's setup to send triplet of
x, y, touch for touch-on events and just touch off on touch off events.
Renamed the driver to input-sdl-touch since now we can also develop an
sdl driver for simulating key events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fixes the wsen_tids sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the wsen_itds sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the wsen_hids sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the vcnl4040 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the tmp108 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the tmp007 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sx9500 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the stts751 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sm351lt sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sht3xd sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the qdec_nrfx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the pcnt_esp32 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mpu9250 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mpu6050 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mcux_acmp sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mcp9808 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit adds support for ANY_MOTION and DATA_READY interrupts for
the BMI270. To implement this, a different config blob than the
"max_fifo" blob has to be used.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
This adds the i2c driver for the Renesas SmartBond(tm) MCU family.
It supports blocking transfers and callback transfers.
Currently only supports controller mode.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Use recently introduced GENMASK64() macro. Although it does not make
difference for the target platform, it makes code clearer.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is currently the only end-point where multiple threads can access
the NVMe device (all calls are synchronous).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Pre-allocating PRP list for such purpose. Which PRP list is relevantly
filled in depending on the data size and data pointer page alignment.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
Namespace in this context, will be a disk. It's not exposed from DTS, as
an actualy NVMe hardware controller card can bring more than one
namespace (disk).
Thus namespace are not instanciated through the device driver model, but
statically allocated and runtime configured, depending on what the
controller exposes.
By default the amount of namespace supported is one as it is the most
common setup.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
This is the corner stone of the whole NVMe logic: sending commands and
getting replies, all through memory shared from the host to the
controller.
Then using it to inialize admit/IO queues and identifying the
controller.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
Since Zephyr does not propose any advanced interfaces as FreeBSD (bus
abstractions, memory and DMA abstraction and many more), this comes with
a much simplified and Zephyr-ish way to instanciate, initialize and use
NVMe controller.
ToDo: IO Queues cannot be more than 1. Macros will need to be improved to
manage the case of 2+ IO queues.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no event reporting WiFi disconnect, create a polling
work for this and report the event.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
It has been observed that sockets can be in bad state after
boot. Be sure to correctly reset local port and any 'server'
mode before configuring client mode.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
- We should wait indefinitely if msecs is -1 (FOREVER).
- We can directly return if data is already available in FIFO.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
There is no listen or accept for UDP, we need to enable the UDP
server mode (P5=1) as soon as bind is complete.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The implementation of GIC v3 ITS uses k_aligned_malloc(), which will
only work if dynamic memory is available (system heap). Tell the user
that a dynamic memory pool is required.
The amount of memory will depend on registers probed during runtime.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
CFG register uses fields that are not defined in Synopsys databook of
Designware AHB DMA Controller.
Since current Zephyr code uses this driver only for the
intel_adsp_gpdma driver I assume that those fields are specific to
this DMA which is not the standard Designware one.
This patch allows to use either the standard Designware register or
the Intel one.
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
There is no need to use *_cmp_raw() functions here, all they do is cast the
pointers to in(6)_addr* and call the non-raw functions. Additionally, this
fixes a warning for the net_ipv6_addr_cmp_raw() call, which didn't cast the
arguments correctly.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Syntacore RISC-V platforms have dedicated MTIMER_DIVIDER register which
should be configured during the Timer initialization.
The configuration of dedicated MTIMER_DIVIDER register could now
be performed during initialization if its address is provided.
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
This change adds a mutex to protect against simultaneous access to the bus
instead of returning an error during transfers. Since most I2C code doesn't
handle retries (especially with a -EIO code) not blocking on a mutex can
cause a number of problems.
Signed-off-by: Corey Wharton <xodus7@cwharton.com>
move DT_DRV_COMPAT to bmp388.h. so that can be decide which
interface to use.
define struct bmp388_bus_io interface bmp388_i2c.c and bmp388_spi.c.
redefined bus operation interface in bmp388.c, this allow the driver
to decide which interface to use during construction
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
This adds support for the -02 variant, as well as the existing -30.
The sensor type is automatically read from configuration register at
device init, an appropriate compensation func is set up
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
This adds a driver for the DS2482-800 1-wire multi channel bus driver.
The driver uses a split architecture in order to share a common lock
among all configured channels of a single IC.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
ds248x no longer applies to all drivers. Therefore the naming indicates
compatibility with DS2482 and DS2484 drivers.
Also
- Fix some code formatting
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
With the stm32h5x, hal driver is xspi for octospi
Add a header file to map functions and constants.
The ospi driver of the stm32H5x serie does not support DMA yet.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Move the GPIO mux setting to the soc layer. The GPIO MUX
value may vary based on the SoC Family
2. Enable the digital input buffer if available
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Implement the driver method pin_interrupt_enable and pin_interrupt_disable.
This commit fixes getting the get_pending_int by updating the interrupts
field in the gpio_emul_data filed when interrupt is triggered. Also,
introduces a new filed enabled_interrupts to better simulate the
behavior of the interrupt pending and whether the interrupt is
enabled/disabled.
Signed-off-by: Sung-Chi Li <lschyi@google.com>
Add pin_interrupt_enable and pin_interrupt_disable in gpio_driver_api,
and add corresponding APIs in gpio.h for application to enable/disable
an interrupt without reconfiguring again.
This CL also Create a new Kconfig option for this feature.
Signed-off-by: Sung-Chi Li <lschyi@google.com>
Use the LTDC in combination with the DSI HOST makes the pinctrl obsolete.
DSI HOST has dedicated pins.
Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
Ignore the link clock_source for non-ACE platforms instead of throwing
an error when it is set in the topology.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
We need to ensure that the XEC GIRQs are initialized after the
XEC ECIA device. Right now we depend on the linker ordering
things correctly since everything is at INTC_INIT_PRIORITY
priority
Set the XEC GIRQs to 41 so the init priority is one more than
INTC_INIT_PRIORITY that is used by xec-ecia.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Added support for async APIs for ns16550. This will be
enabled by kconfig CONFIG_UART_ASYNC_API.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
There have an extral TBE interrupt event though we have cleared the
SPI_CTL1_TBEIE bit. To cover this situation, add a on_going check
before enter exchange function.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Add the stm32h5 serie to the stm32 RTC counter driver
EXTI Line is 17 (for stm32h50x or non-secure stm32h56x/h57x).
The drivers must Enable access to the BackUp Domain.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This case takes a float value and passes it to the integer abs function,
storing the result in an integer type variable. That looks like a possible
error to clang, so insert an explicit cast to int to make the compiler
happy.
Signed-off-by: Keith Packard <keithp@keithp.com>
With this patch DMIC device after init will be in OFF state. When power
domain will be powered-up device will switch into suspended state and
change it to active only when is used.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Since the device need to be first powered-up by the power domain, it has
more sense that device is in off state at the beginning.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The emulated RTC device driver is used to emulate a real
RTC device. Note that it is not a replacement for the
native_rtc module, which is used to control simulated time,
get time from the host system, etc.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This test suite adds tests for the following:
- Setting and getting time
- Validating time is incrementing correctly
- Validating behavior of alarms with callback disabled
- Validating behavior of alarms with callback enabled
- Validating update callback
The test suite uses the devicetree alias rtc to find
the device to test.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit adds the rtc.h header file which contains
API functions for real-time-clocks, which are low power
devices which track and represent broken-down time.
It also changes one line of doxygen documentation in the
maxim_ds3132.h file to place it in its own group.
The handlers for use of the API from userspace is also
added with this commit.
The API is split into one mandatory section, setting and
getting time, and three optional sections, alarms, update
event callback, and clock calibration.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
- Fixes missing poll out events when UART interrupt is enabled
- Fixes blocking USB interface during board start up.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Move CONFIG_PECI_INTERRUPT_DRIVEN inside the CONFIG_PECI if statement to
avoid showing it in menuconfig when PECI drivers are disabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
This effectively reverts the following three commits:
- 0f9f18843f
- 6812441099
- 326f7bd450
and also the changes that got copied to the nrf5340_audio_dk_nrf5340
board.
The workaround brings more harm than good. It already required many
tweaks in various tests to make them pass (because it introduced
a significant overhead in processing of the console UART interrupt)
and now it makes the I2S driver tests to fail. It's not reasonable
to add more tweaks in Zephyr tests just to keep this workaround in
the tree. Instead the root cause should be fixed (if the original
problem still occurs).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add optional filter value properties. The filter is disabled by default
but can be enabled by setting the filter-sample-period > 0 in the dts
file. A latency is introduced if the filter is enabled. The latency can
be printed by setting sensor log level to debug.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix inconsistency between compile-time and runtime check on
counts_per_revolution. Add macro to simplify compile-time prop value
checks.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Convert the ft5336 to the input subsystem, fix all the config in the
repository and add the Kscan compatibility driver to the current dts
driver instances.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit implements the temperature sensor interface for
the Maxim MAX31865 SPI Temperature Sensor.
Signed-off-by: Fin Maaß <fin.maass@haw-hamburg.de>
Co-authored-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add the term 'SBS' in atRate properties and Battery mode property name,
as they are specific to SBS
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Setting the same callback with the same data as is already configured
should not cause an error.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Implements the SPI RTIO API. Refactors many of the internal transfer
functions to work on simple types to allow for both the RTIO and existing
SPI API functions to co-exist.
Removes the unneeded shift_master specialization. Either a polling or DMA
transfer flow is used when used with RTIO as all operations are normalized.
When SPI_RTIO is enabled the spi_transceive blocking call translates
the request into an RTIO transaction placed in the queue of transactions
the device is meant to do.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Provides a macro and submit API for SPI drivers to support RTIO.
A copy function enables compatibility with the existing blocking API
and very easily the existing async API as well.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add the support of the new stm32h5 to the stm32 ADC driver
Note : LL_ADC_CLOCK_ASYNC_DIV6 is the value for getting the
expected results of ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit fixes the word size configuration issue
described in #54746 by considering the data frame size
when trasmitting in case the configuration is applied.
It also fixes an heap corruption problem when using
SPI DMA with a buffer that is not multiple of 32 bits
in lenght and GDMA instance in initialization.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
When a controller is running at full SDR speed at 12.5MHz, there needs
to be enough time for the processor get around to writing more data in
the fifo. Previously at -1 the size, this was enough for 1MHz with a
decent processor, but not enough at a 12.5MHz SCL.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add a second instance of DMA to the stm32 dma driver from the DTS
That can be found in the stm32H5 serie, where 2 GPDMA with 8 channels
are available. Rebuilding with Macro.
Use the dma_channels property of the dedive tree to count the nb
of dma channels: 16 or 8 (like in stm32h5).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Adds tmd2620 driver and devicetree bindings to work in
trigger and polling mode supporting Power management.
Signed-off-by: Peter Fecher <p.fecher@phytec.de>
Similar to the changes made in #48048, compile in the appropriate lora
modem driver when `CONFIG_LORA=y`. The `LORA_SX12XX` symbol has no
use now so remove. LoRa and LoRaWAN subsystems are still marked as
unstable so no additional deprecation cycle is needed.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add LEDC device for esp32s3
Update PWM LED binding
Remove invalid comment from driver source file
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add support for device runtime power management. When suspended sampling
is suspended. When active sampling resumes at the configured rate.
When suspended fetch/get will return an errno and 0'ed out samples.
By default the device will start in a suspended state when
PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In the intel_adsp_wdt_isr function was an unused dev_config variable.
The variable was removed. This was caught by the sof CI.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
If for any reason the timer counter didn't hold a value close enough to
zero on boot then the cycle delta could overflow and the reported ticks
won't be right. Those who really want the hardware uptime where this
makes sense (as opposed to Zephyr's uptime) can still rely on
sys_clock_cycle_get_64().
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Enabled simultaneous support by adding a DTS variable named “io-mapped”.
There are 3 possibilities through instance in dtsi file.
Under PCIe, PCIe ns16550.
Under soc and has a variable io-mapped, legacy(IO mapped).
Under soc and don’t have a variable io-mapped, MMIO mapped.
Simultaneous access can be enabled by a Kconfig.
For PCIe instances UART initialization should be done post-kernel as it
depends on PCIe initialization.
Co-authored-by: Najumon BA <najumon.ba@intel.com>
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Move smbus_utils.h header from generic includes to the driver's area
in order to have in include/zephyr/drivers only smbus.h header.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
GPT timer driver previously used "restart mode", where the timer would
count to a given value, then rollover. In this mode, "Any write access
to the Compare register of Channel 1 will reset the GPT counter". Since
a write to the compare register takes affect after 1 cycle of the
module's bus clock, and the bus clock is not synchonized with the GPT
module's low frequency counter clock, writing to the compare register
will induce a counter reset, and can cause the GPT to lose time
synchronization. This can induce time drift over time.
To fix this, rework the GPT driver to use "free run" mode. Note that
free run mode is not used directly, rather the GPT is configured to
reset on a tick boundary at boot, and then the second compare register
is used to set capture points. This way, the GPT interrupt will always
fire at a tick boundary, and no calculations are needed to handle
the counter rollover.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Changing function call order. We need to first power-up the power domain
before we turn on the devices.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
It was being included twice. Now it's included once. CI requires a commit
description.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Without this, setting a value of 0 leaves the bits unchanged rather than
zeroing them.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Added a new watchdog driver which can handle a multiple wdt_dw instances
and can control the pause signal.
The mlt platform has three designware watchdogs, one for each core.
I decided to create a separate intel watchdog driver for the following
reasons:
1. All three devices share the same interrupt number. Each watchdog reports
an interrupt to the core to which it has been assigned. The same interrupt
number cannot be used by multiple devices in the device tree. So, it would
be assigned to only one device. The other dw watchdog devices would use
this assignment, even though it would not be described for them in the dt.
The interrupt handler function in dw watchdog checks the interrupt flag.
If the interrupt was connected to the first watchdog, and the second or
third watchdog signal an interrupt, the interrupt handler of the first
device would ignore it because it would not have set the interrupt flag.
The watchdog device don't knows anything about the existence of the others
devices.
2. The designware watchdog only supports a hardware pause signal. It cannot
be paused programmatically. On the mtl platform, there is a separate group
of control registers for all per-core watchdogs. There are GPIO-like
registers that allows control of a hardware pause signal for subordinate
watchdogs. This separate block is shared by all three watchdogs.
3. The base addresses of the subordinate watchdogs are read from the
aforementioned control registers. As a result, in the device tree we have
only one base address for the intel watchdog, which points to the pause
control registers and containing the base addresses of the subordinate
devices.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The cadence i3c ip requires it's retaining registers to be updated
when a device is detached or attached.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
There are some needs to attach and reattach i3c/i2c devices at runtime
Some I2C devices can have special registers where the address can be
changed at runtime. Also some I3C devices can be powered off at runtime
freeing up the address space they take up. These new APIs allow for these
to be changed at runtime. This also moves some config/data in to a common
i3c config/data structure which would allow the api to operate on to be
common for all I3C drivers.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This adds the reattach api necessary for writing the i3c retaining
registers within the cdns i3c when the dynamic address changes.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Some I3C controllers have retaining registers which are used to contain
the DA of the i3c device. This needs to be updated every time the DA is
updated with SETNEWDA or SETDASA
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Reading the UID_BASE_ADDRESS requires disabling the icache
of the stm32h5x mcu.
Else a bus fault error occurs reading Address: 0x8fff800-0x8fff808
Enable afterwards.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add a driver that listens for input events and reports them on a kscan
API. This allows porting kscan drivers to the input APIs while
maintaining compatibility with the existing kscan based applications.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This macro just uses an existing cache API and is not widely being used.
Use the API directly which will be changed to use a public cache API in
a later commit.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Replace pointer construction macro with value from config struct.
Fixes what appears to be an oversight from #55522.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
When releasing a paused stream, clearing MIC_MUTE bit is necessary.
Without unmuting there will be no input data after resume.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Clearing SOFT_RESET bit applies to ACE as well. In case of ACE,
this should be done before setting start bits for CIC and FIR.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Introduce flash extended operations that can be used to disable access
to option and control registers until reset. Disabling access to these
registers improves system security, because flash content (or protection
settings) can't be changed even when exploit was found.
On STM32 devices, registers can be locked until reset by writing wrong
key during unlock procedure. It triggers a bus fault, so during the
procedure we need to ignore faults and clear bus fault pending bit.
Please note that option register disabling was implemented for devices
that have OPTCR register (F2, F4, F7 and H7). Implementation on other
devices requires more testing, since documentation is not precise
enough. Disabling control register was implemented for devices that
have CR register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch makes possible to choose custom byte which should be used
to enable non-permanent readout protection (RDP1). Actually, any byte
except 0xAA and 0xCC (which are used by RDP0 and RDP2 respectively)
can be used to enable RDP1 but in multi-image environment, some other
image could check if RDP1 is enabled by comparing it to some hardcoded
value.
If property is not defined, 0x55 will be used to enable RDP1. The
default value comes from STM32 HAL.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds flash readout protection support for STM32F4 devices
family. These devices can enable protection on entire flash content.
Readout protection functionality was exposed as vendor extended
operation. To change readout protection state, caller should provide a
structure which describes desired RDP state.
Enabling readout protection permanently or disabling readout protection
(changing from level 1 to level 0) is guarded by
CONFIG_FLASH_STM32_READOUT_PROTECTION_PERMANENT_ALLOW and
CONFIG_FLASH_STM32_READOUT_PROTECTION_DISABLE_ALLOW respectively.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds sector write protection support for STM32F4 devices
family. These devices can protect flash content with sector precision.
Write protection functionality was exposed as vendor extended operation.
To change write protection state, caller should provide mask of enabled
and disabled sectors.
Function responsible for locking/unlocking option bytes was implemented
for all STM32 devices supported by this driver.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Introduce the stm32h5 serie to the the existing flash driver
It is based on the stm32l5 model.
Add a function to check if the flash is in dual
or single bank mode.
Some stm32 devices can map 2 or 1 flash banks.
Adapt the FLASH register names for the stm32h5 mcu.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the driver for the clock control of the new stm32h5.
See the corresponding Ref Man to get the clock scheme :
HSI, CSI, HSI48, HSE, LSE, and 2 or 3 PLLs
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
- That MIN_DELAY is a magic arbitrary number that is never going to be
right for all cases. Get rid of it in favor of a smarter solution.
- `sys_clock_set_timeout()` should not base its next match value on the
current time. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- Clamp the next timeout to HPET_MAX_TICKS/2. This leaves room for the
added elapsed time and any possible IRQ servicing delay.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Fix port array definition in kinetis pinctrl driver
so that it handles more flexibly the cases where the
number of PORT peripherals is more than 3, rather than only
handling the case where there are 5.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
After enabling the ADC, the peripheral has a certain delay (about 1ms)
to set its ADC Ready flag in the ADC ISR register.
In between, the ADRDY is still 0 and the ADEN is 1 in the CR.
The ADC can be used for conversion, only when the ADRDY bit is set
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add missing guard which prevents use of nrf_rtc_timer on
the same RTC instance (RTC1) as counter driver instance.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add binding and sensor attribute to allow single phase
mode where only one signal is required from the encoder.
The signal must be connected to Phase A input.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add config and data structs to the vnd,gpio test driver as these are
required by the GPIO API.
Fixes: #55884
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add documentation for the update_sampling_pnt() function and rename a few
internal variables to improve readability.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Respect the range limits of phase_seg1 when attempting to distribute ts1
between prop_seg and phase_seg1.
Even distribution may not be possible if the allowed ranges of prop_seg and
phase_seg1 are not equal.
Fixes: #55919
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Microchip XEC ADC and ADC V2 driver were merged into one
That PR did not change the ADC API test and ADC shell resulting
in twister build failures. Fixed both ADC API test and ADC shell.
Signed-off-by: scott worley <scott.worley@microchip.com>
Devicetree local-mac-address and zephyr,random-mac-address support added.
Updated w5500_set_config() to support ETHERNET_CONFIG_TYPE_MAC_ADDRESS
and change the MAC address at runtime.
Signed-off-by: Rainer Paat <rapaat@gmail.com>
The number of available EasyDMA MAXCNT bits is now defined per-instance
in Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
temporary_table is a trivial copy of virtual_memory_regions, it isn't
clear why it's needed. All the more that it's freely mixed with
virtual_memory_regions itself. Also change a variable name to avoid
confusion and improve indentation.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
update espi_vwire_signal enum to refer all platform specific
usage virtual wires to ESPI_VWIRE_SIGNAL_SLV_GPIO_x
Virtual wires used for USB-C port over current (OCB)
have been defined as macros mapped to the corresponding
espi_vwire_signal enum
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Change device tree VW routing to a form allowing overrides.
Add two new DT optional properties for specifying the reset
source and reset value of each virtual wire. Only virtual
wires that are enabled using the status property are modified.
NOTE: eSPI virtual wires are controlled in groups of 4 by
hardware. The optional reset signal source properties applies
to all four virtual wires in the group. If this field is
changed from the hardware default, it should be changed for
only one virtual wire in the group. If the property exists
in more than one wire in the group it must be set to the
same value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Modify Mircrochip MEC172x eSPI driver to get eSPI virtual wire
hardware routing from device tree.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The clock control driver requires three pieces of information:
PCR register index, bit position, and clock domain. Clock domain
was missing from DT information and MCHP macros.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Deleted adc_mchp_xec.c and microchip,xec-adc.yaml file.
DTSI, yaml, CMakeLists.txt and Kconfig.xec files are
updated for compatible.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Updated the "adc_mchp_xec_v2.c" adc driver to support both MEC172x and
MEC15xx SOC.
ADC smapling clock configuration updated using DTS.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Fixes the lsm9ds0_gyro sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lsm6dso sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lsm6dsl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lps22hh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis3mdl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2mdl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2dw12 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2ds12 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2dh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ite_vcmp_it8xxx2 sensor driver to store the user-supplied
sensor trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ism330dhcx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the isl29035 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ina23x sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis3dhhc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Since we have a dedicated function for UDC_EVT_EP_REQUEST type
events, we can now simplify udc_submit_event() and remove
buf parameter.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This allows us to get the result of synchronous transfer without
any hacks, just from the net_buf structure.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not use UDC_EVT_EP_REQUEST event without a valid pointer
to a request buffer. No changes needed in the upper layer because
it requires valid buffer pointer for this type of event anyway.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add helper function to send UDC endpoint event to a higher level
that takes fewer arguments.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rewrite MCUX LPADC driver, to better utilize hardware.
the following changes have been applied:
- channel numbers now correspond to hardware channel command slots,
use "input_positive" and "input_negative" fields along with channel
definitions in dt-bindings/adc/mcux-lpadc.h to select a channel
- the number of channel command slots available is configurable via
CONFIG_LPADC_CHANNEL_COUNT
- Side A and side B channels are now supported
- differential channel mode is now supported
- ADC channels now are sampled via hardware, without additional
software triggering
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check the requested CAN timing parameters against the min/max values
supported by the driver and return an error if they are out of range.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
`Kconfig.xec` for the ESPI drivers requires
DT_HAS_MICROCHIP_XEC_ESPI_SAF_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_SAF_V2_ENABLED for ESPI_XEC and ESPI_XEC_V2,
respectively, but SAF is not mandatory for using ESPI. This is a bug and
should be dependent on DT_HAS_MICROCHIP_XEC_ESPI_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_ENABLED, respectively. Also make these default
to `y` so they can be automatically enabled by the device tree.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The regulator driver has a configured min/max range that is used
to limit set values, and to initialise the regulator.
A new init value has been added, so that the startup voltage can
be higher than the lowest permitted value.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Added initial version of Infineon cyw43xxx BT (
H4 HCI extension drivers/bluetooth/hci/CMakeLists.txt)
Add initial version of binding file for Infineon CYW43xx BT
HCI extension driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
The callbacks API was similar to gpio / espi callbacks API. Refactor
it to use more intuitive names for set / remove callbacks.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add SMBus shell module for testing. This allows arbitrary boards with
SMBus driver supported exploring the SMBus communication with
peripheral devices.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This adds a basic Intel TCO watchdog driver. The driver doesn't support
windowed timeouts (a non-zero window.min value) or callbacks. The driver
currently assumes TCO version 6, which can be found e.g. on Elkhart Lake
and Raptor Lake platforms. The driver also expects the TCOBA base
address to be specified through DTS, rather than doing runtime lookup
(using e.g. ACPI or PCIe).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Remedial rework to handle the enabling of the I2S master clock
output based on the presence of an introduced DT property.
For details see issue/54841.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
STM32 ADC DMA support added in #52965 incorrectly assumed
that all ADC devices have a OVR flag. This commit changes
the driver to only account for it if it's found in the
LL drivers.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This update devicetree entries and Kconfig definition to allow use of
reset cause on all SAM series.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add initial version of clock control for Atmel SAM SoC series. This add
support to Power Management which allows control peripherals clock.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Because the DMA driver allows multiple start and stop calls for the same
instance and the same channel, we cannot rely on the error codes
returned by these functions to notify the device's power manager that a
device is still in use.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Moved PCIe probe from configure function to init function
because whenever uart_configure api is called MMIO address
is getting updated.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Added pclk parameter to set_baud_rate function in line_ctrl_set api
which was missed during update of set_baud_rate function definition
update.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Failures are seen with SOF digital mic capture test cases on Intel cAVS2.5
platforms if the SAR/DAR/CTL writes are skipped.
This reverts commit 08d9efb202.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Move the SoC Flash nRF sync ticker implementation into
Bluetooth Controller Subsystem folder, as internal headers
are included.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
remove all #ifdef CONFIG_SOC_SERIES_STM32xx
before to add a st,stm32g0-exti compatible
added to the matching targets:
C0/G0/U5/L5/MP1:
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Add support for the TI TPS382x series. The IC has an input pin which
should be toggled by the processor and a output pin which should be
connected to the RESET input of the processor. The timeout is not
configurable.
This device can be used by devices which does not have any internal
hardware watchdog device.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix IDU mask setup:
* fix GENMASK usage to avoid generating mask to one extra cpu (which
doesn't exist in configuration)
* use arch_num_cpus() instead of CONFIG_MP_NUM_CPUS to allow having
some cpu's disabled (with detection in runtime)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
In general, RTC and TIMER driver implements counter API but there
are exception when those peripherals are used in a custom way
(e.g. for system timer or bluetooth). In that case, system must
prevent using counter based on a reserved instance. Previously,
it was managed by Kconfig options but that cannot be maintained
when switching to devicetree configuration of the counter driver.
A new approach removes Kconfig options and instead adds static
asserts in the files which are using direct peripherals. Those
asserts check if given node is not enabled in the device tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Modifying counter drivers (rtc and timer) to rely completely on
device tree and not on Kconfig of MDK flags.
Adapting dtsi for all SoCs and adapting test configuration.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add PM_DEVICE_RUNTIME support to nordic QSPI NOR flash driver, putting
the QSPI peripheral and flash ship into DPD if available
Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
Adds a driver for the Nordic nRF GPREGRET registers and adds
entries to the SoCs for this peripheral.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds a new driver interface for retained memory devices which
can be used to store data and have it retained whilst the device is
powered thorugh different application execution states (though this
data may be lost in low power states).
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
The U5-series was missed when adding if-defs around enable / disable
of the backup domain access, this patch makes sure the U5-series
is handled correctly.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move esp_wifi_internal_reg_rxcb() after esp_wifi_init(), so that
wifi_connect() is successful.
Fixes: 690f65dbd9 ("drivers: wifi: esp32: fix possible interface null
pointer")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
clean up redundant static functions
convert `csl_rx_time` to uint32_t and remove redundant `nrf5_schedule_rx`
`nrf5_config_csl_period` and `nrf5_receive_at` static functions.
`csl_rx_time` has been passed as uint32. It is compared to uint64 value
returned by `nrf_802154_sl_timer_current_time_get` in
`nrf_802154_ie_writer.c` which leads to wrong calculation of phase in CSL.
Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
An interrupt is triggered for every edge, but only the desired edges cause
a callback to be called.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Should be the Output LATch register. "IK" is one key away from "OL" on
QWERTY keyboards.
This define wasn't actually used anywhere.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The xlnx_uartlite_fifo_read function would spin indefinitely if there
was less data available in the RX FIFO than the size of the passed-in
buffer. This call is supposed to be non-blocking.
Fixed to break out of the loop if there are no more bytes left in the RX
FIFO.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The STM32C0-series does not have a backup domain, this patch
enables us to extend this driver to the C0-series.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Adds dummy link layer for offloaded ifaces, allowing
ifaces to directly receive l2_enable calls
Signed-off-by: Georges Oates_Larsen <georges.larsen@nordicsemi.no>
Fixes the iis2mdc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2iclx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2dlpc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2dh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the icm42605 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the hts221 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the hmc5883l sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the grow_r502a sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fxos8700 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fxas21002 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fdc2x1x sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ccs811 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bq274xx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmp388 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmi160 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmg160 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmc150_magn sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bma280 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the amg88xx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adxl372 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adxl362 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adt7420 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
We get a compiler warning in this code with arm clang due to using
the wrong enum type for the variable. The enum should be of
type `enum periph_clk32k_src` so replace VBR_CLK32K_SRC_PIN_XTAL
with PERIPH_CLK32K_SRC_PIN_XTAL.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
BMI270 supports bulk register reads, use them to make
trasnfers faster.
See the discussion on
6cbb84c3ee (r104543405)
Tested on an nrf52840 board connected to a bmi270 sensor via SPI.
Signed-off-by: Oleg Ryjkov <oryjkov@gmail.com>
Add support for virtual UART device that uses ARC Hostlink channels
for data transfers. Due to the Hostlink principle, this driver
supports only polling API.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
We get compile warnings of the form:
drivers/console/uart_console.c:508:8: error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint returns an int, change check to an explicit test against
the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
After disabling the channel, it is recommended to poll with timeout to
ensure that the channel has actually been disabled. Without this,
reconfiguring the DMA again while the channel is active could lead to
unexpected behavior and/or DMA underruns.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The WAIT_FOR() function returns the value of checked expression. So fix
the return value check to log and return the timeout error when checking
if the FIFO is empty during stop.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add a helper function to dump the GPDMA SHIM and channel registers for
debug along with a config option to enable it.
Co-developed-by: Tom Burdick <thomas.burdick@intel.com>
Singed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This symbol allows users of the driver to disable the
power management feature of just this sensor if they are
not using the int_gpios pin of the BQ274XX.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
In the current implementation, the apds9960 trigger callback function
is called with the pointer of a driver-internal allocated trigger
structure. This structure is not initialized anywhere, so essentially
the trigger callback gets called with junk data.
Besides the missing initialization, it would be better instead to hold
a const pointer to a user allocated sensor_trigger object.
This way user code can establish a context with related user data (for
example a pointer to a C++ object) by storing its sensor_trigger object
within a structure alongside the user data, and then using
CONTAINER_OF() macro to get the pointer of the container struct (and
thus the user data).
Signed-off-by: Michael Kaplan <m.kaplan@evva.com>
Add the loop to wait until the stream is really disable after disabling
and also cleared the TCIF flag.
This is a specifity of the dma of type V1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A MACRO argument naming mismatch causes a bug when trying to use DMA.
Fix the MACRO argument and conditional DMA configuration.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add clock control support for UART controllers found in i.MX SoC family.
This change moves clock gating out of respective `soc.c` files and into
clock controller's `clock_control_on`/`_off` methods, allowing for
dynamic clock state control, and setup via Device Tree bindings.
This is especially important on SoCs, where Zephyr is sharing the bus
with cores running other OSes, such as might be the case for i.MX 8MM.
Unfortunately, Zephyr doesn't possess an ability to represent clock
hierarchy (e.g. via DT's `assigned-clocks` property), so clock source
and frequency still need to be hardcoded in aforementioned `soc.c`
files.
Signed-off-by: Artur Rojek <artur@conclusive.pl>
Use `uintptr_t` to cast a pointer to integer type for `clock_name`.
While at it, also remove an unused variable.
Signed-off-by: Artur Rojek <artur@conclusive.pl>
Add support for setting the Synchronization Jump Width (SJW) for both the
classic/arbitration phase and the CAN-FD data phase.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Uninitialized sam spinlocks were causing an error if the stack
happens to have 'thread_cpu' memory set to something other than 0.
Signed-off-by: Yuval Peress <peress@google.com>
Port the gpio_keys_zephyr driver from the gpio subsystem with a
dedicated API to the input subsystem reporting input events.
Move the test as well, simplify the cases a bit since the API is simpler
now.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The 200ns reset time specified in the datasheet are a minimum time; and the
nanoseconds were being rounded to whole microseconds anyway.
Also make it the same type as `config_delay_us` (`uint16_t`).
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The 200ns reset time are a minimum value, there is no need to enforce
precise timing (and thus manual per-device calibration) here.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
From FPGA-TN-02001-3.3 "iCE40 Programming and Configuration":
> After driving CRESET_B High or allowing it to float High, the AP must
> wait a minimum of 1200 µs, allowing the iCE40 FPGA to clear its internal
> configuration memory.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Besides of standard flash operations like write or erase, flash
controllers also support additional features like write protection or
readout protection. These features are not available in every flash
controller, what's more controllers can implement it in a different way.
It doesn't make sense to add a separate flash API function for every
flash controller feature, because it could be unique (supported on small
number of flash controllers) or the API won't be able to represent the
same feature on every flash controller.
Extended operation interface provides flexible way for supporting flash
controller features. Code space is divided equally into Zephyr codes
(MSb == 0) and vendor codes (MSb == 1). This way we can easily add
extended operations to the drivers without cluttering the API or
problems with API incompatibility. Extended operation can be promoted
from vendor codes to Zephyr codes if the feature is available in most
flash controllers and can be represented in the same way.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The current implementation always sets the voltage before enabling,
even if the current voltage is in the allowed range.
This has some side effects, i.e. for PMIC regulators that are
pre-programmed for a specific value but allow voltage changes during
runtime. The side effect being that the regulator will always be reset
to the lower value of the voltage range at init.
Another usecase would be when a bootloader sets a specific voltage then
loads an application that uses the same driver.
The proposed fix is to evaluate the current voltage and try to bring
the actual voltage in range if the current voltage is not valid
according to the min/max constraints.
Tested on custom SAMD20 board with a custom RK816 PMIC driver.
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
Currently the driver only support software controlled CS
defined by cs-gpios property.
This commit enables the possibility of using dedicated CS
by setting the pins on pinctrl and omitting the cs-gpios
property.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.
Remove hardcoded values from hal calls to use dma_host instead.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This is a fix for a driver bug that assumes a
user will want a new pwm channel for a new
pwm signal if they decide to change the
period length of the pwm. In some cases,
this creates a noticable change of
duty cycle accuracy.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
i2c_bitbang_init takes a context as void *, so discarding const
qualifier of the driver's config. Explicitely cast to void * to fix the
problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently the 2.4G radio driver for CC1352 has few implementations which
prevents both the radios to be used in a single build, thus preventing
applications to have different builds to switch the RF bands even though
the hardware supports dual bands simultaneously.
The following updates are made:
* Remove RF patches from stack.
* Implement if_stop() to stop the interface and yield the interface.
* Use RF_runCmd() instead of RF_runImmediateCmd() so that two RF handles
can work simultaneously.
All the updates are similar to the more recent cc13xx subg driver which
implements all these recommended practices already.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
During extended testing, rx_done() callback was seen to be invoked with
zero-length packets.When RAW_MODE is enabled, CRC is being appended to
these packets thus making downstream consumers think the packet is valid.
Root cause of the callback being invoked with zero-length packet is
unknown, but appending CRC to these packets is incorrect, thus fix it.
Also fix a minor error which causes build failure when
CONFIG_NET_L2_IEEE802154_SUB_GHZ is not defined.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
This PR fixes MCP7940N initialization failure on Sunday if
external battery is used to keep the RTC running over the
MCU or Zephyr OS restarts.
Signed-off-by: Rainer Paat <rapaat@gmail.com>
System uptime is not getting incremented when TICKLESS_KERNEL is enabled.
This fixes it by changing the clock_annouce and updating
last_count increment accordingly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Removed struct variables for storing states: sx, plt_rst, espi_rst.
While Sx & espi_rst state variables were totally redundant, plt_rst
variable had a use-case to prevent sending multiple callbacks to app.
Experimentally proven that use-case was not valid, as plt_rst isr
itself gets called only upon rising/falling edge.
Removing the condition to check plt_rst's current and previous state,
also solves the problem where global reset do not update plt_rst state.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
The Dead Battery resistors interfere with port partner
detection. So, Dead Battery is disabled after the system
starts and sets the Rd or Rp resistors on the CC lines.
Tested on b_g474e_dpow1 with JP5 set to USBC.
Tested on stm32g081b_eval with JP17 set to D5V.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Adding an Openthread radio API `otPlatRadioSetMacFrameCounterIfLarger`
implementation and the corresponding call to the IEEEE802154 driver.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
In the adc_stm32_init() function, when adc_stm32_calib() is called,
the ADC is not yet enabled but still disabled.
This patch makes sure to Disable the ADC before its calibration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The STM32H730 series has a variant built with SMPS. It uses
`stm32h730xxq.h` header file instead of `stm32h730xx.h`, which has the
SMPS macro defined.
This commit adds the `SOC_STM32H730XXQ` configuration option to allow
the build system include the proper header file. With this change,
boards can enable `CONFIG_POWER_SUPPLY_DIRECT_SMPS` to set up the power
supply for the CPU.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Update flexspi driver init priority to be the
memc driver init priority. This fixes a bug where
the flexspi flash drivers on i.MX RT platforms were
being initialized before the flexspi memc driver.
Since those flash drivers depend on the flexspi
spi bus controller being initialized, the flash drivers
would fail to initialize and cause runtime failures.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This change implements the following, necessary for remote wakeup to be
supported:
- implement usb_dc_wakeup_request() call to trigger remote wakeup
- implement interrupts to detect supsended/resumed state
- implement extra logic to simulate resumed state when the resume
is a result of remote wakeup. In this case the rp2040 chip doesn't
send a USB_INTR_DEV_RESUME_FROM_HOST interrupt, or any other
interrupts when the resume condition is detected to be extended
by the upstream port, so we need to simulate this event when we
see activity on the bus.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Add driver for Xptek XPT2046 resistive touch controller on SPI.
Only interrupt driven mode supported, does not do polling.
Signed-off-by: Seppo Takalo <seppo.takalo@iki.fi>
esp32_wifi_dev_init() currently starts Wi-Fi stack before
the interface is properly configured, which happens in function
esp32_wifi_init(). This can trigger a ESP32_WIFI_EVENT_STA_START event
before interface initialization, causing a crash.
Moving esp_wifi_start() to esp32_wifi_init() will guarantee that
this won't happen.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make sure that the interrupt and event routing enable bits have the
reset values in case the Zephyr firmware image is chain-loaded.
When started by MCUboot, these registers values aren't the reset values,
but then Zephyr initializes them in same way. Yet, when the Zephyr
firmware image is chain-loaded by nRF5 bootloader, they may have values
that cause the scheduler to behave in unexpected ways.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Fix support for GT911 touchscreen driver when not using interrupt.
The controller still requires that the INT pin be set to input in
order to correctly respond to I2C queries.
Also, the GT911 requires that the INT pin is not configured until the
RESET pin has been low at least 10 ms after reset, so add an additional
delay during initialization to account for this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add clock rate definitions for MIPI and LCDIF peripherals, to enable
retrival of these peripheral clock rates at runtime.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for NXP DCNANO LCDIF (lcd interface) peripheral,
present on iMX.RT500. Currently this driver only supports updating
the primary framebuffer, and does not implement support for the cursor
buffer present on this IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for MCUX MIPI DSI 2L. This IP block differs slightly from
the existing MCUX MIPI peripheral, and uses a different hardware
abstraction layer. For these reasons, a new driver was introduced rather
than extending the existing mcux_dsi implementation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow configuration of AHB RX buffer allocation. This allows sections
of the AHB RX buffer to be reserved for specific masters, which can
enhance performance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The driver utilizes ST Microelectronics library (which
exists in modules\hal\st\sensor\vl53l1x. Platform specific
headers and source files used by the library are included
and adapted for Zephyr.
The driver can be configured in proj.conf to use a
interrupt/polling methods and the use of the XSHUT pin on
the VL53L1X. All uses were tested successfully.
Signed-off-by: Mark Watson <mwatson@prosaris.ca>
This patch adds watchdog driver for Renesas Smartbond SOCs.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds driver for SmartBond TRNG peripheral that with separate
ISR an thread data pools.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Remove modulus feature and return degrees larger than
count_per_revolution.
This makes it possible to detect if a full rotation has occured.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add support for configuring power on delay when using SPI SDHC. This
allows cards that reliably initialize with a shorter (1ms) delay to
avoid the long initialize delay otherwise imposed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add I2C bus recovery support to the STM32 v1 and v2 driver. The STM32 i2c
peripheral does not natively support I2C bus recovery so recovery is
performed using GPIO bitbanging. This mirrors the bus recovery
implementation for NXP MCUX LPI2C driver.
Fixes: zephyrproject-rtos#54917
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Allow the uart_console console_out implementation to integrate with
'Device Runtime Power Management'.
Without using runtime PM, it is impossible for the application to manage
the power state of a UART instance, given that any module in the
application could theoretically LOG_* or printk at any point in time.
This removes the need to manually call `pm_device_state_set` when the
lowest power states must be reached, while still allowing console and
printk messages to be output.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Couple issues:
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. The hardware performs a signed
comparison. If the delay gets close or even behind current time then
the IRQ will be triggered right away. This is unlikely to happen very
often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
- The timer must be enabled before the count can return a sensible
value during driver init (at least on qemu_cortex_a9).
Discussion in PR #54919 applies here too.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The sbs gauge emulator intercepts SMBus messages for an sbs gauge
compatible IC. However, it was incorrectly interpreting the byte order of
received register write values based on the endianness of the SoC
architecture instead of SMBus' defined little-endianness. This fault was
not caught earlier because native posix and the majority of qemu
architectures use little-endian.
Explicitly interpret the write values as little-endian.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Change message to make allow distinguishing between error while
getting page info for disk configuration and page layout
verification.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Description of the bad behaviour before this change:
The arming of the control EP0_OUT endpoint was not kept under
control. It could happen that the EP0_OUT endpoint was left
armed, after the completion of a complete control transfer.
It is clear that the intention was to NOT keep EP0_OUT constantly
armed while idle, because usb_dc_ep_enable() doesn't arm it,
and the intention was for when usb_dc_ep_read() is called to
collect the Setup-Stage 8-byte data, that is when EP0_OUT is armed,
and before this call is performed, the host will keep getting NAKs
for the Data-Stage of the to_device control transfer.
This happens correctly on the first to_device control transfer with
wLength > 0. However, because usb_dc_ep_read_continue() indiscriminately
re-arms all OUT endpoints, in the case of to_device control transfers
with wLength > 0, on the Data-Stage, the endpoint is also re-armed,
which is wrong, because then the endpoint will be left armed after
the control transfer is over.
In this case when a new to_device control transfer starts, the
Data-Stage will be accepted on the first try. This would still
have worked without a failure if the Setup-Stage would have been
processed immediately, but because we process everything in a work
queue at a later time, when the Setup-Stage associated 8-byte data
buffer is read both the Setup-Stage and Data-Stage have arrived.
At the end of handling the Setup-Stage we try to re-arm the EP0_OUT,
which already contains data, thereby corrupting the received length
portion of the buf_ctl register. (Obviously other fields are changed
too, but the length field is the one that first causes chaos, cause
it's written to the maximum, which is 64.) The above mentioned Data-Stage
already has a message in its workqueue for it to be processed, but
it is picked up only after the length field has been corrupted.
Because of this usb_dc_ep_read() thinks there is more data in the buffer
than there really is, and everything becomes de-synchronized, with
later reads accessing uninitialized parts of the buffer.
This sounds like a fundamental failure, that should make it impossible
to operate USB, however the reason this behaviour doesn't make it
impossible to enumerate the device is that this only affects
to_device control transfers with wLength > 0, and during enumeration
there are not many of those happening.
When enumerating a HID keyboard, there is only _one_ of those
happening, and it is the initial setting of the lock light led status.
And that first one succeeds because it's the first one. (However, later
lock light setting control transfers can cause problems, which is how
this problem was encountered.)
The solution in this commit is to keep better control over when EP0_OUT
is armed. This forces the Data-Stage to arrive later (the host will keep
re-trying), and that way the corruption of the buffer control register
is avoided.
Summary of the changes:
- Rework the logic around deciding wether to re-arm the out endpoint
after a read. For non-0 endpoint the previous behaviour is kept,
however for EP0 it is only re-armed if more OUT transactions are
expected for that SETUP transfer (be it data-stage or status-stage)
- Force un-arm the EP0_OUT endpoint in case a stall condition is observed.
- When a setup transfer is received check if EP0_OUT is already armed.
If armed then log a warning message, and force-disarm it.
- When a setup req interrupt fires, don't immediately force the next
read to get it, instead, it will be read only after a setup message
is extracted from the message queue.
- When a setup packet is received abort any unfinished previous control
transfers:
- cancel any data buffers given to the EP0_IN endpoint
- drop any new ep0_in writes that are attempted before this newest
setup packet's associated message is extracted from the message
queue.
- In the ISR, check buffer interrupts before setup req interrupts.
This is to make sure that the final 0-length status message from the
previous setup packet is consumed before the new setup packet.
(this is the only case now when both interrupts could be seen as
having fired by the time the interrupt handler routine executes.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Co-authored-by: Johann Fischer
The pwm_mchp_xec driver doesn't clear the divisor or clock select fields
of the config register value before writing it back. If the register
was previously written, the new values were being logically OR'd with
the prior values.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Voltage comparator driver submits notifications into system work queue,
this change will make driver to use dedicated work queue, and priority
of dedicated work queue are configurable as well.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.
In preperation to add support for BDMA and DMAMUX2.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Added initial version of Infineon CAT1 GPIO driver.
Added initial version of binding file for Infineon CAT1 GPIO driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 UART driver.
Added initial version of binding file for Infineon CAT1 UART driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add initial version of Infineon CAT1 clock control driver.
- supports clock initialization based on board DT configuration.
Added initial version of system_clocks.dtsi for Infineon PSoC 6 SOC.
Includes: clk_imo, path_mux0..4, fll0, pll0, clk_hf0..4, clk_fast,
clk_slow and clk_peri.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 Pin controller driver.
Added initial version of binding file for Infineon CAT1 Pinctrl driver.
Added initial version of dt header for Infineon CAT1 pinctrl driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f412-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f4-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Polarity support added to XEC PWM driver. This allows (for example) PWM
controlled LEDs that are active low to actually be turned off when set
to off.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Generalize the driver for PCAL6408A into a more abstract base
and reuse this abstraction to implement a driver for
PCAL6416A.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fixed th02_channel_get() code to return -ENOTSUP when the channel is not
supported.
Fixes#55160.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This change produces more quickly in the stream valid
audio samples. The start fade-in ramp can be shortened to
100 ms for 48 kHz and 200 ms for 16 kHz. It was before 200 ms
and 400 ms. The updated DMIC hardware in allows to do this
change.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
The Host Commands can be used with different transport layers e.g. SHI
or eSPI. The code that provides the peripheral API and allows sending
and receiving Host Commands via different transport layers is not
actually drivers of a peripheral, so move it to the
subsys/mgmt/ec_host_cmd folder.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This commit finish to fix the bug describe by 85e2a0679a68f02f7ef.
With the previous correction, the uptime read could be in the past:
if the counter rewinds just after testing ARRM flag, we had lost
some counts.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Move to using 'select SPI' instead of 'depends on SPI'
(see commit df81fef for more details)
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The interrupt status of the GPIO was not cleared when a new
interrupt configuration was set. This prevents the driver from
passsing all the gpio tests.
Fixes#54833
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Note: RP2040 can support single-ended IO, by setting the GPIO_OUT
register to a constant value, and then changing the GPIO_OE register
instead, when the output has to change. To do this, the output-setting
functions need to know which pins have been configured as single-ended,
and for that reason the data structure has been extended to include
this information.
Another change is the PR, is that setting of the pull-ups/pull-downs
now applies to both inputs and outputs as well. Previous solution was
wrong, because if the user wanted to set up an input with a pull
resistor enabled, and then reconfigure it to an output without any
pulls, then the pulls remained in place for the output. Now pulls
are correctly set based on the gpio flags for outputs too, and this
is especially useful for single-ended outputs too.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Populate the `channel` index when constructing configuration structs for
secondary RTT channels. Originally missed in #27704.
Fixes#54955.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the implementation for the akm09918c magnetometer driver.
Additionally, add the appropriate node to the TDK robokit1 device
tree. In order to prevent regressions, add the sensor to the sensor
build_all tests and specific tests using an emulator.
Signed-off-by: Yuval Peress <peress@google.com>
Add a driver implementation that uses the I2S peripheral.
Based off this blog post:
https://electronut.in/nrf52-i2s-ws2812/
Should help with #33505, #29877 and maybe #47780, as there is no garbage
data at the end of transmissions on nRF52832, and no gaps.
Signed-off-by: Jonathan Rico <jonathan@rico.live>
The icm42688 introduced a safe configure function to make the
configuration more atomic, but the main driver was never updated
to call it so the new config values were discarded.
Signed-off-by: Yuval Peress <peress@google.com>
Avoid implementations in the subsys emul directory to keep the directory
focused on emulator subsystem instead of consumers. Consumers should be
implemented side-by-side to their drivers
Signed-off-by: Yuval Peress <peress@google.com>
Allow the emulator to sit in the same directory as the driver
implementation. This will make working on the emulator much easier and
keep the emulator subsystem directory clean by allowing it to focus on
the actual subsystem and not the use cases of the subsystem.
Signed-off-by: Yuval Peress <peress@google.com>
No need to read back the CR (NOR flash config or control register)
to check if entering the 4-Byte Address Mode is effective.
The action of this command is immediate and the result
(bit field of the CR) is NOR flash vendor-specific.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Drop STM32 pinmux driver in favor of pinctrl. Some definitions located
in pinmux headers were used by the pinctrl driver, so they have been
moved there.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use proper format for size_t type eliminating warnings of type:
...
error: format '%u' expects argument of type 'unsigned int', but
argument 2 has type 'size_t' {aka 'long unsigned int'}
[-Werror=format=]
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Commit 00adb2a539 ("drivers: udc: remove no more required pending
state flag") removed state parameter from udc_buf_peek and udc_buf_get.
Adapt udc virtual driver so the code compiles.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
STM32L4plus mcu has SDMMC internal DMA which works without any
configuration and it's handled by SDMMC HAL driver. This commit adds
option to enable it and use it.
Signed-off-by: Petr Hlineny <development@hlineny.cz>
The LoRa modem has been staying in STATE_BUSY
after sx12xx_lora_test_cw() call
because Radio.SetTxContinuousWave() doesn't configure the PHY
to raise 'TX done' event.
It runs TxTimeoutTimer instead,
so we have to handle 'TX timeout' event to correctly release the modem.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Move the can_sja1000.h header file to the public
include/zephyr/drivers/can/ include path. This allows writing out-of-tree
SJA1000 based driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the can_utils_filter_match() utility function to
can_frame_matches_filter(), move it to the public
include/zephyr/drivers/can.h header file, and add a missing mismatch for
standard (11-bit) ID frames passing extended (29-bit) filters.
This allows using the utility function in out-of-tree CAN drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In order to avoid concurrency situation during writing UFTCTL register,
this CL adds critical sections to prevent the unexpected result if the
driver wants to set/clear bits of this register.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
It is advised to stop any ongoing ADC conversion before
disabling the peripheral.
Added some comments so that ADC state isn't left into
intermediate state that would prevent correctly
enabling or disabling the peripheral
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This is necessary to prevent stack overflows when building with
non-standard configurations (e.g. CONFIG_DEBUG).
Adding them as hidden kconfig options to avoid the stuck kconfig syndrome.
Users are free to redefine them in their app to force a value.
The userchan.c driver is only built for posix, and the help text for
ARCH_POSIX_RECOMMENDED_STACK_SIZE states that the real stack comes from
somewhere else (the pthread stack), hence why it doesn't use the new
kconfig options.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
There are just list of child files to include, right now there's a hint
of that trying to be alphabetical but then entries have been added with
various logic, so one has to figure where stuff has to be added.
Rewrite these to:
- keep the list alphabetical, for CMakeLists unconditional first,
conditional after so one just has to select and sort
- drop the spaces in the Kconfig
- use a single space between target and directory
- rename from "Sub Systems" to "Subsystems" (single word)
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The fuel gauge API doesn't make use of syscalls with device drivers, which
is not congruent with Zephyr's security model.
Correct the fuel gauge API to only allow access to fuel gauge device
drivers functionality via syscalls to keep with Zephyr's security model.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Fuel gauge API struct type is currently named battery_driver_api, this is
inaccurate as the API struct represents functions for interacting with fuel
gauge drivers in particular.
Rename the API struct type to fuel_gauge_driver_api to clearly signal its
functionality.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The int config and fifo config register addresses were wrong, fix those.
Adds lots of debug information (when LOG_DBG=y) to the configuration of the
device which is incredibly helpful for diagnosing configuration issues.
Disables the device interrupts while reconfiguring. Adds a safely
reconfigure function which will rollback to previous configuration
on misconfiguration.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Several issues:
- `last_count` should not be updated with current time or this will
cause a time drift and induce jitter due to IRQ servicing latency.
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. If the delay gets close or even behind
current time then the IRQ will be triggered right away. This is unlikely
to happen very often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
Fix the above, and improve the following:
- Prime the accounting by simply invoking the IRQ handler from the init
code. That will make the "ticks since boot" counter right.
- Remove excessive casts, especially a few wrong ones.
- Simplify the code overall.
Here's the output from the timer_jitter_drift test.
Before this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 907.600000 us, 54456 cycles
| max: 1099.750000 us, 65985 cycles
| mean: 1008.594633 us, 60515.678000 cycles
| variance: 2.184205 us, 7863.136316 cycles
| stddev: 1.477906 us, 88.674332 cycles
|timer start cycle 995589, end cycle 606152369,
|total time 10085946.333333 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 85946.333333 us
After this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 992.116667 us, 59527 cycles
| max: 1030.366667 us, 61822 cycles
| mean: 1000.001902 us, 60000.114100 cycles
| variance: 0.105334 us, 379.201081 cycles
| stddev: 0.324551 us, 19.473087 cycles
|timer start cycle 987431, end cycle 600988572,
|total time 10000019.016667 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 19.016667 us
The mean, variance and standard deviation number differences speak for
themselves, even in the absence of competing ISRs and/or IRQ-disabled
periods which would have made the comparison even worse.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Create and use a new `zephyr,i2c-target-eeprom` compatible
within I2C eeprom target driver that allows to use
that driver along with real atmel at24 EEPROM simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This patch is in preparation of uart async support. There are no
functional changes. The patch changes the ordering of functions to
organize shared functions between async/interrupt driven in the same order.
Also move uart_xmc4xxx_init() so that a forward declaration can be
removed.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In preparation for async support. In async uart, service requests are
forwarded to separate dma lines. This patch splits up tx/rx into
separate service requests to enable this.
Also put service request enable code into a separate function. Before,
the same code was generated for different uart devices.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
This allows to fetch information about currently connected WiFi network,
e.g. with WiFi mgmt shell commands:
uart:~$ wifi status
Status: successful
==================
State: COMPLETED
Interface Mode: STATION
Link Mode: UNKNOWN
SSID: Tp-Link
BSSID: xx:xx:xx:xx:xx:xx
Band: 2.4GHz
Channel: 13
Security: UNKNOWN
MFP: UNKNOWN
RSSI: -39
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
For development and debugging purposes it is good to know what is the
version of ESP-AT firmware used on modem. This can be fetched with AT+GMR
command.
Fetch this information during driver init and log all available version
strings, so they look like that:
wifi_esp_at: AT version: 2.1.0.0(883f7f2 - Jul 24 2020 11:50:07)
wifi_esp_at: SDK version: v4.0.1-193-ge7ac221
wifi_esp_at: compile time: (0ad6331):Jul 28 2020 02:47:21
wifi_esp_at: Bin version: 2.1.0(WROOM-32)
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use the appropriate kernel function, i.e. `k_cpu_atomic_idle()`,
instead of directly executing the WFE instruction.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This fixes a regression introduced in:
16a0e314ea drivers: net: Move Ethernet device definition for SLIP to
ethernet
Where the module would fail to build with:
log_core.h:153:20: error: '__log_level' undeclared (first use in this
function)
Registering a module fixes the build.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
It is undesirable referencing to cfb.h because it form
reverse dependency from the driver layer to the subsystem layer.
Including drivers/display.h can solves all references in this file,
so replace it with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
C language does not allow declarations after labels, only statements are
allowed. Add {} around the `NRFX_USBD_EVT_SETUP` case to fix build
issues (`error: a label can only be part of a statement and a
declaration is not a statement`)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
An invalid macro name was used to check whether the watchdog device has
configured interrupts. As a result, the interrupt were never configured.
This issue has been fixed.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The check_arr used the TEST_ARR_SIZE value for the size, but
has been removed and replaced with CONFIG_FLASH_SHELL_BUFFER_SIZE.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Fixes spi_nor_erase to return -EINVAL instead of -ENODEV
when erase requested is out of flash range.
This makes the SPI NOR return the same error as all other errors.
Fixes#54897
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Currently, if CONFIG_SLIP_TAP is enabled (default for QEMU), and no
other Ethernet driver is enabled, the following warning is printed by
CMake:
No SOURCES given to Zephyr library: drivers__ethernet
This happens because SLIP_TAP enabled Ethernet L2, but has no actual
sources in drivers/ethernet. This commit fixes this, by moving the
actual definition of the SLIP TAP Ethernet interface into a separate
file, within drivers/ethernet. Technically, in that configuration SLIP
defines a Ethernet device, implementing Ethernet API, so such a change
is justifiable, and prevents unwanted warning from being generated.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Fix DNS resolver config for IPv6 only setup.
Check validity of the DNS addresses before trying to
configure the resolver.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
These global variables should be under the mutex lock, otherwise they
will be overwritten by other transfers.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Ensure DNS resolver is stopped if modem is turned off.
All IO connected to the HL7800 need to be de-asserted
in order for the HL7800 to power off.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Previously when the repeat argument wasn't supplied to the shell
command it would falsely seem to succeed, even though the
test was never run. Instead of displaying an error message this
rather overrides the repeat to 1, so that the test is run once.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously cmd_test could falsely give the indication that the
flash driver is functioning properly, because the written data
isn't validated and could have silently failed.
This commit adds a verify step to ensure the data was written successfully.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Updates the meteor-lake TLB MM driver to use the memory bank module
to track page usage statistics.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If the host sends Port80 postcodes frequently while EC is busy handling
other tasks, the Port80 FIFO (16-byte depth) might overflow easily,
especially when the host sends the postcode with the 4-byte format.
This change defers the handling and sending (to the upper layer)
postcodes to the system workqueue thread. It can reduce a lot of
(but not all) the overflow case. Also in practice, we usually care
about the latest postcodes. The older codes are not significant to the
developer. This commit also lowers the printing of the overflow warning
to LOG_DEBUG.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
`#defines` do NOT sepecify a type. They will either adopt a native
system type or type of the value that was passed into the expression.
This can lead to warnings such as, "warning: comparison of integer
expressions of different signedness: 'uint32_t' {aka 'unsigned int'}
and 'int' [-Wsign-compare]".
By casting expressions, such as `MAX_TICKS` to `k_ticks_t`, we can
force the appropriate types and resolve these warnings.
Signed-off-by: Zachary J. Fields <zachary_fields@yahoo.com>
This commit adds the activity/inactivity recognition as well as the
stationary/motion detection as defined in the IIS2DLPC application
note.
For now, there is no possibility to configure this interrupt using
device tree binding, as I would like to keep the configuration updatable
and not set at boot time. This behaviour is fine for prototypes and
samples, but is too restrictive on products that may want to change the
interrupt configuration at run-time.
The interrupt is configured using the attributes SENSOR_ATTR_SLOPE_TH and
SENSOR_ATTR_SLOPE_DUR.
Signed-off-by: Giuliano Franchetto <giuliano.franchetto@intellinium.com>
This commit adds support for BH1750 ambient light sensor.
The driver works using I2C peripheral in one-time mode.
Signed-off-by: Michal morsisko <morsisko@gmail.com>
Intel SSP configuration can have auxiliary data embedded after it in a
variable length tlv array. Enable the parsing of this data and add the
data structs to describe the contents.
For now add support only for new version 1.5 blob. This is because
legacy blob doesn't have size field to describe its variable size.
Auxiliary data parsing has currently only 1 setting for link clock
needed in ACE platforms.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Add support for newer data blob version 1.5. Refactor the code to re-use
the common register setting. Clock setting will be handled differently
with legacy and version 1.5 blob.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Modify dai_config_get function to have the config struct as argument.
This was not a showstopper but a request in the API review.
In the same patch modify all Intel dai drivers using the API to preserve
bisect/compile.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
When enabling trigger mode of bmi160 on i2c bus, I've come across
an issue where the readings register STATUS. The issue comes from
the dummy byte in the beginning of the buf.raw which is not necessary.
In addition, for bmi160 on spi bus, the dummy byte has already been
handled in bmi160_transceive while reading register.
So the dummy byte should be removed.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
The Microchip XEC (MEC172x and MEC152x) have a breathing-blinking
LED (BBLED) block which implements a simple PWM mode. The BBLED
PWM frequencies are 32KHz and 48MHz selectable in device tree.
Frequency divider is 12-bit resolution from 256 to (256 * 4096).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This is a follow-up to commits cf871aec64
and 205e684958.
It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.
A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I believe this comment and condition may have found its way into the
rp2040 driver from other drivers where it makes more sense. For
example for the stm32 driver performing a read on the EP0_IN endpoint
turns it silently into a read on the EP0_OUT endpoint. As far as I can
tell, this really was only used to consume 0-length Status-Stages of
to_host control transfer in the other drivers.
Note that usb_dc_ep_start_read() is never called in an IN endpoint
in the rp2040 driver, and furthermore, even if it would have been
called like that, the current implementation would not do the silent
change into actually performing a read on the EP0_OUT endpoint instead,
so the condition and comment is just wrong.
Note that 0-length Status-Stage of to_host control transfers is
currently consumed in this driver by usb_dc_ep_read_continue().
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Since not all GPIOs support voltage selection, voltage flag
is only set if voltage selection register is present.
fixes: #54366
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The data stage of Control transfers that are sent from Host to Device, can
be made out of multiple OUT transactions, if the amount of data to be
transmitted is larger than the endpoint size. When this happens, the DATA
pid should be toggling. The USB Device driver of the pico must correctly
prime the EP0_OUT buffer with the correct data PID, otherwise the hardware
will reject the received transaction.
Before this change the driver used to always prime EP0_OUT with a DATA1
pid.
After this change the driver only uses DATA1 pid after a setup transaction,
and then toggles the pid for each transaction.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Correct bit mask for RF2XX_RX_TRAC_BIT_MASK. Current mask produce dead
code warnings when comparing to value:
RF2XX_TRX_PHY_STATE_TRAC_INVALID = 0x07
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
cy8c95xx I2C GPIO support was broken in commit 4b30008 due
to wrong i2c bus and addr were wrote during GPIO_PORT_INIT.
Now fix this issue.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Address map used for config item `uart_dev` and `uart_regs` is
currently derived using the rpi hal macros `uart0` and `uart1`
which map to the same register address as given in the `reg` property
of the devicetree.
However, the sdk macro is generated using `uart##idx` which zephyr does
not necessarily map to uart0 or uart1.
This is, for example, the case when disabling uart0 with the devicetree
status "disabled"
and enabling uart1 for which then the idx==0 and not 1 which therefore
maps to the wrong controller address space.
This can simply be fixed by deriving the base address from
`DT_INST_REG_ADDR(idx)` instead
Signed-off-by: Ramon Aerne <ramon.aerne@axelera.ai>
PR #30403 implemented nocache regions for ethernet DMA buffers in sram3 to
fix issue #29915. Unfortunately, some STM32H7 variants do not have any
sram3 so they still suffer from #29915.
All H7 variants have sram2 though, so use that for targets without sram3.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
ETH MAC config for STM32H7X and STM32_HAL_API_V2
too late and fails #54409
call HAL_ETH_SetMACConfig before HAL_ETH_Start_IT()
check the return of HAL_ETH_SetMACConfig()
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the ability to keep the RTC value between resets, and
turns it off by default.
Though this feature makes sense for an RTC counting the time and date,
here it is used as a counter. As such the registers used for coutning
should be reset after each MCU reset.
This change puts back in place the previous behavior before the Kconfig
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET was removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
With CONFIG_ETH_STM32_MULTICAST_FILTER=n, MACFFR was being set to 0 instead
of ETH_MULTICASTFRAMESFILTER_NONE, blocking all multicast traffic.
Instead, reset all the relevant bits first, then set either
ETH_MULTICASTFRAMESFILTER_HASHTABLE or ETH_MULTICASTFRAMESFILTER_NONE
depending on Kconfig.
This issue was introduced in #53850, `git diff a5f9fc2~2 a5f9fc2` (the
total diff of that PR) shows what happened - the
`tmp |= ETH_MULTICASTFRAMESFILTER_NONE;` line was removed completely
instead of being gated by `!defined(CONFIG_ETH_STM32_MULTICAST_FILTER)`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Requesting page layout triggers filling bank array
only once, and returns pre-filled array on consequential calls.
But ignores array size.
Remember size of this array as well.
Fixes#54563
Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
MMC was using SDMMC kconfigs to build disk driver.
This is incorrect, MMC and SDMMC should not be sharing
Kconfigs. Split the drivers/disk/Kconfig.sdmmc into
drivers/disk/Kconfig.mmc and drivers/disk/Kconfig.sdmmc.
Also update disk tests to account for new MMC Kconfigs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.
Fixes#51076
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
PSM hibernate mode would draw excessive current
because the UART would be enabled if CTS went low.
In hibernate mode, do not use CTS to power on the UART.
Fix reading of input pin states for low power by reading
the raw value.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change event callback lock to a semaphore to avoid
priority issues the mutexes can cause.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This driver enables a number of interrupts it does not attempt to handle.
This results in "unhandled IRQ: 0x...." messages being printed, and the
interrupt handler retriggers immediately again, and this happens again
and again forver, because nothing ends up clearing the interrupt.
This change implements very limited handling of these interrupts. A custom
warning is logged, and the interrupt is cleared.
This change does not imply that doing this is sufficient. More changes may
need to be implemented to more gracefully re-start transactions or
re-arm some endpoints, but this is one step in the right direction,
and at least the OS doesn't freeze up.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver currently stores num_keys in both config and data. Drop the
data copy, save 4 bytes of RAM.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
UNUSED_L2_START_ALIGNED is a marker of first page not used by the
linker. Starting from this page, the memory may be re-mapped.
assertion <= is banning remapping of the first unused page
changing to <
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Update the calculation of the row and column.
Issues were seen when running the LVGL sample.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The driver is missing the GPIO initialization entirely, meaning that
flags like PULL_UP are not currently being applied. Add the missing
call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Fix two "unused variable" warnings when compiling with assertions
disabled. The two variables are used only in the __ASSERT() call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a build error when the driver is built with:
CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.
Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
To follow the IWDG configuration sequence, the timeout install is
just preparing the reload and prescaler parameters.
Then during the iwdg setup the watchdog is enabled and configured
at the same time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Do not copy over the data to the local buffer,
it can be directly sent to the controller. The
cache is flushed before calling the HAL send
function. Also do not allocate a buffer from
the heap pool for the write operation.
2. Remove a length check as this is handled by
the HAL driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for automatically configuring GPIO hogs defined in the
devicetree during system initialization.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
It is not guaranteed that a multi-core RISC-V hart numbering scheme
will match Zephyr's sequential cpu numbering scheme. Read the hartid and
use that value in calculation to get mtime_cmp reg, instead of the
current_cpu id.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
New capability is to be used by the stack to adjust the corresponding
field in the device descriptor.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
udc_ep_flush() is not implemented by the driver and is not
used by the USB device stack. Remove it for less confusion
when porting drivers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix the prototype used when
CONFIG_IEEE802154_NRF5_EXT_IRQ_MGMT is not set
to avoid a compile warning.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the low readability read command which was swapped with high
readability. This should fix an issue which caused a sensor fetch
fail in low repeatability single shot mode (no data ready)
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Fixes using wrong status bit for ADS1119_STATUS_MASK_ID. Moreover
using BIT(8) does not make much sense for working with uint8_t.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Added new CC1352P1 LaunchXL board supporting 20dBm TX for its
sub-GHz radio.
Note that the board has a multiplexer circuit to switch between
2.4GHz, High-Power TX and Sub1GHz states, for which a custom board
module was implemented, together with board-specific device-tree
bindings and pinctrl definitions for each of the RF states.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Enhance IEEE802154 Sub-GHz driver to support CC13x2P's internal power
amplifier (20dBm) for TX.
Note: requires board-specific antenna switching for it to work
properly.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
When turned on, the existing i2c dump code is use to log every I2C
transaction at debug level.
This can be very useful for detecting problems with I2C peripherals.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
If an i2c message is for just one byte, instead of logging it with a
hexdump after logging the other message info, just added the one byte to
the same log message.
Since most i2c messages are one byte, this significantly reduces the
number of messages and lines needed to log i2c transactions, from three
line per message to just one. It's also a lot easier to read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Add an argument to i2c_dump_msgs() to log the data from reads too. And
then rename the function to i2c_dump_msgs_rw() so the API doesn't
change. If the dump is done after a transaction is processed, as
opposed to before, then the read data is valid and can be very useful.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
When estimating the time that a given SPI transfer will take, whole
buffer sets for TX and RX need to be taken into account, not only their
first parts. Correct `spi_context_wait_for_completion()` accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
spi_nor_sfdp_read is now called from spi_nor_process_sfdp for the
CONFIG_SPI_NOR_SFDP_RUNTIME case and that could be defined without
CONFIG_FLASH_JESD216_API being defined
Signed-off-by: Michael Larson <larson@whisper.ai>
Adjust the size of the stm32_flash_layout[] table depending on the
bank configuration of the stm32u5 or stm32l5 devices.
That will avoid div by zero error in flash_get_page_info()
if the layout_size is not correct.
Assign the *layout_size only once with the correct value : 3 or 1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Lock I2C device state when used so that Power Manager doesn't
suspend the device.
Initial state is a suspended device.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Clock and pins used by the I2C device are suspended when power
manager requires it.
Do not compile function i2c_stm32_suspend when PM_DEVICE isn't
enabled as it is left unused and will make the compiler throw
a warning.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Common STM32_EXTI_LINE_NONE for declaration and setting
of wakeup EXTI line when configured.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This commit aims at updating the drivers stop function to better
follow the CAN header file which specifiec that stopping the CAN
controller should "abort any pending CAN frame transmissions".
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Zero data payload size for isochronous endpoints is a
is a valid setting for default interface.
Also do not update MPS of control endpoint since it is
set by the driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The change enables the ethernet driver to save statistics in a
structure in the ethernet driver API structure. In addition, the
change also attempts to update error statistics based on errors
reported in the STM32 ethernet HAL API.
Fixes#53995
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
The CAAM hardware needs to read RNG values into a non-cache
buffer. Since the contract to Zephyr RNG functions do not
require non-cache buffers, we use an intermediate non-cache
buffer to retrieve results.
Added a Kconfig to control the size of the intermediate buffer.
Fixes#53035
Signed-off-by: David Leach <david.leach@nxp.com>
This commit fixes a bug in the STM32 ospi flash driver when attempting
to erase an area that spans more than one erase sector.
Without this fix, only the first sector is actually erased, the rest
silently fails the erase.
Issue is that the write enable latch command is only sent for the first
erase command.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
This enables the MCO clock output pin to be configured through Kconfig on
stm32l4 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This enables the MCO clock output pins to be configured through Kconfig on
stm32f7 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add 2 new sub-commands to the sensor command (attr_get and attr_set).
These commands can be used to access the driver's attr_set and attr_get
functions.
Signed-off-by: Yuval Peress <peress@google.com>
Remove the CAN_HAS_CANFD Kconfig helper symbol in order to allow enabling
CAN-FD support in the API regardless of driver support.
Change default to CAN-FD support being disabled and have samples and tests
that require CAN-FD support turn it on. This aligns the default
configuration across CAN controller drivers regardless of their
capabilities.
The rationale behind this is that we are starting to see MCUs with multiple
CAN controllers, some CAN-FD compatible, some not (e.g. NXP i.MX RT1060 and
FPGAs). Automatically enabling CAN-FD support based on the presence of a
CAN-FD capable CAN controller leads to different application default
settings based on the CAN controller(s) in use.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the CAN_HAS_RX_TIMESTAMP Kconfig helper symbol in order to allow
enabling CAN RX timestamps in the API regardless of driver support.
This simplifies application prj.conf settings across board supporting/not
supporting RX timestamps considerably.
CAN drivers not supporting RX timestamps already initialize the timestamp
to 0 for received frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Now that we have the information of internal channel number for STM32
ADCs in the dts, we can use it to remove a lot of specific code and
make it clearer.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Slightly refactor STM32_ADC_INIT macro.
adc_stm32_cfg_##index declaration is now part of ADC_STM32_INIT
and extracted from CONFIG_ADC_STM32_SHARED_IRQS #ifdef.
Aim is to minimize code duplication when adding new adc_stm32_cfg_X
or adc_stm32_data_Y entries
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This is a follow-up to commit 205e684958.
The recently added nrf_rtc_timer test case (test_next_cycle_timeouts)
revealed a problem in the current implementation of this function.
Adjust it to avoid missing COMPARE events in specific circumstances.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
RP2040 requires watchdog load time in us, but Zephyr
watchdog window values are in ms. Make sure that it is
adjusted to hardware requirements.
Signed-off-by: Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
Currently we setup irq trigger type (pulse or level) in IDU
before we Mask (disable) IRQ line.
The IDU is disabled at this moment, however we still may
accidentally generate interrupt by trigger setup.
To avoid that let's mask (disable) IRQ before trigger type setup.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
bugfix for Cyclone V Ethernet Phy error and timeout overflow.
- p->instance was incorrectly assumed to be a reference to
the emac device, this is ammended
- the volatile uint16_t timeout would often overflow
- code cleanup and added more macros for housekeeping
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
Add a driver for the NXP MCUX Quadrature Decoder. The driver
is simple and only implements the phase a and phase b inputs. The
module has additional features which can be added in future PRs.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce Ethernet low-level driver for NXP S32 Network Controller
(NETC). Current driver allows to manage from Zephyr a Physical Station
Interface (SI) and/or a Virtual SI. The NETC has an integrated Ethernet
Switch. Currently the Switch is initialized from this driver with a
default configuration, and all ports are enabled and transparent for
the user. A separate Switch driver should be addressed in future patches.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 NETC External MDIO controller driver. Driver supports
a single instance, as current support is based on NXP S32Z/E SoCs.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Advertise Gigabit Ethernet if the PHY supports it. As with the
other speeds, it is assumed the PHY supports both duplex modes.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 Message Receive Unit (MRU) driver based
of Mbox API. The MRU couples with a processor and allows to
receive messages from senders, which are other modules or
processors.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This change enables the ISR Hard Reset sent bits, so that
an interrupt is generated when a Hard Reset is sent or
the Hard Reset failed.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The Hard Reset sent signal was tested twice in the same
"if else" structure but only handled in the last test. This
change removes the first detection so that Hard Reset can
be correctly detected.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Only run the `PM_DEVICE_ACTION_TURN_ON` and `PM_DEVICE_ACTION_TURN_OFF`
actions for child devices that have refered to the domain via the
`power-domain` property.
This prevents multiple actions being run for devices that refer to
several power domains, e.g.
```
test_dev: test_dev {
compatible = "test-device-pm";
status = "okay";
power-domain = <&test_reg_1>;
alternate-domain = <&test_reg_chained>;
};
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The struct sensor_value type does NOT require val2 to be positive. The
removed code is in fact a rather serious bug, probably put in place
because it makes printing sensor_values easier.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
It's not necessary to busy wait 150 µs after changing register banks.
Nothing in the data sheet nor app note suggests this. ST's own HAL,
which is used by this driver, does not delay when changing banks. It
does a bank change around every function that accesses a non-user bank
register (it's quite inefficient).
So if it was necessary it would be broken now, as most of the bank
changes have no delay.
One of the few page changes that did have this delay are the those done
before and after reading a sensor sample. Which is where the speed is
significant and is limiting the update rate the driver is capable of.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The code in the ST HAL does a read/modify/write to change the bits in
the LSM6DSO_FUNC_CFG_ACCESS register that control which register bank is
active.
All the other bits in the register are defined as zero. It's possible
to simply set the register to the desired value without reading the
contents first.
This bank switch needs to be done twice for every sensor read when the
sensor hub is used. The driver as it is can not keep up with the higher
update rates of the lsm6dso. So any speed increase in this code allows
for a higher update rate as well as reduced latency.
Previously, a read of the lsm6dso's accel and gyro on a 400 kHz I2C bus
with a 3-axis magnetometer on the sensor hub takes 2.69 ms. This drops
that to 2.26 ms. This is enough to support the 417 Hz ODR.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
There is a flaw with I2C communication to peripherals behind the shub
that causes sporadic failures. Especially calls to configure a device
after the lsm6dso initialization is finished, e.g. to set the ODR, can
fail to work correctly.
Access to shub peripheral registers is done by putting the parameters of
the operation into SLV0 and then waiting for the lsm6dso to perform the
xfer on the shub I2C bus. The lsm6dso does this in sync with the
accelerometer update rate. Once the shub is enabled, it peforms the
xfer repeatedly as the accelermeter is sampled.
The wait has a problem: It might detect that a previous shub xfer has
finished, which was done before SLV0 was programmed with new parameters.
The shub status register is read-to-clear. This isn't in the data sheet
or app note, but it is. By reading the status before enabling the
sensor and after programming SLV0, we can be sure when it becomes set it
has finished the current operation and not a previous one.
Also set the write-once flag before shub init. This causes the shub to
only perform I2C writes once instead of continuously. This was set at
the end of init, so any writes done during it would repeat until the
shub was disabled.
Put a timeout in the code that polls for the sensor hub op complete. It
could possibly poll forever. More importantly, if there is no device
connected to the sensor hub, the lsm6dso does not timeout on the
operation for ~13 seconds. Since the shub init does a probe for devices
on startup, this will happen if shub support is enabled but a lsm6dso
has no sensor hub devices. There could be multiple devices, some with
additional sensors and some without. Initialization of the devices
without additional sensors takes tens of seconds without this timeout
being added.
Add a 300 µs wait after disabling the sensor hub. This is necessary
according to the ST app note AN5192 §7.2.1.
Read the shub status from the main bank register instead of the shub
bank register. This avoids an extra bank switch before and after each
status poll. Actually two bank switches on each side, since the lsm6dso
driver switched banks and then the ST HAL function to get the status
register switches again.
The wait for the shub I2C transaction to finish is not needed when the
shub is enabled at the end of init. We aren't starting a new I2C write
or reading the result of a read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The lsm6dso initialization will fail if the device is not already set to
the user register bank. All the registers used will be the wrong ones
from whatever bank it is in, e.g. sensor hub bank. This includes the
registers to reset the device!
The bank will default to the user bank on reset, but the chip has no
hardware reset line. On a reboot it will be in whatever bank it was
last in. If the sensor hub is enabled, it will switch banks on every
sample, so it's entirely possible to reset or reboot when it happens
to be set to the sensor hub bank, which will cause the driver to
fail to initialize. It will not work again until the lsm6dso is power
cycled.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Per an ST app note, the sensor hub I2C controller should be disabled
before doing a software reset. Possibly, this is because the sensor hub
could be in the middle of the an I2C transaction to a sensor when it is
reset. Disabling it and then waiting makes sure it has quiesced before
resetting.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The initialization code would configure the lsm6dso interrupt, then
configure the rest of the chip. The chip init includes a reset that
would undo the register setting done during interrupt configuration.
It's also not a good idea to enable the interrupt on the SoC when the
lsm6dso has not yet been reset or configured. It might be generating
interrupts.
The lsm6dso has no hardware reset line, so it will not be reset on
reboot unless a power cycle is involved.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The DMA API contract specifies that start/stop may be called multiple
times. Prior to adding power management this was perfectly fine as it was.
In adding power management, there are additional side effects that can
cause issues. Instead check the state of the channel prior to start/stop
and do nothing if already in the desired state.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
When transceiver is overload on reception a frame can be stored on
the internal buffer without processing a frame start interrupt. The
frame will complete and system will received a interrupt and signal
receiver thread with an isr_status equal to 0x2c.
The current implementation process one flag at time and it may hang
when status is 0x2c. This issue can be reproduced using two nodes
where one perform a regular TX broadcast and tThe other one should
be wait for frames. The receptor should run on debug mode and system
should be started normally. The problem happens when pressing CTRL+C
on the debugger, which will cause system to stop. However, the
transceiver still can receive one last frame. After a few transmission
user can continue application and a isr_status of 0x2c will be visible
if CONFIG_IEEE802154_DRIVER_LOG_DEBUG is enabled.
This fixes the current issue by processing all RF2XX_TRX_END events.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A call to exit_dpd mode for the nrf QSPI nor flash should always be
made, even if the currently executing image is compiled with
CONFIG_PM_DEVICE=n, because a previously executing image could have set
the device into DPD mode, and a call to exit_dpd is required for proper
functionality. Call `exit_dpd` regardless of the setting of
CONFIG_PM_DEVICE during QSPI nor initialization.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Previously channels could be tore down before a sequence completes,
either when using async, or when ADC_ACTION_REPEAT was specified
The teardown is now moved to after an entire context is complete
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This optional function allows a driver to do operations
after a complete sampling sequence is completed.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add dependency on SYS_CLOCK_EXISTS to all timer configurations.
This would avoid a situation where a possible timer configuration would
be wrongfully selected but SYS_CLOCK_EXISTS is disabled.
This simplifies code that wants to check for system clock capabilities
don't have to check if the system clock exists in addition.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Minor rework to perform the PLLI2S VCO computations in floating point as
per the original seemingly intent.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
Point to the modified version of hal_stm32 which allow to use
ETH HAL V2 on stm32F7.
Update zephyr driver to allow it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to what was done in USB or RNG drivers, configure 48MHz domain
clock using device tree.
By default a freq clock check is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix handling of failed NXP FlexCAN RX mailbox reads. Instead of re-enabling
the RX MB in the ISR, we need to handle a failed RX MB read (e.g. due to a
busy MB bit).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Program the right trim control register for mec150x.
This fixes uart debug console output issue.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This change takes advantage of line information coming from new properties
to simplify exti_irq_table definition and isr routing related code.
All __stm32_exti_isr_x routing functions are removed and instead,
stm32_exti_isr is now taking a exti_range structure which provides,
for each irq, start line and range length.
This argument is provided by IRQ_CONNECT macro instead of previous
dev info (which is constant and doesn't need to be provided as argument).
line_range_x variables are generated at driver init thanks to a
mix of dt magic and runtime implementation:
DT_FOREACH_PROP_ELEM iterates over each irq line (counted as
interrupt-names property) call a macro which instantiates populated
line_range_x variables, and calls IRQ_CONNECT for each IRQ.
Additionally, at each iteration stm32_fill_irq_table() is called to
fill exti_irq_table.
Since not required anymore, Kconfig symbols EXTI_STM32_EXTIX_Y_IRQ_PRI
are removed. IRQ prio is now supposed to be configured in device tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The uart_mux_recv() documentation was wrong, the function parameters
were incorrectly documented.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Applied changes on the most recent version of the driver
- Using CONFIG_ETH_MULTICAST_FILTER to enable/disable the hash filter
- Using read-modify-write the hash table for a single address
when joining
- When leaving rebuild the entire hash table and ensure that multicast
addresses used for the hash calcuation doesn't have the joined flag set
I have tested these conditions:
- IGMP enabled and disabled on my ethernet network
- Observed the network utilisation on a STM32H7 device running these
changes with the hash filter enabled and disabled while the device is
on a ethernet network with high rate multicast traffic
- When the application closes a socket for a multicast receive, ensure
it doesn't affect the receiption of existing sockets as well as IGMP
Fixes#53773
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
Use the MAC's hash table to filter incoming multicast frames that are
targeted to subscribed multicast groups and discard all others.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
# Conflicts:
# drivers/ethernet/eth_stm32_hal.c
This reverts commit 271b306.
In rare conditions, this commit causes the uart shell mechanism to
corrupt on Cros ec system. Revert this commit on upstream repo first to
avoid blocking the development. Will dig out why this symptom occurs
later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When the PAUSE or STOP command was triggered, the driver was first
requesting the PDM peripheral to stop by calling nrfx_pdm_stop() and
then it was setting a flag that was in turn checked in an interrupt
that was generated when the PDM actually stopped (what happens a moment
after the stop request is made). But that setting of the flag could get
preempted and the interrupt handler could get executed first causing
the stopping to be not handled properly and leaving the driver falsely
considering the peripheral as still active.
This commit reverses the order of these two operations to avoid
the described race condition.
Same sequence is corrected also in event_handler(), but this is
done only for consistency (it is in the interrupt handler itself
so there is no race possible in this case).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The number of HPSRAM memory blocks in use is reported to the
PMC via the sideband channel supported by the communication widget.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
the watchdog is enabled by the wdt_setup()
coming after the wdt_install_timeout.
Due to PR #44972, the code did not follow that.
This PR fixes the correct other in the sequence.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.
This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
are always generated, whatever the clock status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RNG domain source clock is now configured via call to clock_control
driver.
Besides, add static checks to verify domain clock configuration
is correct:
- If HSI48 is used because it is default domain clock config,
it should be enabled
- If no HSI48 is available, a specific domain clock should be set
- In L0 case, PLL could be used as domain clock only at a specific freq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS to populate device clock information.
This will allow to add clock source information in next commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:
zephyr_code_relocate(file location)
The new API for zephyr_code_relocate uses the following directive:
zephyr_code_relocate(FILES file LOCATION location)
update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is important for applications which are chain-loaded by a broken
bootloader which doesn't reset the peripheral before handing over control.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Regulator voltage needs to be within allowed range before enabling. It
could happen that regulator default voltage is out of the allowed range,
so the regulator could be enabled at boot time producing a not-allowed
voltage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The existing linear_range API did not allow values or windows outside of
the linear range (returned -EINVAL). With this change values are allowed
outside of the range, being adjusted to the edge values (min/max)
instead. In the case of windows, it is allowed to have partial
intersection. In both cases, the API assigns a valid index (nearest) and
returns -ERANGE. This change is useful because the main client of the
linear range API, regulators, needs such behavior. For example, If an
application specifies a voltage range from 1.0V to 1.5V and the
regulator supports from 1.2V to 2.7V, the regulator can configure a
voltage that satisfies the condition: 1.2V. With the current API, the
input would be refused because 1.0V lies outside of the 1.2V-2.7V range.
Also, for constant ranges, the minimum index is returned.
Tests have been updated/extended accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to clean up clock related code, replace static build time
clock configuration code by a runtime check.
Since I'm not able to guarantee this check will provide a correct
verdict in 100% of the cases (I'm thinking to ULPI or exotic configurations
like F7 OTG-HS), add a config option to disable it if needed.
It also doesn't apply on F1/F3 series. Keep the build time check for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This change doesn't consider STM32F1 series.
There are 5 categories of STM32 regarding USB domain clock:
A] USB domain clocks directly driven by CK48 clocks
B] USB domain clocks which can select either CK48 or an alternative clock
C] USB domain clocks which can select between MSI or PLL
D] USB domain clocks relying statically on a PLL output
E] USB domain clocks which can be set on 2 different PLL ouputs
For case A], there is nothing to be done. Clk48 was already configured
in a previous change (51c7643295b02ba26ddcd0fd915484114db7101c).
For case B] and C] USB domain clocks will need to be configured in
each board.
For case D] and E] relying on existing dts configuration. Though
there is no easy build time chekc that can be done.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS() to access usb device clock information.
This will help accessing domain clock information from dt nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove this code to clean up the driver.
Clock activation is done from device tree configuration in clock_control
driver.
Users are informed by warning about missing configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32wb, M0 core may enable and disable CLK48 when using RNG.
Lock related hsem to prevent M0 to disable CLK48 when it doesn't need it
anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add kscan pins gpio driver for KSI[7:0], KSO[15:0] pins that
they can be configured to gpio mode. These pins registers address,
bit fields and function are different from GPIO group, so I create
a new compatible driver for these pins.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add stub code for SDIO support, capable of verifying card responds to CMD5.
This commit also changes the architecture of the SDIO probe step to make
adding new protocol support more streamlined, and enable compiling out
support for undesired protocols.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Since nPM1100 may be configured statically in some circuits, BUCK node
may note be defined, so neither API ops or init call are used in the
code. Add __unused attribute to account for such case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
While nPM1100 is to be operated in fixed configuration for some
applications, it has some degree of configuration via GPIOs. For
example, mode (auto/PWM) can be configured via MODE pin. VBUS current
can also be adjusted using ISET pin, even though there is no API yet to
limit the PMIC input current.
This patch adds a new regulator class driver for nPM1100 PMIC, so that
it can be used with the standard regulator API when needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is recommended that choices in Kconfig have names
so this commit adds missing one for the type of
host commands peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
In some case, we may need to describe a domain clock for a device
while there is no way to configure it (ex: USB clock set on PLL_Q output
on F405 devices > It is not selectable).
Then, configuring a device clock domain in the clock_control driver
will allow to retrieve its subsys rate.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The dai.h interface does not prohibit calling dai_config_get()
with different direction values. The dmic driver should handle
invalid direction value explicitly and not rely on an assert.
Link: https://github.com/thesofproject/sof/issues/6896
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer even though an endpoint is already busy.
Split usbfsotg_xfer_start() into two function, one to start
next transfer and another to continue the transfers, and use
busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Pending state flag was only used by the UDC nRF USBD driver.
With the introduction of busy state flag it is no longer needed
and can be removed.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer to host even though an IN endpoint is already busy.
Use busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Provide a Kconfig option to enable HW RX and TX checksum, which
can increase throughput performances.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With ETH_STM32_HAL_API_V2 avoid log error message
if error log report:
we have problems if the traffic is high
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
For NPCX SMB/I2C SMB modules in FIFO mode, the registers include:
* Common registers, offset 0x00-0x0f, accessible regardless of the value
of BNK_SEL
* Bank 0 registers, offset 0x10-0x1e, accessible if BNK_SEL is set to 0
* Bank 1 registers, offset 0x10-0x1e, accessible if BNK_SEL
is set to 1
In the current driver, it uses two structures, `smb_reg` and
`smb_fifo_reg`, to access `Common + Bank 0` and `Common + Bank 1`
registers. But It might be easy to misunderstand that they are two
different modules.
This CL tries to simplify this by the following steps:
1. Use `union` to combine `Bank 0/1` registers in the same structure.
2. Remove `smb_fifo_reg`. We needn't use two structures to present
SMB registers.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
The HAL_QSPI_Init() accepts Init.FlashSize where "FlashSize+1
is effectively the number of address bits
required to address the flash memory."
To get 64MBytes = 2^26, the value of the Init.FlashSize must be 25.
and bit written to the DCR = 25.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the IT8xxx2 SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the NPCX SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:
- sensor info
- sensor get icm42688p@0
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
During flash operation, you have to disable XiP which force function
to be located in RAM. On top of that, the function `flash_put_cmd_addr`
is time critical so we need to declare as inline. For some reason,
sometimes the function was not really inline. Changed it to
ALWAYS_INLINE fixed the bug.
Signed-off-by: Mathis Raemy <mathis.raemy@gmail.com>
The `fcntl.h` header has never been a part of ISO C so move it to
`include/zephyr/posix`.
To ensure a smooth migration, a header was left in
`lib/libc/minimal/include` that prints a deprecation warning.
Users should either include `<zephyr/posix/fcntl.h>` or switch to
`CONFIG_POSIX_API=y`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
In case user didn't set mac address in any way (locally defined or
randomly generated), define mac address using device unique id.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deprecate Kconfig mac address related symbols and replace by existing
device tree properties:
- local-mac-address
- zephyr,random-mac-address
User who wants to keep using deprecating method of defining random
MAC address using Kconfig should set CONFIG_ETH_STM32_HAL_RANDOM_MAC=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to ease deprecation of these methods (in favor of dt based
configuration), introduce a choice for MAC address configuration method.
Default to random method (no change).
User wanting to still use ETH_STM32_HAL_MACX symbols should define
CONFIG_ETH_STM32_HAL_USER_STATIC_MAC=y
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Setting a detected packet family (ipv4 or ipv6) in net_context level
instead in lower layers for AF_PACKET/SOCK_RAW/IPPROTO_RAW type sockets
when sending data.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
BUCK1/2 are defined as "always on" regulators, however, there is a
special override register that allows to turn them on/off.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some regulators are enabled by default, however, such condition cannot
be captured now by the regulator driver API. Refactor
regulator_common_init_enable to regulator_common_init (enable removed,
as it also sets mode) and add a new argument to specify such condition.
With this change, regulator_disable() and regulator_is_enabled() work as
expected without a first call to regulator_enable().
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Vbus detection is required by self-powered, with external non-USB
supply, devices to have an operational USB peripheral. The voltage
sensing, when enabled, is performed via a designated pin (PA9 is
the most common).
For greater details see section 2.6, ST application note AN4879.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
When using watchdog which doesn't support callbacks (e.g. STM32 IWDG)
it's very useful to have counter based watchdog with shorter timeout.
This way we can gather useful information before IWDG resets SOC.
In above case it's usually not desired to reset SOC when counter
watchdog is triggerd, because we can lose information about reset cause.
For example, STM32 can determine if the reset was caused by watchdog.
Another use case for counter watchdog without SOC reset is to detect
slow code paths.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that compatible is directly linked with driver version,
use DT compat based Kconfig flag to build the correct flash driver
version.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of introducing a vX driver version, use series name.
With this commit F0, F1, F3, L0 and L1 series are using F1 flash driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on STM32Cube API, use clock_control framework
for clock configuration inside this driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In preparation of the introduction of dt configured clock in this
driver, refactor clock related clocks.
- remove start_ble_rf()
- Move IPCC clock activation in c2_reset()
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As long as LSE clock is set in device tree, configuration will be
done in clock control driver, no need to do it here.
Besides, remove back up domain related code as this is also already
handled in clock_control driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove code related to LSI used as clock source for RF wakeup,
it isn't a valid clock source.
Also don't disable LSI when LSE is selected.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update the SBS Gauge driver that implements the fuel_gauge API to implement
a set_property function allowing the writing of an SBS word to the
manufacturer access register per the SBS spec.
Includes an update to the SBS Gauge emulator and SBS fuel gauge tests to
weakly verify the code runs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Implement and weakly test fetching the manufacturer access word from an SBS
compatible fuel gauge.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Current divisor is 10000000 (should be 1000000).
For example, ESP32_CLK_CPU_240M / 10000000 == 24 MHz (incorrect).
Signed-off-by: Chris Wilson <christopher.david.wilson@gmail.com>
This change for addressing the below symptoms.
Two FW images have different h2ram offset settings.
Jumping to each other will cause offset setting errors.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Add support FD frame filter to configure type frame for
each Rx msg to receive corresponding frames (classic, FD frames).
The Bosch M_CAN driver does not support FD frame filter,
so inmplement driver to handle it in software.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
The number of extended filters can be up to 15 for MCUs like the NXP
LPC55Sxx series, so the flags don't fit into uint8_t.
Fixes#53417
Signed-off-by: Martin Jäger <martin@libre.solar>
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.
This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ISO/IEC 9899:1999 (C Standard), §7.4 Character handling <ctype.h>:
In all cases the argument is an int, the value of which shall be
representable as an unsigned char or shall equal the value of the macro
EOF. If the argument has any other value, the behavior is undefined.
So add a cast to unsigned char to make sure we do not trigger UB.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce driver for APS6408L PSRAM, built on top of the MCUX memc
driver for flexSPI. This driver supports operating the PSRAM in high
speed mode (200MHz or more). Note that in order to support this
PSRAM's alignment requirements, either ahb-read-addr-opt or
ahb-prefetch must be set for the FlexSPI instance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
memc driver was setup to always assume the flexSPI would be in XIP mode,
and skip init. This is only true for the active flexSPI, which is
typically FlexSPI1. Fix this check to only skip init for FlexSPI1
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rename flexspi-hyperram driver to flexspi-s27ks0641, and update
function names. This driver is only capable of supporting the
s27ks0641 HyperRAM chip, as the lookup table given in this driver
is specific to the s27ks0641.
Rename the flexspi-hyperram binding to reflect this, to
prevent confusion from users.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Printing of NACK messages should be set to LOG_DBG to avoid spamming.
When we scan whether there is a target device through I2C, if we use
LOG_ERR, it will frequently print out NACK messages. So it is set to
LOG_DBG in the case of NACK.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix a bug that causes not handling an IDLE line detection interrupt for
some STM chips, e.g. STM32F412. It impacts the async UART
communication - an information that data have been recieved is lost.
The issue occurs when the IDLE flag is set during handling another UART
interrupt, e.g Transmission complete. The ISR calls uart_stm32_err_check
function, which clears the noise error flag with LL_USART_ClearFlag_NE
without any additional checks. Unfortunately, clearing the noise flag
also clears the IDLE flag for some chips(an read to the USART_SR
register followed by a read to the USART_DR register for STM32F412
clears PE, FE, NF, ORE and IDLE flags), hence the ISR is not called
again for the IDLE event. The IDLE flag is no longer set.
Add checking the noise flag before clearing it.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
ESP32 and ESP32-S2 HW clock are tied to DTS clock configuration.
This changes updates the default configuration to retrieve
this information from DTS.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Only relocate memc driver when CONFIG_FLASH=y.
CONFIG_FLASH_MCUX_FLEXSPI_XIP previously was dependent on
CONFIG_FLASH, but the scope of this Kconfig has changed.
Due to this, the memc driver now must have two checks, as it should not
relocated when the driver is being used for a memory controller that does
not expose the flash driver interface.
Since the NXP HAL also relocates the underlying FlexSPI driver
using a similar check, it is updated in this commit as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The addresses of the flash and flash controller of the RP2040
SoC were mixed up. There was no clear distinction between the
flash and the flash controller, which was unclear but also
caused a DTC warning.
This commit makes the distinction clearer: The SSI peripheral at
0x18000000 is the flash controller, and the flash itself starts
at 0x10000000. The flash driver and rpi_pico.dts were fixed
accordingly.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
It should never be intended to return an uninitialized
variable from a function.
Remove the use of the uninitialized variable to fix the bug.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
The adc1 & 2 of the stm32g4 devices share the same irq
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Since the FLEXCAN_TransferSendNonBlocking() function has
read-modify-write operations on global resources, then
if interrupts are enabled and/or if there is more than
one thread with a different priority, threads with
a lower priority can overwrite global resource changes
made by higher priority threads.
Fixes#52673.
Signed-off-by: Mikhail Siomin <victorovich.01@mail.ru>
pwm_set_wrap() sets the TOP value, not the number of cycles.
Counter will run from 0 to TOP inclusive, generating TOP + 1 cycles.
To get n cycles, we need to set TOP to (n - 1).
The wrong setting made it impossible to achieve 100 % duty cycle, as
there was always one extra cycle.
Fixes: 7e0fff24c7 ("drivers: pwm: add pwm driver for rpi_pico")
Signed-off-by: Oliver Barta <o.barta89@gmail.com>
Change Summary: The TX/RX FIFO was not flush on initialization thus
causing bad transactions. Thus, we need to flush the FIFO, and
according to Synopsys DW I2C spec, we can flush TX/RX FIFO by clearing
the enable bit. This is verified with our own I2C test on the SoC with
Synopsys DW I2C IP.
Signed-off-by: Dennis Wang <dennisjw@fb.com>
Add support for Microchip MEC15xx to the XEC clock control driver.
MEC15xx 32KHz clock support uses the same 32KHz source for both the
PLL and peripherals. MEC152x does not include the PCR clock monitor
present in MEC172x. MEC15xx and MEC172x support internal silicon
oscillator, parallel and single ended crystal inputs, and the
32KHZ_PIN input. MEC152x supports fall back to internal silicon
OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the
internal silicon oscillator can only be disabled if using an external
32KHz which is always on. For MEC152x the driver will only use the
PLL source clock device tree value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Fix Microchip XEC clock control driver single-ended XTAL2 pin
initialization. Add support for external 32KHZ_IN pin as a
clock source including PINTRL to switch the GPIO to 32KHZ_IN
function. Add device tree option to disable internal silicon
oscillator if it is not required by the configuration. Add
device tree tuning options based on crystal and board layout.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Some baudrates are not supported in certain SoCs.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ADC4 requires particular sequencer configuration.
Clean section that are not used for the configuration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Depending on the ADC instance, internal channels
temperature sensor or vbat differ.
That must be adapted so that each internal channels
of ADC4 are operational.
ADC4 is using CommonChannel config for the Sampling time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Refactor the regulator shell so that it exposes all regulator APIs
- vset/iset commands allow to specify a single value (equal min/max) or
a range
- Voltage/current input is now more user friendly, e.g. user can specify
units and decimals: 3.3v, 200mv, -4mv, etc.
- Reported values are also printed in a more user friendly way, e.g.
1800000 uV will be printed as 1.800 V.
- Added new command to list supported voltages
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new API to query the configured regulator mode. Updated fake
driver and API tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Apply initial mode (regulator-initial-mode) as part of the
regulator_common_init_enable call. Update tests to cover this change.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If present, get the clock value for STM32 I2C from the clock source defined
in the dts.
Otherwise, use pclk.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support of STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT to condition the
configuration of an source clock for STM32 I2C.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit modifies the way we define the I2C driver by using device tree
instance macros instead of node label names.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that USB clock prescaler is done is clock_control driver.
Remove similar part in USB driver.
Note that behavior is different: it is now up to the user to provide
the proper configuration.
Add a warning during the transition period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32F1 series, configure USB(/OTGFS) prescaler based on DT.
When prescaler is set, PLL output clock is not divided.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This Kconfig is moved to the soc level since it determines
the flexspi clock initialization for XIP.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Fix handling of gpio-reserved-ranges within MCUX iGPIO driver, to ensure
that the configuration IDX will be correctly calculated for pins where
multiple reserved ranges are present on the GPIO controller
Fixes#52506
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added information about pin output direction into
Z_PINCTRL_STM32_PINCFG_INIT if output_low or output_high is provided.
GPIO output flag is set in configuration struct and this will end up
being loaded into MODE register. Because of that it is no longer
required for pinctrl_configure_pins() to set MODE register value for
GPIO input/output.
Fixes#53141.
Signed-off-by: Lukasz Mazur <lukasz.mazur@hidglobal.com>
Add uart_configure and uart_config_get functionality to
MCUX flexcomm driver to be able to dynamically configure
flexcomm uart at runtime.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
If the bootloader changes iof_en/iof_sel settings before zephyr launching,
GPIO does not behave correctly.
These values should be 0 initially, Initialize to 0 at GPIO initialize.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add the possibility to use the clock parameter in dts to set the clock
source of I2C devices for all STM32 MCUs.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix the driver so that after a call to uart_rx_disable() it does not
allow re-enabling RX until the UART_RX_DISABLED is generated (what
means that the disabling procedure is complete). Otherwise, it is
possible that the RXTO event from the previous RX is handled right
after a new RX is started, and the RX buffer pointer gets corrupted
in the `rx_flush()` function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
NPCX9 series chips include a SHA hardware accelerator, which supports
SHA256/SHA384/SHA512 hashing and a library (APIs) in the on-chip ROM.
This commit adds the driver support by wrapping the on-chip ROM APIs.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Bug occurs when polling kernel uptime. Uptime was suddenly
jumping because lptim counter was counted twice
(from CNT and ARR registers) in case reload happens between
values are fetched.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
peripheral-id property should be eventually removed.
For now set it as optional and allow skipping the usage
in UART driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
peripheral-id property should be eventually removed entirely.
For now set it as optional and allow skipping the usage
in GPIO driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Common GPIO driver needs to be initialized before e.g UART driver
to ensure correct GPIO clock configuration when configuring UART pinout
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
This commit adds initial support for Silabs Real-Time counter
Co-authored-by: Filip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
This commit adds a series of driver-related changes to
Gecko pinctrl.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit adds initial support for gecko pinctrl driver
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The ADC module has four conversion groups, each one is set up as a zephyr
device. The start-up calibration is initiated globally for all groups
and it is run in each device init function. The ADC module supports post
calibration per group. Post calibration is run automatically after each
group acquires the samples.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Add region calculations and implementation of
sys_mm_drv_query_memory_regions to pass calculated regions down
the line.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Add FFF-based fake regulator driver. This driver can be used as a stub
or mock in testing.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The edge voltages within a range need to be included as part of the
supported comparison.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixed the following compile warnings:
../include/zephyr/sys/util.h:108: warning: "ARRAY_SIZE" redefined
hal/nxp/mcux/mcux-sdk/drivers/common/fsl_common.h:236: note:
this is the location of the previous definition
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
When operating as a Source, the driver will wait indefinitely for
a GoodCRC message from a Sink. This PR adds a timer to trigger a
no response when a GoodCRC message isn't received.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Since all UCPD devices share the same ISR, the interrupt
should be enabled after all UCPD devices are initialized.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
At system startup, the SYSCFG ITLINE registers might not
indicate an interrupt even though a UCPD interrupt is pending.
This cause the ISR to be called repeatedly without being serviced,
resulting in a system lockup. Reading the UCPD Status Reg instead
of the SYSCFG ITLINE register fixes the issue.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The nRF5340 product specification states that the QSPI peripheral
supports 192 MHz and 96 MHz PCLK192M frequency, thus the default /4
divider for HFCLK192M (from which PCLK192M is derived) can only be
used when the QSPI peripheral is idle. Correct the shim accordingly
and improve related comments.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On some STM32 series (H7, MP1), iwdg and wwdg have multiple instances.
Due to current driver implementation, these wdg instances were not
checked in the function.
Fixes#53002
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement usb_dc_wakeup_request for STM32 USB DC and default to enable
remote wakeup functionality when the drivers is selected.
This allows the device to wake the host up by calling
usb_wakeup_request().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for virtual USB host controller intended for use
together with virtual bus and virtual device controllers.
This driver is not an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB device controller intended for use
by virtual bus and virtual UHC controllers. This driver is not
an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB bus (UVB) intended for use
by virtual UDC and UHC controllers. UVB is not an emulation
of the USB bus or protocol but a simplified service to connect
a virtual host controller to one or more virtual device
controllers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add common layer of UHC API and MAX3421E host controller driver.
This implements the bare minimum necessary to communicate with
one peripheral device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.
PM action handler is currently empty and will be fill out later.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Switch all imxrt boards to use the systick timer by default, and only
enable the GPT timer when using low power modes. This is desirable
because the systick has a higher resolution, but the GPT can run
while the core clock is gated, making it useful for low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Support for the measuring the CPU die temperature
for the ESP32 targets S2,C3. The ESP32 support
was ommited due to lack of offset calibration.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
In case of errors in the status register and to
unblock Flash, it is advised to clear the errors.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add a new API for drivers that can be called to initialize the regulator
at init time if `regulator-boot-on` or `regulator-always-on` are set.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
PCA9420 PMIC offers of multiple operation states, or DVS (Dynamic
Voltage Scaling). Such states may be automatically changed by hardware
using MODESEL0/1 pins. Certain MCUs allow to automatically configure
certain output pins when entering low power modes so that PMIC state is
changed without software intervention. This means that application just
needs to configure the voltages for each state using
`nxp,modeN-microvolt`, set `nxp,enable-modesel-pins` in devicetree and
forget about configuring regulators.
This patch introduces a new _parent_ API to expose such functionality in
a vendor agnostic way. Consider this API as experimental for now, until
we have other usecases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Most of devicetree properties for regulator, such as:
- regulator-min/max-microvolt
- regulator-min/max-microamp
- regulator-allowed-modes
- etc.
Are meant to specify limits on what consumers may set. They are **NOT**
meant to describe the hardware capabilities. For example, I could have a
BUCK converter that supports 0-5V output voltage, but my circuit may
only allow working on the 2.7-3.3V range.
This patch reworks the API so that the API class layer manages this
information. This is done by drivers collecting all such fields in a
common configuration structure that is later accessed by the class
layer. This simplifies drivers implementation. For example, if A
consumer calls regulator_set_voltage() with a voltage that is supported
but not allowed, driver code won't be called. Similarly, if a regulator
is configured to be `always-on`, enable/disable driver code will never
be called.
Drivers have been adjusted. PCA9420 mode settings have been removed from
devicetree in this commit as they are not actual modes but PMIC states.
This will be refactored in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Remove redundant comments
- Remove internal *_mode functions, as they were only used once.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define regulator mode as an opaque type, same as we do in other
subsystems like GPIO (e.g. gpio_flags_t).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Clarify the API for regulators that have the option to set mode
externally, such as PCA9420. Adjust the PCA9420 driver to comply with
the interface.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Function now returns error, value is obtained by reference. This
allows to propagate potential bus errors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Mode specific APIs repeat the same functionality offered by non-mode
specific APIs
- The same functionality can be achieved by the non-mode APIs, since
they apply to the active mode which can be set using
regulator_set_mode() first.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function can be implemented by using regulator_count_voltages() +
regulator_list_voltage(), so there's no need to defer the job to each
driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Rename to regulator_list_voltage (it is listing a single voltage)
- Function returns the value via a parameters, so that we can indicate
wether the given index is valid or not. If a driver doesn't implement
this call, function returns -EINVAL (as it should be).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The regulator_count_modes was an API that was not useful. Unlike with
voltages where the interface guarantees they are zero-indexed, modes can
take an arbitrary identifier. So counting supported modes doesn't
provide any useful information such as if a mode is allowed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Interface guarantees that voltage indices start from zero to
regulator_count_voltages()
- Function always return an unsigned number. If the device doesn't
implement the API returned value is zero, as expected.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In the case that IN endpoint is not busy there will be
no notification from the HAL driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The SBS fuel gauge driver did not return a count of the number of
properties that failed.
Fix this and add a test that verifies the sbs_gauge returns the number of
failing properties as well as a test that verifies a negative return code
if all properties failed.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
zephyr kernel header file should be included otherwise gcc will report
the warning: implicit declaration of function 'k_aligned_alloc' and
the return value of 'k_aligned_alloc' will be treated as an int type,
which will cause an error on the 64 bits platform.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
According to section 5.1.9.3.5 and 5.1.9.3.6 of the I3C Specification
v1.1.1. This CCC is may be optionally supported if the target device
has no settable limit.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Rename is_primary to is_secondary. The justification for this is
because it is less likely to have something configured to be
secondary, and the 0 value would be if it is primary.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Previously, a call to set the net_context state was added here to
accommodate a new KConfig scenario that permitted disabling offload
sockets. This code path is used by both local and offloaded sockets.
While it is necessary to update the state of the net_context for a
locally managed socket, setting the net_context for an offloaded socket
is an error, as the net_context is invalid (in fact, it points to a
hard-coded dummy socket), as observed in #52346 and #38544.
A prior commit (a9ac0a88) attempting to remedy the offload socket
scenario removed this line, which resulted in problems for the local
socket scenario. The socket never got updated to the connected state,
and thus was unusable.
Adding this guard allows the eswifi socket to set the socket net_context
only if the socket is NOT offloaded.
Signed-off-by: Brian Dunlay <brian@nubix.io>
In Infineon XMC4XXX SoCs, gpio interrupts are triggered via an
Event Request Unit (ERU) module. A subset of the gpios are
connected to the ERU. The ERU monitors edge triggers and creates
a SR.
This driver configures the ERU for a target port/pin combination
for rising/falling edge events. Note that the ERU module does
not generate SR based on the gpio level. Internally the ERU
tracks the *status* of an event. The status is set on a positive
edge and unset on a negative edge (or vice-versa depending on
the configuration). The value of the status is used to implement
a level triggered interrupt; The ISR checks the status flag and
calls the callback function if the status is set.
The ERU configurations for supported port/pin combinations are
stored in a devicetree file dts/arm/infineon/xmc4xxx_x_x-intc.dtsi.
The configurations are stored in the opaque array
uint16 port_line_mapping[].
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.
Enable nocache in each driver use it.
Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
Adds support for GD32 timer
Note: Currently, it is not supporting RISC-V(GD32V) devices.
It needs some work on the interrupt controller first.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The timer_ids contain timers that belong to any bus.
So, It should recognize with entire id, not only the CLOCK_ID_BIT part.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
DT_COMPAT_GET_ANY_STATUS_OKAY is not suited for the node's existing check.
(This macro returns the stem of the DTS macro name,
the stem part is not a defined symbol.)
Instead, it should use the DT_HAS_COMPAT_STATUS_OKAY macro.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change Summary:
Update Base addr to set direction to use Aligned IP base address instead
of Port Base Address. Port Base Address + offset to direction register
will set incorrect value for Port B,C & D. For ex: In cases when more than
1 port is configured on the same IP, the DTS node for port B will start
at offset 0xC. Calculating the port using Port Base will yield offset of
PORTB DIR register which is at offset 0x10 from Aligned Base, and as a
result will result in setting DIR register of PORTC instead.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Change Summary:
Moving the setting of Pin direction before setting/clearing the pin
configured as output for the change to correctly take place.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
For architectures that rely on a PCIe controller (for example, ARM64),
scanning the PCI space will only succeed after the controller has
initialized. Therefore, in the presence of PCIe controller, the PCIe
initialization is bumped to the next system init level.
In the past, drivers like ivshmem would do a late scan of the PCI space
in case the early scan failed; however, the cited commit removed this
feature and ivshmem fails for ARM64. This commit fix this by making the
early scan succeed.
Fixes: a96016d747 ("drivers: ivshmem: Remove unnecessary BDF lookup ...")
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Only include the MSI header when ivshmem-doorbell is employed, as the
ivshmem data structures already use the same protection for msi-related
structures.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
The ivshmem code does not use any platform-specific code; therefore,
remove the dependency to the soc interface.
No functional change intended.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Add a Kconfig option allowing users to configure the transfer timeout
value, as the default 500 ms may not be sufficient in specific cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In multi-image environment, after jump to the image we can have UART in
unexpected state. Reset UART to default state to make sure that UART is
initialized properly and won't cause system to crash or hang.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
In multi-image environment, after jump to the image we can have running
timer with interrupts enabled. If interrupt is triggered, the asserts
in the driver can cause a crash.
This patch also adds 'resets' property for all timer nodes.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
To deassert reset in STM32MP1 RCC the driver needs to set the bit in
reset clear register.
This patch extends existing implementation to support this type of
register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This driver exposes STM32 RCC reset functionality through reset API.
Information about RCC register offset and bit is encoded just like GD32.
The first 5 least significant bits contains register bit number.
Next 12 bits are used to keep RCC register offset. Remaining bits are
unused.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.
Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.
Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The poll_in function of the NuMicro UART driver was using the UART_Read
function from the Nuvoton HAL, which is blocking. Replace it with a
non-blocking implementation.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The USB_DC_STM32 help message started to miss some
STM32 MCU families. Overtime, the message will
get bigger if we continue to list family names.
Removed family names to simplify the message and
avoid periodic modifications.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.
Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
STM32 counter driver uses switch statement in which cases don't end
with break or return intentionally.
Affected switches in counter driver check status of all timer channels
(maximum 4 channels), but the number of channels is not determined
during compilation. In switch, we jump to channel with highest number
and then check other channels with lower numbers.
Compiler can warn about it, so this patch adds information that it was
intentional.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
NXP LPUART IP supports rs485 mode when transceiver driver enable
using RTS. Allow setting rs485 mode up via the "nxp,rs485-mode"
dts property. "nxp,rs485-de-active-low" dts property can be used
for set RTS polarity.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
The HSI48 is enabled by clock control driver.
It is no more done by each driver that requires this clock
However when using rng or sdmmc or bluetooth/ipm or usb,
the HSI48 clock must be present in the DTS.
Add a warning for this particular check but keep the deprecated
HSI48 clock enable : keeping for legacy but to remove later.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 devices that have a HSI48 clock,
the driver enables it, like any other fixed clock,
if needed and supported by the serie.
For stm32L0, SYSCFG VREFINT is also required.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for get_config and get_direction functions
for the nct38xx IO expander family.
Also applies the clang-format changes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit fixes the comment and adds the missing assignment of
return value from i2c read byte command in the nct38xx driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
- Similar to what was done for other parts of the driver, remove any
register specification from Devicetree (modesel-reg/mask)
- Keep all the information in the driver, and define modes as "numbers",
e.g. PCA9420_MODE0: 0, PCA9420_MODE1: 1, etc.
- Bindings provide IC defaults now (all modes allowed 0/1/2/3 and
initial mode set to 0).
- When mode is controlled via the MODESEL0/1 pins (ie directly by an iMX
MCU using the dedicated PMIC_MODE0/1 pins), the driver will not allow
to select a mode (it is not possible). This mode is now enabled by
setting `nxp,enable-modesel-pins` in Devicetree. When enabled, all the
allowed modes are configured to be selectable via pins. When disabled,
mode can be set via I2C (using TOP_CNTL3 MODE0/1_I2C fields)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Now, multiple tx buffers can be used to send packets,
so that the packet size can exceed tx buffer size.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
STM32H7X and STM32F4X ETH HAL Drivers now provide a new api.
This commit only adds a new Kconfig option
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
The transmit mutex is not needed while checking the packet size,
so we acquire the lock after checking the size and
return early if it is too big.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
It is possible for nrfx usbd driver to send NRFX_USBBD_EP_ABORTED during
endpoint disable. The event is passed to event handler registered with
nrfx_usbd_init(). The nrfx_usbd_uninit() removes the registered event
handler, replacing it with NULL. If any event is sent after uninit, the
NULL pointer is executed and device crashes.
Do not uninit nrfx usbd driver on detach so it is possible for the
usb_disable() to disable all the endpoints.
Fixes: 460ca86527 ("drivers: usb_dc_nrfx: Always allow endpoint disable")
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Depending on the timing of the edges of the signal to be captured, a timer
overflow interrupt flag may appear in the same ISR as a channel event (1st
or 2nd edge capture complete) flag. Change the timer overflow math to
compensate the timer overflow count based on whether the channel event
happened before or after the overflow flag occured.
For continuous PWM period captures, only the very first edge of the first
period requires an interrupt to be captured. Subsequent "first edges" are
the same edges as the second edge of the previous period. Depending on the
timing of the captured signal, enabling the 1st edge interrupt in this case
can cause the overflow count for subsequent first edges to be captured at
the wrong point in time.
Fixes: #52452
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
AST10x0 series SOCs provide the reset controller through the syscon
hardware block. The current driver supports the reset line assert,
deassert and status for the hardware IPs embedded in the SOC. Each
reset line has an ID that can simply map to a bit in syscon registers
RESET_CTRL0_ASSERT (group 0) or RESET_CTRL1_ASSERT (group 1). Write bits
to RESET_CTRL0_DEASSERT or RESET_CTRL1_DEASSERT will clean the
corresponding bits in RESET_CTRL0_ASSERT or RESET_CTRL1_ASSERT
registers.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Enable the PSA RNG driver by default. This option
will only be enabled when BUILD_WITH_TFM is enabled
and a device with the required compatible field
(zephyr,psa-crypto-rng) is defined in the device tree.
When a vendor includes such a device and enables the
ENTROPY_GENERATOR subsystem it is fair to assume
that wants to use the PSA Crypto RNG driver.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Add support for regulator mode related APIs to regulator shell, so that
the user can select new operation modes for the regulator and configure
target voltages
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Cleanup regulator shell to use strtol() over atoi(), as strtol features
error detection. Remove device_is_ready() checks, and replace them with
NULL checks as device_get_binding() calls device_is_ready() interally
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C API already provides APIs to read/modify registers, so there is
no need to provide custom wrappers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
HAL events were also used for the shim driver's concerns
during the prototyping of API. Fix it now and use specific
shim driver events. That also allows new transfers to be
triggered from a single point.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add new USB device controller API and nRF USBD controller driver.
The new UDC API brings support for multiple instances and asynchronous
transfer model, transfers use net_buf and store methadata in the
user data area.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Set the inverted value of pixel format setting in MADCTL register to
current_pixel_format in display capabilities structure
if rgb-is-inverted enabled.
This make enables support for a module that mismatches the RGB setting
in the MADCTL register and the actual display color format.
(Such as Longan Nano built-in LCD module.)
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implement a LED driver for Microchip XEC using the breathing,
blinking LED controller. The driver supports LED on, off, and
blink API's. The BBLED block uses the 32768 Hz clock domain
allowing the module to operate in light and deep sleep states.
Blink frequency is 32768 divided by 256 * (prescale + 1) where
prescale is a 12-bit value. Duty cycle is specified by an 8-bit
value where 0 = full off, 127 is 50%, and 255 is full on.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The cache operations must be quick, optimized and possibly inlined. The
current API is clunky, functions are not inlined and passing parameters
around that are basically always known at compile time.
In this patch we rework the cache functions to allow us to get rid of
useless parameters and make inlining easier.
In particular this changeset is doing three things:
1. `CONFIG_HAS_ARCH_CACHE` is now `CONFIG_ARCH_CACHE` and
`CONFIG_HAS_EXTERNAL_CACHE` is now `CONFIG_EXTERNAL_CACHE`
2. The cache API has been reworked.
3. Comments are added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Re-enable the CAAM for entropy
now that the HAL driver has been fixed
Job descriptors must be accessed coherently
between CAAM DMA and core.
The M4 Cores still do not work
because of mpu/cache/kconfig arch complications,
disable caam for M4 cores in DTS
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When pwm_it8xxx2_set_cycles() is called, we disable the pwm clock
at the beginning and enable it at the end, so there is a more than
1ms pwm low pulse when every time changing the cycle. The low pulse
would let some fans go to idle mode, so we don't gate the pwm clock.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Enable Zephyr device runtime power management mechanisms in Intel DMIC
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch contains several small changes to the intel adsp power
domain.
- include missing header,
- replacing sys_write32/sys_read32 with sys_write16/sys_read16 since
DfPWRCTL is a 16 bit register,
- renaming struct to be more representing what it is,
- passing register address, not a value to the sys_read/sys_write
functions,
- pd_intel_adsp_init is now returning actual status.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
While diagnosing a problem on the STM32U585 in this function in
flash_stm32l5_u5.c, I had difficulty sussing out the flow of the
function and conditional logic.
This refactor seeks to improve clarity through a simplified flow control
using an early return to short circuit logic on subsequent calls to the
function and slightly more thorough comments.
Tested using tests/drivers/flash on the b_u585i_iot02a and in a
proprietary application and board which uses the STM32U585 and littlefs.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
In flash_stm32_page_layout, the FLASH_PAGE_NB macro is used to set the
page count in the flash layout returned to the caller. On STM32L5
platforms this is defined in stm32l5xx_hal_flash.h to be (FLASH_SIZE /
FLASH_PAGE_SIZE). However, on STM32U5 platforms the macro is defined in
the soc headers (such as stm32u585xx.h) define the macro as
(FLASH_BANK_SIZE / FLASH_PAGE_SIZE). This results in the flash layout
only reflecting the first bank on STM32U5 platforms with the maximum 2
MB of flash.
This commit resolves this discrepancy by directly calculating the number
of pages by dividing FLASH_SIZE by FLASH_PAGE_SIZE.
Tested on a proprietary board using the STM32U585 which mounts a
littlefs partition in the last 256 kB of its 2 MB of flash.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Drop the async enable function. This feature is rarely/never used,
complicates driver design, and doesn't really follow the sync/async API
design/naming used in other areas. In the future we can introduce
regulator_enable_async if needed, with support from the driver class (no
onoff). Note that drivers like PCA9420 did not implement any
asynchronous behavior. regulator-fixed implemented in the past
asynchronous behavior using work queues, an overkill for most GPIO
driven regulators. Let's keep things simple for now and extend the API
when needed, based on specific usecases.
In the current implementation, reference counting is managed by the
driver class. \isr-ok attribute is dropped, since calls are potentially
blocking. Note that drivers like PCA9420 already violated such rule.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove regulator-fixed-sync specialization, create a single driver that
is always synchronous. The asynchronous part is rarely/never used, so
let's keep things simple for now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not set wifi optimizations by default in order
to free up IRAM room region. In case higher throutput
is necessary, one can enable this flags to optmize it.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Microchip XEC GPIO pins support inverting the output of
alternate pin functions. This feature may be useful for
those peripherals that do not implement output inversion
in the peripheral. GPIO control register pad input and
parallel input register values are not affected by the
function output invert feature. GPIO interrupt detection
of an output is inverted if the invert polarity is enabled.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.
Fixes#51177
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.
Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
add Intel HDA DAI driver
Long device list in dtsi needs to be refactored in the future
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Remapping by default can confuse things that dynamically manage RAM,
such as newlib heap - since unused memory will be powered off by
default. So this patch shields this behaviour behind a non-default
Kconfig.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
pca9420_i2c.h has neem remamed to pca9420.h (device only has I2C, so
it's kind of redundant to have i2c in the header name).
pmic_i2c.h was again not generic but designed specifically for PCA9420.
All its macros have been renamed, s/PMIC/PCA9420, and moved to the
pca9420.h header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Store all common configuration settings in the parent device. This
change should save ROM, since it avoids duplication.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver had a conceptual issue regarding current limitation. PCA9420
is able to limit the current flowing through VIN, ie input current. This
is a global setting, not individual to each regulator. This patch
creates a new DT property: nxp,vin-ilim-microamp to specify such limit.
It is applied when the device is initialized.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Voltage ranges were hardcoded in Devicetree, however, things can be
significantly simplified by using the recently introduce linear ranges
API. All values are now computed using information stored in the driver,
so there is no need to store any lookup table in ROM. Code should now
both be faster in average and consume less ROM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Regulator registers were set for each BUCK/LDO in DT, likely because of
the way the devices were instantiated. When using a generic iterator,
ie, DT_INST_FOREACH_CHILD, there's no way to differentiate the child
being _parsed_. Since instantiation happens now based on child node
names, we are able to know which registers each devices gets assigned at
the driver level. This greatly simplifies Devicetree, and it actually
removes information that is not strictly hardware description from it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Right now the PCA9420 driver instantiates by iterating over all
children. This is somewhat problematic, for a few reasons:
- Since instantiation is generic code, we're forced to put internal
details on Devicetree, e.g. reg-masks. After this change, this will no
longer be necessary.
- We take all children, regardless of what is defined in DT.
While we have no means to validate Devicetree node names as in Linux
dtschema, this approach allows us to have per-child specific
initialization code. This is somewhat similar to the Linux approach.
Note: nodelabels have been removed, since they were not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
DT_PROP() will evaluate to 0 when a boolean property is missing, so
there is no need to use DT_PROP_OR(..., false). Using _OR also has
side-effects, such as no errors when property is not defined in the
bindings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- voltage/current needs to be stored using int32_t
- reg_val is a 8-bit unsigned register value
- Also removed __packet, it is not required here
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename some internal structures/functions to clearly indicate they
belong to the PCA9420 driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Constify configuration and curr. limits/voltage range/modes arrays
- Use common argument names: node_id, inst to make code more readable
- Improve macro names to make things clear
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unlocking CR at the end of initialization was added in commit
a9183cd518. It was probably copied
from previous flash driver implementation.
Unlocking and locking CR in write and erase functions was added in
commit 6e4cdb0c99. Since we always unlock
the register before writing or erasing, and lock it after the operation
is finished, there is no need to unlock it after initialization.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This fixes an issue with periodic_start feature that is only
present in newest dmic hw (starting from ACE).
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Though at the moment the driver works with high registers initialized
to zeroes it does make sense to do it right way. The double 16 shifts
are used to suppress warnings with 32 bit shift.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In npcx ec series, two detection levels, 3.3V (default) and 1.8V are
supported during gpio configuration. But the current implementation
always selects default detection level whether NPCX_GPIO_VOLTAGE_1P8 is
set. This PR is a fix for this issue.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Previously, while writing close to the start of flash (i.e: in the first
row), the write was never committed - due to zero being used as the
"empty buffer" marker.
This patch also incorporates some performance improvements, as well as
observing any errors reported by `flash_sam0_commit()`.
Fixes#52309
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs.
The pins can be used for USB-C operations e.g. handling FRS, but they
can also work as usual GPIOs.
Add a driver for the RT1718S GPIO and a handler for an alert signal from
the chip. The handler reads the alert register once asserted and calls
the GPIO interrupt handler if needed(Vendor-defined alert).
gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties
and data for all RS1718S functionalities. The file can be extended for
TCPC driver. rt1718s.h file also defines inline functions with i2c
operations common for all drivers. The common header and source files
can be moved to tcpc directories once the tcpc driver is added since it
is the main functionality.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This change fixes a regression from commit 1cbc0acd.
Socket offload uses a dummy socket context, and setting
the socket state in this dummy context is invalid.
Fixes#52317
Signed-off-by: Brian Dunlay <brian@nubix.io>
Add drdy_pulsed property in Device Tree in order to select how
data ready irq should behave (either pulsed or latched mode).
Moreover change/fix the API called to set drdy irq mode.
(fix#51944)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The stm32_clock_control_init is needed for implementation of custom
pm_state_exit_post_ops.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
