Add a function to compute the clock48 from the clock tree
of a stm32f412/f413 mcu. The value depends on its clock source
Requires to identify the PLL source HSE or HSI.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the configuration of the PLL Q divider of main PLL
and I2S_Q of the PLLI2S toset the PLL48MHz clock which feeds
the USB, SDMMC, RNG through the RCC_DCKCFGR2 register.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Make sure that channels are inactive before releasing them.
This way, there won't be any leftover interrupts needed to be
handled when disabling IRQs.
This patch introduces a new state: CHAN_STATE_RELEASING. This is mostly
useful for the per-channel PD support in which the ISR needs to check
that the channel PD is enabled before attempting to access its register
space.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Commit 48b98a9284 ("drivers: dma: dma_nxp_edma: disable IRQs when
not needed") moved the IRQ enable operation to edma_start() and added
an IRQ disable operation in edma_stop(). This is wrong because it breaks
the DMA API contract w.r.t dma_start() being `isr-ok` on imx8qm/imx8qxp.
As such, move the IRQ enable and disable operations in
dma_request_channel() and dma_release_channel().
Note1: managing the interrupts like this is only really needed when
dealing with interrupt controllers that have a power domain associated
with it (which is the case for irqstr on imx8qm/imx8qxp).
Note2: Zephyr has no reference count for shared interrupts so disabling
a shared interrupt without checking if someone else is using it is
dangerous.
Based on the aforementioned notes, the irq_disable() operation is only
performed if irqstr is used as an interrupt controller (which is only
the case for imx8qm/imx8qxp). Otherwise, the operation isn't needed.
Fixes#80573.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The channel state transitions are currently performed at the
beginning of each of the functions that triggers them
(e.g: edma_start(), edma_stop(), etc...). The main issue with
this approach is the fact if there's any failures after the state
transition then the channel will be in the target state without
performing the required steps for it.
For instance, during edma_config(), if any of the functions after
the state transition (the channel_change_state() call) fails
(e.g: get_transfer_type()) fails then the state of the channel
will be CONFIGURED even if not all the required steps were performed
(e.g: setting the MUX, configuring the transfer, etc...).
To fix this, split the state transition into two steps:
1) Check if the transition is possible.
2) Do the transition.
First step should be done before any configurations to make sure
that we should be performing them in the first place, while the
second step should be performed after all configurations, thus
guaranteeing that all the required steps for the target state were
performed before transitioning to it.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The Microchip CAP12xx series are available in 3, 6 or 8 channel versions.
Co-authored-by: Benjamin Cabé <kartben@gmail.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Implement the zero latency interrupt safe APIs to the HFXO clock
commonly used by the bluetooth stach from zero latency interrupt
context.
Co-authored-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Adds driver support for the charge enable (ce) gpio. This GPIO is
optional and if no GPIO is allocated the pin is assumed to be asserted.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
The ADC_ADS1X1X_TRIGGER macro was defined without an explicit value,
preventing ALERT/RDY pin configuration even when alert_rdy_gpios
were properly defined in devicetree. This occurred because
the IF_ENABLED macro specifically requires macros to be defined as 1,
not just defined empty.
Fixed this by explicitly defining ADC_ADS1X1X_TRIGGER as 1 when
alert_rdy_gpios properties are present in devicetree.
Signed-off-by: Benjamin Geiger <BenjaminGeiger1@gmail.com>
This commit fixes a shared context between multiple instances of the
INA230 and INA236 driver. The issue is the naming of the instance data in
`INA230_DRIVER_INIT` macro when we have one instance of INA230 and one
of INA236 the name of the data variable will be `drv_data_0`. This
variable will then be passed to both instances.
Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
Add a driver for the Nintendo Nunchuk, accessed through the I2C bus.
This driver only supports the joystick and the buttons, not the
accelerometer.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
Do not allow enqueuing buffers on endpoints that were not enabled. Doing
so can lead to division by zero later on because the max packet size can
be 0 in disabled endpoint configuration.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
It may be required to get information if NRF LF clock control calibration
is in progress. Some time sensitive operations could benefit from this
information.
The commit adds simple function that provides the information.
The function is nRF platform specific.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
VPR address was obtained from the child instance, however, the child
nodes address is purely an index within the VPR node. The VPR address
needs to be obtained from the parent.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update init function so APPCPU could not altere the clock setup.
Fix build in case if no inter-cpu module is selected.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This is the initial commit to support UART driver for Renesas RZ/G3S.
The driver only implements polling API for minimal support.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
This is the initial commit to support pinctrl driver for Renesas RZ/G3S
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
This commit introduces support for the I3C driver on STM32, enabling
functionality APIs for I3C controllers.
Signed-off-by: Mohammad Badawi <zephyr@exalt.ps>
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Add set_ctrl function API for vertical and horizontal flip control
modifying the camera read mode
Signed-off-by: Jeronimo Agullo <jeronimoagullo97@gmail.com>
Raise the poll signal when the socket is being closed to prevent users
of `zsock_poll` blocking after the socket is no more.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add cancel action wait ops to cancel remain on channel after TX on
specific channel, in case we need to remain on another channel later.
Signed-off-by: Fengming Ye <frank.ye@nxp.com>
LJ packages have 16 ADC channels vs 8 for SZ packages. Enhance
devicetree to account for this as well as conditional defines/code.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
This patch refactors the power management initialization for the Intel
ADSP GPDMA driver. The changes include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the `intel_adsp_gpdma_init`
function.
2. Ensuring that the GPDMA driver is initialized with the appropriate
power management state and that runtime power management is
automatically enabled based on the device tree configuration.
These changes streamline the power management initialization process and
ensure consistency with other drivers.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch refactors the power management initialization for the SSP
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the `ssp_init` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the SSP nodes
in the device tree files for ACE15, ACE20, and ACE30.
3. Moving the power domain assignment for the SSP device in the device
tree. The previous configuration resulted in the device not being under
any power domain and being initialized as always ON.
These changes ensure that the SSP driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch refactors the power management initialization for the DMIC
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the
`dai_dmic_initialize_device` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the DMIC nodes
in the device tree files for ACE15, ACE20, and ACE30.
These changes ensure that the DMIC driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses the issue of invalid initialization sequence and
the use of registers in `dma_config` before the device is fully
initialized in the Intel ADSP HDA DMA driver.
Changes include:
1. Moving the `intel_adsp_hda_channels_init` call to the
`intel_adsp_hda_dma_init` function to ensure that channels are
initialized during device initialization.
2. Removing the redundant call to `intel_adsp_hda_channels_init` from
the `PM_DEVICE_ACTION_RESUME` case in the
`intel_adsp_hda_dma_pm_action` function.
These changes ensure that the device and its channels are properly
initialized before any DMA configuration is performed, preventing access
to hardware registers before the device is ready.
**Note:** This is a proposed solution, and a different approach should
be considered. Currently, we are accessing registers before the device
and power domain are fully powered up. This solution likely works
because the DMA is used to load firmware during the boot process, and
the necessary power domains are already powered up. Further
investigation and a more robust solution are recommended to ensure
proper initialization and power management.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses several issues with the Intel ADSP HDA DMA driver:
1. Refactors the HDA DMA power management initialization. The previous
use of `pm_device_runtime_enable` was incorrect. The updated approach
relies on enabling runtime power management through the device tree
using the `zephyr,pm-device-runtime-auto` property. Additionally, the
patch removes redundant device initialization steps as these are already
handled by `pm_device_driver_init` when the device is under a power
domain.
2. Corrects the power domain assignment for the HDA link. The HDA link
was previously assigned to the io0 power domain based on a
misinterpretation of the documentation. The correct power domain
assignment is now based on updated documentation for LNL, ensuring that
the HDA link is associated with the appropriate power domain.
These changes ensure that the HDA DMA driver properly manages power
states, reducing power consumption and improving system stability, while
ensuring the correct power domains are used.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses the following issues with the Intel HDA DAI driver:
1. Adds power management support for the HDA DAI driver by implementing
the `hda_pm_action` function and integrating it with the Zephyr power
management framework.
2. Ensures balanced calls to `pm_device_runtime_get` and
`pm_device_runtime_put` by modifying the `probe` and `remove`
functions to use these power management calls.
3. Ensures that the io0 power domain is active when the HD Audio is in
use by assigning the correct power domain to the HDA DAI devices in
the device tree files for various Intel ADSP platforms (ace15_mtpm,
ace20_lnl, ace30, ace30_ptl).
4. Enables runtime power management for the HDA DAI devices by adding
the `zephyr,pm-device-runtime-auto` property in the device tree.
These changes ensure that the HDA DAI driver properly manages power
states, reducing power consumption and improving system stability, while
ensuring the io0 power domain is active when required.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Compilation will fail if multiple models are used at the same time.
Changing to define different unique names for the symbols
to avoid conflicts.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The lsm6dso driver does not correctly reflect the status of
the node in dt. So the driver didn't compile even if
`st,lsm6dso32` node exists.
I fixed it to correctly go through ithe compile.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
