Use the mipi_dbi_configure_te API within the st7796s display driver.
If the MIPI DBI controller supports the tearing enable signal, then
configure the ST7796S to output the TE line signal.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for the mipi_dbi_configure_te API within the NXP LCDIC
peripheral. Also, remove a redundant code patch in the write_command
function that was previously used to determine when the display driver
was writing to graphics RAM, as these writes should now be performed
using the mipi_dbi_write_display API.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rename "nxp,kinetis-lpuart" compatible to "nxp,lpuart" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Introduce new binding "st,stm32u5-otghs-phy" for OTG_HS PHY. This allows to
configure clock source and handle STM32U5 specific OTG_HS PHY behavior in
driver implementation in a more readable way.
Move OTG_HS PHY clock selection (previously <&rcc STM32_SRC_HSI48
ICKLK_SEL(0)>) from OTG_HS node to OTG_HS PHY node.
Rename USBPHYC_SEL -> OTGHS_SEL which matches the definition in the stm32u5
CCIPR2 register (RM0456 Rev 5, Section 11.8.47).
Support enabling OTG_HS PHY clock, which is bit 15 (OTGHSPHYEN) in
RCC_AHB2ENR1. Change OTG_HS clock to be bit 14 (OTGEN).
Calculate in runtime OTG_HS PHY clock source frequency. Try to match that
to supported (16, 19.2, 20, 24, 26, 32 MHz) frequencies and select proper
option with HAL_SYSCFG_SetOTGPHYReferenceClockSelection() API (instead of
hardcoded 16 MHz selection).
Co-authored-by: Adrian Chadd <adrian.chadd@meta.com>
Signed-off-by: Adrian Chadd <adrian.chadd@meta.com>
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Support specifying divided clock buses by introduction of
STM32_CLOCK_DIV(div) macro. This macro can be used in devicetree to define
clock source of peripherals.
HSE is selected in devicetree using:
<&rcc STM32_SRC_HSE ...>;
HSE/2 can now be selected with:
<&rcc (STM32_SRC_HSE | STM32_CLOCK_DIV(2)) ...>;
This allows to use clock_control_get_rate() API in peripherals in order to
get desired clock rate.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
in the switch case in the preceeding for loop if default path is taken
all the time, then the ret variable will stay uninitialized, the original
contributor of this driver has provided a comment that this path shall
never be reached, however, it is better to return an error code instead
of continuing with an incorrect configuration, hence this commit replaces
continue with a proper return errno.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
for the brevity renaming direction_gpios to dir_gpios since STEP/DIR
interface is quite an established term in context of stepper controllers.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
The current implementation of tmc2209 driver does not allow instantiation
of the driver without configuring msx pins.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
The SD physical layer specification requires that the operating supply
be stable for at least 1 millisecond before providing the required 74
clocks. The maximum VDD ramp time is specified at 35ms, giving a total
minimum delay of 36ms.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This PR fixes a blocking call to video_buffer_alloc in case of memory
shortage by addign a timeout parameter to the API.
Signed-off-by: Armin Kessler <ake@espros.com>
Added support for SPI in 4-wire and 3-wire configurations to
the Infineon AIROC WiFi driver (drivers/wifi/infineon).
Review changes:
Move DT_DRV_COMPAT to common header file
Correct board-specific preprocessor lines
Removed AIROC_MAP_COUNTRY_CODE
Move Pico W configuration details to devicetree
Use pinctrl to manage shared data/interrupt GPIO
Clean up bus selection in Kconfig.airoc
Make SDIO and SPI bus struct independent
Replace LOG_DBG with LOG_ERR
Remove functionally duplicate operation
Remove spurious Kconfig option
Minor cleanup in CMakeLists.txt
Signed-off-by: Steve Boylan <stephen.boylan@beechwoods.com>
This PR adds support for LAN9250 spi ethernet controller.
This driver is tested on the Mikroe ETH Click 3
https://www.mikroe.com/eth-3-click
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Add support for optimized short log messages (aka turbo logs). They are
supported on cpuapp and co-processors owned by cpuapp (FLPR and PPR).
In general, it can be supported if cpuapp has access to logging strings
used for the log message. Currently mode is supported only in standalone
logging. When it is extended for dictionary logging then it will also
be supported on other cores (e.g. cpurad).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
entropy_nrf5 modules uses k_sem_xxx() functions in several
places, but these functions are only functional when
CONFIG_MULTITHREADING is set, otherwise they just fallback to
the empty weak implementation provided in
zephyr/lib/libc/armstdc/src/threading_weak.c.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
mcux_rnga driver calls k_cycle_get_32() which is not available
if CONFIG_SYS_CLOCK_EXISTS is not defined. Therefore we add
this depedendency to CONFIG_ENTROPY_MCUX_RNGA.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Automatically enable ENTROPY_GENERATOR if the device-tree has
any "zephyr,entropy" chosen property specified. This helps
in having CONFIG_ENTROPY_HAS_DRIVER set if the platform support
an entropy driver and this then enables CONFIG_CSPRNG_ENABLED.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Now that we enable `HAS_BT_CTLR` we should also declare which optional
features are supported. For now, we only add the features that are
available through the current driver init routine and found on all
supported platforms.
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
The tcpc_get_status_register function was using int32_t for the status
parameter, while the other related functions used uint32_t. This change
unifies the data type across all related functions to uint32_t for
consistency and clarity.
Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
When fast UARTE instance is used (e.g. UARTE120 in nrf54h20), PM actions
are not ISR safe because they include communication over IPC so they can
only be called from the thread context. Extend driver to support both
PM modes. When non ISR mode is used then uart_rx_enable() and uart_tx()
will return error if they are called from ISR and resume operation
would need to be called because device is suspended. On completion,
driver is calling pm_device_runtime_put_async which can be called from
the ISR context.
Additionally, suspending in the TXSTOPPED and RXTO events has been
moved after user callback. It allows to support the case where
uart_rx_enable() or uart_tx() are called from that callback context.
Since suspending is called after returning from the callback it will
not trigger suspend action because API called in the callback context
will increment the usage counter (when pm_device_runtime_get() is
called).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Extends the MIPI DBI SPI driver class for operating mode C4, SPI 4-wire,
with 16 write clocks to send one or multiple byte for commands. Generic
data (e.g. GRAM) aligned to 16-bit are passed through and stuffed with
bytes if required.
Signed-off-by: Stephan Linz <linz@li-pro.net>
The more complex the SPI transfer algorithms become, the more
confusing the current implementation of the SPI write function
becomes. Furthermore, if further as yet unknown MIPI DBI modes
are to be supported, the scope of this implementation would
increase dramatically. With the splitting now introduced, the
existing SPI transfer algorithms are moved to individual
auxiliary functions and the SPI write function only focus on
the decision of the respective MIPI DBI mode and the device
lock/unlock.
Signed-off-by: Stephan Linz <linz@li-pro.net>
The more complex the SPI transfer algorithms become, the more
confusing the current implementation of the SPI command read
function becomes. Furthermore, if further as yet unknown MIPI
DBI modes are to be supported, the scope of this implementation
would increase dramatically. With the splitting now introduced,
the existing SPI transfer algorithms are moved to individual
auxiliary functions and the SPI read function only focus on
the decision of the respective MIPI DBI mode and the device
lock/unlock.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Implement the readout protection for the STM32H7 series.
Define the specific functions used by the flash_stm32h7.
Move the stm32h7 flash register manipulation in a write_optb()
to be called by the flash_stm32_set_rdp_level.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Place the flash_stm32_sem_take and flash_stm32_sem_give
function to header file for common to use in any flash driver
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Check the return value of gpio_add_callback() in the display init
function, to resolve an issue flagged by static analysis.
Fixes#81921
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
"wlen" variable set to return value of mipi_dsi_transfer should be a
ssize_t type, so that if a negative value is returned the error will be
caught and returned.
Fixes#81929
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix dead code within the set_pixel_format() function for the RM67162.
This function should set the relevant data fields for the driver, then
send the MIPI DCS command to change pixel format.
Fixes#81945
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
BLE public address assignment shall be done only when
CONFIG_BT_HCI_RAW is not enabled.
Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
On the interrupt handling, one thread per driver instance is involved
into monitoring the semaphor, sends inside the gpio callback triggered
by the gpio interrupt. Each time, when the link parameters are change,
the DM8806 is generating the gpio interrupt. After getting semaphor,
the application callback function which was linked during initialization
process is called to get the new link parameters with standard API
calls
Signed-off-by: Robert Slawinski <robert.slawinski1@gmail.com>
New driver for Davicom DM8806 PHY. Driver is using standar mdio API
to manage the DM8806 switch controller. Register access needs the
PHY addres or switch address to be one of five possible values, since
DM8806 has built-in five PHY's. These values should be defined in the
application .dts file. One DM8806 ethernet port must corresponds with
one ethernet PHY node with two properties for ethernet port: one for
PHY address and one for switch address - <reg> for register access from
Internal PHY Register area and <reg-switch> for register access from
Switch Per-Port Registers area. Device tree example below:
example device-tree:
dm8806_phy: ethernet-phy@0 {
reg = <2>;
reg-switch = <8>;
compatible = "davicom,dm8806-phy";
status = "okay";
davicom,interface-type = "rmii";
reset-gpio = <&gpiod 2 GPIO_ACTIVE_LOW>;
interrupt-gpio = <&gpioc 1 GPIO_ACTIVE_HIGH>;
};
Signed-off-by: Robert Slawinski <robert.slawinski1@gmail.com>
Adds a step direction binding that can be used with any stepper that
implements said control interface to cut down on boilerplate code.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
There were code paths that could have lead to divide by zero given an
invalid scale setting for accel or gyro. In practice this should be an
invalid setup even before getting to these conversion functions. The
conversion functions now better show all valid values are accounted for
by using CODE_UNREACHABLE in the default case.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
Now that the U5 HAL contains the dedicated LDO status function, use it
instead of reading the register directly.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
New HAL update changed the prototype of the check DMA flag functions.
H7 and U0 use a const parameter for these functions.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
On NXP RT1170 SOC, ADC ETC exists but it can not be enabled because
of dependency on HAS_MCUX_ADC_ETC.
Also, ADC ETC should only work with ADC together, there is no use
case to run it standalone.
Fixes:#81466
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
If CONFIG_SPI_STATS is enabled, the device state for all SPI controller
drivers must contain the SPI stats. This space is allocated by calling
Z_SPI_INIT_FN as part of the device definition; this is done automatically
when using SPI_DEVICE_DT_DEFINE instead of DEVICE_DT_DEFINE. If space for
statistics is not properly allocated but CONFIG_SPI_STATS is enabled, an
unexpected write to memory outside of the stats region may occur on a SPI
transfer. This commit uses SPI_DEVICE_DT_DEFINE or
SPI_DEVICE_DT_INST_DEFINE for all in-tree SPI controller drivers.
Signed-off-by: Dane Wagner <dane.wagner@gmail.com>
Rename "nxp,kinetis-dspi" compatible to "nxp,dspi" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The FlexSPI NOR driver should verify all 3 bytes of the JEDEC ID match
the expected value before attempting to use a custom LUT table with a
flash chip. This reduces the odds that an incompatible LUT will be used
with a flash chip, as some flash chips may share the same first byte of
their device ID but not be compatible with the custom LUT table.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
