Commit graph

28,390 commits

Author SHA1 Message Date
Josuah Demangeon
1b87ec87ef style: drivers: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in drivers/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Seppo Takalo
aee2604d37 drivers: modem: Implement support for DTR signal
DTR signal on UART extends the power saving by allowing host
to indicate the remote end that the UART is not in active state.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-17 09:21:45 -05:00
Alberto Escolar Piedras
8020428e2a drivers timer: native_sim_timer: Remove deprecated kconfig option
This driver was renamed in
078fef4ab5c5f8ff993a774778588a50794b886a
And with it the old kconfig option was deprecated for 4.2.
Let's remove this option now

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Pieter De Gendt
85b578c087 drivers: syscon: Add shell commands
Add shell commands to use the SYSCON driver API with SYSCON devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-17 09:19:46 -05:00
Chaitanya Tata
de09399fa2 drivers: nrf_wifi: Fix nRF71 build
nRF71 uses a different data structure.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-17 09:18:38 -05:00
Chaitanya Tata
6476790987 drivers: wifi: nrf_wifi: Implement stats type
Pass the stats type to the new API.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-17 09:18:38 -05:00
Jerzy Kasenberg
843ba7149a tests: arch: arm_irq_vector_table: Update to run on smartbond
Update the custom vector table to have timer2_isr that
is used for kernel system timer.

While test passes test immediate crashes afterwards due to
missing handler for non-SysTick interrupt.

Now custom interrupt table has additional interrupt handler
to prevent crash.
timer2_isr is no longer static that should not result in
any conflict.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-17 09:16:14 -05:00
Pete Johanson
9a55353216 drivers: serial: Apply TX AE interrupt workaround on MAX32655
The workaround for missing the almost-empty interrupt when TX of very small
payloads needs to also be applied for the UART on MAX32655, so default on
that workaround symbol on that target.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-11-17 09:15:36 -05:00
cyliang tw
5973b553ed drivers: hwinfo: generalize the numaker config
Modify the numaker configuration to make it more general
instead of depending on specific SoC.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-11-17 09:28:26 +02:00
Hongbo Wang
e88a5310a4 drivers: eth: phy: add Motorcomm YT8521 PHY driver
Add PHY driver for Motorcomm YT8521 which is used on FRDM_IMX93 board.

Signed-off-by: Hongbo Wang <hongbo.wang@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2025-11-17 09:28:15 +02:00
Badr Bacem KAABIA
20d4c758be fix(can): mcp2515: Guard TX interrupt handling for multi-buffer configs
The MCP2515 driver can be configured with 1, 2, or 3 transmit
buffers via the `MCP2515_TX_CNT` constant.

The interrupt handler checks for transmit complete interrupts for
`TXB1` and `TXB2`. However, the code for these checks was not guarded
by preprocessor conditionals. This meant the code would be compiled
even if the driver was configured to use only one transmit buffer
(`MCP2515_TX_CNT=1`), which is the default.

This change adds the appropriate `#if MCP2515_TX_CNT > 1` and
`#if MCP2515_TX_CNT > 2` guards around the interrupt handling logic
for the second and third transmit buffers, respectively. This ensures
that the code is only included when the corresponding buffers are
actually configured, improving code clarity and preventing compilation
of unused logic.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-11-17 09:28:07 +02:00
Atakan Demirtaş
20337689a1 drivers: input: vs1838b: Add noise filter for IR signals
Adds logic to shift out the first edge if the initial three edges do not
match a leading burst, improving noise resilience
in the IR input signal processing.

Signed-off-by: Atakan Demirtaş <atakan_demirtas@outlook.com>
2025-11-17 09:27:24 +02:00
Dmytro Firsov
659b3d6894 drivers: xen: export missing evtchn API function
Previously clear_event_channel() function, that is a part of Xen event
channel API was missing in events.h header.

Add function declaration and documentation description for to let users
add it to external drivers.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-15 12:00:01 +01:00
Dmytro Firsov
27e0445a80 drivers: xen: return hypercall results from notify_evtchn
Xen event channel notification may fail during hypervisor handling,
so it will be good for user to have a possibility to check results.

Previous implementation ignored hypervisor return code, now it will be
passed to caller.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-15 12:00:01 +01:00
Camille BAUD
3da4a2a2f4 drivers: i2c: Introduce basic bflb I2C driver
Introduce synchronous i2c driver

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-15 11:43:59 +01:00
Krzysztof Chruściński
d6fb9384eb drivers: timer: nrf_grtc_timer: Optimize to reduce register access
Speed up execution of the interrupt handler and sys_clock_set_timeout().
Sys_clock_set_timeout() can be called in two scenarios: from previous
timeout expiration handler or freely. If the former case fast path
can be used since CC value in the GRTC register just expired and it
can be used as a reference for CCADD setting. This is only a single
register write so it's much faster. In the latter a longer procedure
is applied which also happens in two variants. If value which is
set in CC is further in the future (e.g. K_FOREVER was set before) then
CC can be safely overwritten with a new value without a risk of
triggering unexpected COMPARE event. If value in CC is earlier than
the new CC value (if earlier timeout was aborted) then there is a
risk of COMPARE event happening while it is being overwritten.
That case requires long and safer procedure of setting CC.

Update hal_nordic with changes in the nrfx_grtc driver which are
needed for nrf_grtc_timer changes.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-15 11:43:37 +01:00
Jerzy Kasenberg
aea71084ec smartbond_timer: Fix tick-base behavior
When system was configured to use smartbond_timer with
tick-based kernel, timer interrupt could fire only
once and then time would not advance.

Now when tick-based kernel is chosen timer2_isr()
schedules that it should be fired at next tick.
Timer comparator calculation code was extracted
from existing sys_clock_set_timeout() function
without change so it can be used for tick-less
and tick-based kernel.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-15 11:37:56 +01:00
Bjarki Arge Andreasen
12a9392eeb drivers: can: nrf: use CAN_DEVICE_DT_INST_DEFINE
The can_nrf.c device driver used DEVICE_DT_INST_DEFINE instead of
CAN_DEVICE_DT_INST_DEFINE, which means we are missing initialization
of some CAN structures, namely STATS.

Update driver to use CAN_DEVICE_DT_INST_DEFINE()

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-11-15 11:37:26 +01:00
Elmo Lan
194fb3a92a dts: realtek: Add I2C SCL count offset properties
Add devicetree properties `lcnt-offset` and `hcnt-offset` to allow
board-specific tuning of SCL high/low count timing on RTS5912.

Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
2025-11-15 11:31:04 +01:00
Fin Maaß
0d98a515f6 sd: speed up mmc init
speed up mmc init, when sdmmc is also
used. as sdmmc has to fail for that and
can take some long time.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-15 11:30:32 +01:00
Philipp Miedl
b3bd157ec8 driver: clock-control: mspm0: Remove obsolete MSPM0_LFCLK_ENABLED check
LFCLK is always enabled, there is no way to gate this clock. The
codeblock that was shielded by this check simply changes LFCLK from
LFOSC to LFXT, for which the existing check for an enable LFXT DT node
is sufficient.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
cd6c390608 driver: clock_control: mspm0: remove HSCLK DT node
Remove the HSCLK DT node to unify the configuration of MCLK and
simplify the configuration. MCLK is now directly routed to either

  * LFCLK
  * SYSOSC
  * SYSPLL
  * HFCLK

without any intermediate nodes.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
03678f154b driver: clock_control: mspm0: Remove node syspll2x
Remove the node syspll2x refering to the output of SYSPLL CLK2X.
SYSPLLCLK2X is controlled via the clk-div2x parameter of the SYSPLL
DT node and only CLK2X or CLK0 can be activated. So there is no need
for an additional node, as routing of downstream clocks from SYSPLL
CLK0/CLK2X are defined by which of the two is active.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
0745f05380 driver: clock_control: mspm0: Allow setting SYSOSC clk and restrict MDIV
According to the TI MSPM0 reference manual MDIV must not be set if
SYSOSC is not configured to 4MHz. To make use of this setting, it is
necessary to enable configuring the SYSOSC clock of either 32MHz
(default) or 4MHz with the clock-frequency parameter of the
sysosc node.
If the SYSOSC is configured to run at 4MHz, then the MCLK divider
setting is applied.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
afde690c66 drivers: clock_control: mspm0: Rename pll to syspll
To conform with the TI mspm0 datasheet and reference manual, rename the
pll node to syspll. To harmonize, also rename references to the non-
existing node syspll0 to syspll.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Maxmillion McLaughlin
b98304a87b drivers: sensors: bmp581: fix temperature scaling
This change fixes and issue where negative temperatures wrap and
return 250C when the sensor gets below zero. The implementation is
pulled from Boschs official BMP5_SensorAPI and has been tested to
work down to -40

Signed-off-by: Maxmillion McLaughlin <max@sorcerer.earth>
2025-11-15 11:23:54 +01:00
Eden Uhde
ac270df99a drivers: display: ls0xx: add support for serial VCOM inversion
The ls0xx series requires continuous VCOM inversion to prevent panel
damage from DC bias, this adds driver support for doing so over SPI
(without EXTCOMIN), and adds corresponding devicetree properties.

Co-authored-by: Nick Winans <nick@winans.codes>
Signed-off-by: Eden Uhde <eden@rainbowtree.house>
2025-11-15 11:23:03 +01:00
Krzysztof Chruściński
9c1fbc8a86 drivers: serial: nrfx: Remove use of UART_NRFX_UARTE_LEGACY_SHIM
Kconfig got removed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 16:46:15 +01:00
Ruijia Wang
d4ae43e25f drivers: xspi: fix device config failure in XIP mode
Add bus idle wait after clock rate query to ensure AHB transactions
complete before device configuration. This prevents XSPI_SetDeviceConfig
from failing due to ongoing AHB access detection in XIP environments.
The issue occurs because clock_control_get_rate() triggers AHB
transactions that complete asynchronously, causings subsequent device
configuration to fail due to its bus status checking.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
2025-11-14 15:27:26 +02:00
Adam Zotow
40816a81a5 drivers: flash: stm32 qspi: Make delayed data sampling configurable
The QSPI delayed data sampling (SSHIFT) is enabled by default. This
feature is configurable in both XSPI and OSPI drivers. Align with
these drivers and make the feature configurable for QSPI too.

Signed-off-by: Adam Zotow <azo@trackunit.com>
2025-11-14 15:26:31 +02:00
Etienne Carriere
b6784734be drivers: gpio: stm32: clean instance init macro indentation
Cleanup indentation in STM32 GPIO controllers device definition
macros. Replace some uses of COND_CODE_1() with IF_ENABLED() that
is bit more explicit.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
8690595a47 drivers: misc: stm32n6_axisram: clean instance init macro indentation
Clean indentation in STM32N6_AXISRAM_INIT() local macro to better
highlight what the macro does. To make it more readable, add a
STM32N6_AXISRAM_MAYBE_INIT() helper macro and use IF_ENABLED()
instead of COND_CODE_0().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
b3f4439025 drivers: sensor: stm32_digi_temp: clean indentation in init macros
Clean indentation in STM32_DIGI_TEMP_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
ef51b23a10 drivers: dma: stm32: clean indentation in instance init macros
Clean indentation in macros used to define DMA instances in STM32
DMA drivers.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
fcb9f195a9 drivers: can: stm32: clean indentation in instance init macros
Clean indentation in macros used to define device instances in STM32 CAN
driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
97fc64e812 drivers: adc: stm32: clean instance init macro indentation
Cleanup indentation in ADC_STM32_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
d27e1d6f78 drivers: dac: stm32: clean indentation in instance init macros
Clean indentation in STM32_DAC_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
b0ccb2295f drivers: stm32: use STM32_CLOCK_INFO_BY_NAME() and friends
Use STM32_CLOCK_INFO(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME()
helper macros in STM32 drivers.

Using these macros ensure the clock division factor is properly
populated according to DT information. Prior these changes some
drivers only got the bus and bits position information and missed
the clock division information which is fine only when this division
factor information is 0.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Fabin V Martin
e4e36f5f28 drivers: i2c: microchip: Add I2C g1 driver
- Add I2C driver for Microchip SERCOM g1.
- Add and update Kconfig files to support the driver.
- Update CMakeLists.txt to include the new driver.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-14 15:25:25 +02:00
Krzysztof Chruściński
f1f0b03aea drivers: serial: nrfx_uarte: Add mode with TIMER byte counting
Add mode to be used on UARTE with frame timeout which is using a bounce
buffers and TIMER to count bytes. This mode shall be used to reliably
receive data without HWFC as frame timeout approach is not 100% reliable
because it can loose or corrupt a byte when new byte arrives after
frame timeout is detected but before it is fully handled. This mode is
similar to the one enabled with CONFIG_UART_x_NRF_HW_ASYNC but
additional bounce buffers are used and UARTE is receiving data to
internal buffers and copies data to the user buffer. Legacy apporach
cannot be used because in new SoC DMA attempts to copy data in words
so when byte is received it stays in the DMA internal buffer until
4 bytes are received or end of transfer happens then internal DMA
buffer is flushed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
9ae8c4edbc drivers: serial: nrfx_uarte: Prepare code for extension
Rearrange code to prepare for upcoming extension that adds special
receive mode.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Mathieu Choplain
21b2283fc5 drivers: *: stm32: use series-agnostic STM32 LL headers
Use the series-agnostic STM32 LL headers from the STM32Cube HAL module
instead of series-specific ones in STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-14 12:19:48 +02:00
Jun Lin
a922813034 drivers: i2c: npcx: add more timing parameters for I2C clock frequency
I2C Fast-Plus mode (1 MHz) is limited by the source clock.
For example, with a 15 MHz I2C source clock, the max I2C frequency is
~625 kHz. To support higher I2C frequencies, the APBx source clock must
be increased. This commit adds the timing parameters for I2C operation
at higher APBx clocks.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2025-11-14 12:19:29 +02:00
Qingsong Gou
1b8e3bdaf7 drivers: i2c: add i2c driver for sf32lb platform
Add i2c driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Parthiban Veerasooran
52b1e8704e drivers: ethernet: phy_microchip_t1s: use 'ret < 0' for error checks
Replace 'if (ret)' with 'if (ret < 0)' in the Microchip T1S PHY driver.
This change follows the legacy coding style commonly used in Zephyr
drivers, where error conditions are checked explicitly against negative
values. The affected functions do not return positive values, so this
modification does not change functionality. No functional change intended.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Parthiban Veerasooran
1843b3126d drivers: ethernet: phy: configure link status control for LAN867x Rev.D0
Configure the link status in the Link Status Control register for
LAN8670/1/2 Rev.D0 PHYs, depending on whether PLCA or CSMA/CD mode
is enabled. When PLCA is enabled, the link status reflects the PLCA
status. When PLCA is disabled (CSMA/CD mode), the PHY does not support
autonegotiation, so the link status is forced active by setting
the LINK_STATUS_SEMAPHORE bit.

The link status control is configured:
- During PHY initialization, for default CSMA/CD mode.
- Whenever PLCA configuration is updated.

This ensures correct link reporting and consistent behavior for
LAN867x Rev.D0 devices.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Parthiban Veerasooran
76034d043b drivers: ethernet: phy: add support for Microchip LAN867X Rev.D0 PHY
Add support for the LAN8670/1/2 Rev.D0 10BASE-T1S PHYs from Microchip.
The new Rev.D0 silicon requires a specific set of initialization
settings to be configured for optimal performance and compliance with
OPEN Alliance specifications, as described in Microchip Application Note
AN1699 (Revision G, DS60001699G – October 2025).
https://www.microchip.com/en-us/application-notes/an1699

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Jeppe Odgaard
46adf3b1bb drivers: sensor: tach_gpio: fix rpm debug logging
`data->rpm` is a signed value and should be logged as one.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-14 10:29:43 +02:00
Jeppe Odgaard
97781f8b9d drivers: sensor: tach_gpio: add pulses per round
Add pulses-per-round property.

The driver only measures one pulse and uses pulses-per-round in RPM
calculation.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-14 10:29:43 +02:00
Arunprasath P
8b53661096 drivers: comparator: microchip: Add G1 Comparator Driver
Add G1 Comparator driver for Microchip Analog Comparator Peripherals.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-14 10:28:22 +02:00