Now that api core functions check that denominator / numerator are not
null, it is no more necessary to perform this check within drivers.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Now that video api functions have __ASSERT_NO_MSG calls, drivers
do not need to check the entry point functions pointers.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Protect video API functions via __ASSERT_NO_MSG call to ensure that
required pointers are valid when entering functions.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The recommended reset sequence from the datasheet is as follows:
void SSD1309 ()
{
RES=0;
delay(1000);
RES=1;
delay(1000);
..
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
This commit adds a driver for the BH1790 Heart Rate Monitor IC.
Based on the approach used by the MAX30101 driver, an existing optical
heart rate sensor with a sample in Zephyr.
Signed-off-by: Magpie Embedded <magpieembedded@gmail.com>
This commit updates the riscv_machine_timer driver to resolve MTIME and
MTIMECMP register addresses by their `reg-names` instead of relying on
index order.
This improves clarity and robustness in DTS bindings, and is a prerequisite
for handling cases where not both MTIME and MTIMECMP registers are present
or accessible.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
`timings` is an array of `struct i2c_config_timing` (3 x `uint32_t`).
`i2c_timings_##index` is an array of `uint32_t` (hence the cast when it
is assigned to `timings`). Therefore `ARRAY_SIZE(i2c_timings_##index)` is
off by a factor 3 when used for `n_timings`.
Parentheses around the second `sizeof` are there to silence the gcc warning
(-Wsizeof-array-div) that warns about not computing the size of
`i2c_timings_##index`.
Signed-off-by: Wouter Horré <wouter@versasense.com>
A -1 was missing from the timer value calculation. In addition,
DIV_ROUND_CLOSEST was replaced with a custom macro fixing #84782.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Fix issue where STM32 I2C LL driver could block forever when SDA and SCL
are shorted and interrupts are disabled (CONFIG_I2C_STM32_INTERRUPT=n).
Added timeouts to all blocking wait loops in the STM32 LL I2C driver to
avoid indefinite blocking.
Fixes#88506
Signed-off-by: Jean Nanchen <jean.nanchen@hevs.ch>
Migrate renesas,ra-agt-counter implementation to use hal_renesas.
Add additional AGT_CLOCK_SUBCLOCK count source.
Add constraint for counter resolution to 32 or 16 bit variant.
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Updated set_drp_toggle to handle differences in TCPCI revisions.
Added a macro for TCPCI revision and read it from the chip register
during initialization.
Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
The ipm_send() allows transferring data through the IPM device.
However, depending on the platform, the mailbox peripheral may either
transmit a limited amount of data or not transfer data at all.
Introducing this configuration allows exposing the IPM capability to the
application.
This commit defines a default value of 1024 bytes to avoid impacting
existing IPM drivers and sets the value to 0 for the STM32 IPCC and
STM32 HSEM devices.
This allows, in a next step, other devices to use this configuration to
expose their capabilities instead of using proprietary configuration or
a static definition.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
- Setting default value of passive scan
dwell time of 400ms as SDK doesn't
configure default value.
Signed-off-by: Nitin Pandey <nitin.pandey@silabs.com>
This is a host driver for ESP32 chips running the esp-hosted
firmware, which turns ESP32s into a WLAN/BT co-processor.
Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
Currently to set/clear the pins, we do a logical OR of the value with the
existing values in set/clear registers. However, reading these registers
always returns the value in out_data register. This is undesirable as it
can cause unnecessary complications. Consider the following scenario:
We need to set PIN 0:
set_data |= BIT(0)
We need to clear PIN 1:
clr_data |= BIT(1)
The latter would also clear the 0th bit due to the aforementioned
behaviour.
This patch fixes this by writing the mask directly without ORing.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
There is an issue that the buffer cannot be allocated by the function
`read_payload()` in UART ISR context. Then the UART RX will be
disabled. The H4 driver hopes to get the receive buffer in the HCI RX
thread and then open the UART RX again. However, there is a situation
where the HCI RX thread is blocked in getting the received data
buffer. However, since the UARt RX has been disabled, the HCI RX
thread cannot get the received data buffer. Therefore, the RX thread
is always blocked here, causing the Bluetooth host to not work
properly.
Add a semaphore `rx.ready` to notify new received data buffer has
been added to H4 RX queue.
Wait for the semaphore `rx.ready` instead of H4 RX queue in HCI RX
thread.
Wake up the HCI RX thread when failing to allocate the RX buffer.
Fixes#89879.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Update hal_wch.
As the hal upstream changed name, there is now a name conflict.
Rename ch32fun.h to hal_ch32fun.h to fix this conflict.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
Add support for 16-channel ADC to cc23x0 SoC. The driver supports the
following conversion modes:
- Single channel | Single conversion,
- Sequence of channels (up to 4) | Single conversion.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Some RTC clock code introduced is specific to SOC_SERIES_MCXN, and
causes build failures on other SOCs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Siwx91x support a specific mode slightly better than the old legacy PS
mode.
This mode has to be set on the NWP boot, so it is not easy to configure
it during the runtime. Hence, this patch only provide a compile time
option to enable it.
Co-authored-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
We can now implement the get_power_save_config() callback.
Co-authored-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Added power-save mode support to optimize station wake-up timing
and reduce power consumption. The device currently supports
only legacy power-save mode.
This feature can be tested using the Wifi shell:
- ps: Enable the PS. By default, the device operates in fast
PSP mode.
- ps_exit_strategy: Updates mode if enabled; otherwise, follows
the configured exit strategy when power-save is enabled.
- ps_wakeup_mode: Configures the wake-up behavior.
- ps_timeout: Defines the timeout duration for power-save mode.
Co-authored-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The default format for ov7670 is currently VGA YUYV and it counts on the
smartdma to reset the format to RGB565 QVGA when get_format() is called.
Recently, set_format() is decoupled from get_format() so this assumption
is nolonger correct.
Set the default format to RGB565 QVGA instead.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Commit 0e41b07309 ("drivers : flash:
update way to get flash size") changed the way to get flash size from
the LL_FLASH_GetSize() HAL function to the current DT_REG_SIZE() macro.
However, they are not equivalent:
- With LL_FLASH_GetSize(), REAL_FLASH_SIZE_KB returned the *total* size
of the Flash memory, reading it from a ROM register of the CPU. For
example, it was 2048 (2MB) for a STM32H747xI.
- The current DT_REG_SIZE() applies to a flash *bank*, therefore it only
returns half of the total Flash size on dual bank devices.
This mismatch causes issues with the DISCONTINUOUS_BANKS logic below,
incorrectly matching partitions close to the end of the first bank as
appearing to span both and triggering the "range overlaps discontinuity"
check later.
Fix it by doubling the size when appropriate, in the same way it is
already done for the M4 core.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
