Add option in enum phy_link_speed to disable auto-negotiation.
This allows PHY drivers to support disabling auto-negotiation.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This commit fixes infinite loop reported in
https://github.com/zephyrproject-rtos/zephyr/issues/91242, not deallocating
array with virtqueues and not deactivating the virtqueues in case of
failure
Signed-off-by: Jakub Michalski <jmichalski@antmicro.com>
Add support for setting RGMII RX and TX internal delays via DT properties:
`ti,rx-internal-delay` and `ti,tx-internal-delay`.
Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
is_area_readable is used for SOCS other than LPC55XXX chips, not just
chips other than LPC55S36. Change the condition which elides this code
to avoid a GCC 14.3 warning.
Signed-off-by: Keith Packard <keithp@keithp.com>
In the previous code, strnlen could have returned WIFI_SSID_MAX_LEN, and
the following statement ensuring NUL termination would have written one
past the end of the array.
Replace this with code that ensures a NUL termination within the bounds
of the array and then use strlen to compute the length.
Signed-off-by: Keith Packard <keithp@keithp.com>
This commit prevents the hardware from generating an unexpected
target slave address match ISR by the following change:
1. Enable the New Match Interrupt Enable bit (NMINTEN) only when
necessary.
2. Explicitly clear all SMBnADDRx registers because they are not
cleared when the I2C hardware is disabled. It will cause the
asynchrinization between SMBnADDRx and registered_target_mask if the
system jumps from the RO image to the RW image.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Remove gpio clock management from the GPIO driver when running on the
cortex-m33 on the mp2 and gpio clocks are managed by the cortex-A, being
the resource manager, allowed by the Resource Isolation Framework (RIF).
Also add a specific binding for the mp2 gpio to make clock property
optional.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add the stm32mp2 clock driver to the clock_control subsystem. The driver
is a reduced version of the generic stm32 clock driver.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Introduce DeviceTree binding for the STM32MP2 RCC clock controller,
enabling support for STM32MP2-specific clock configuration in Zephyr.
Update Kconfig.stm32 to add a dependency on STM32MP2 configuration,
allowing the use of STM32 LL RCC features when targeting STM32MP2
devices.
Add header for STM32MP2 per peripheral clock definitions.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add support for STM32MP2 series in the hwinfo driver.
The STM32MP2 series uses the HAL functions since it doesn't have a
ll_utils.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add the mp2 exti2 dts to the dtsi file.
Add mp2 exti hal and ll function calls with EXTI2 instance. We use the
EXTI2 instance because it contains the GPIO interrupts in the non-secure
context. (We are trying to build the blinky sample as a first milestone)
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Replace the use of `DT_NODELABEL(exti)` which depends on the node label
with the defined EXTI_NODE macro using the instance with the
`st_stm32_exti` compatible.
Since both macros point to the same node, this change doesn't affect
the code logic, but makes it independent of the node label, in
preparation for the addition of the STM32MP2 exti nodes.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Use && instead of & in channel validation logic to ensure channel is
either CHAN_IR or CHAN_LIGHT.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
The SDK FSL DMA driver converts descriptor addresses to DMA's address
space when linking descriptors. The Zephyr dma_mcux_lpc driver is
missing the inverse conversion when dereferencing the linked next
descriptor pointer.
This isn't a problem when this driver is used on the M33 core
of the MIMXRT595S because the M33 can access the address space
of the DMA (0x20000000+). But when the Fusion F1 DSP core uses
this driver, the DSP cannot access the DMA's address space
so the inverse conversion is needed.
Signed-off-by: Yicheng Li <yichengli@google.com>
Support three different FIFO contents which are selectable through
a new DT property, fifo-mode-sel, which may be set to one of the
following values:
- 0x0 # 1x Accelerometer @12bit and 1x temperature @12bit samples
- 0x1 # 1x Accelerometer @16bit sample
- 0x2 # 2x Accelerometer @8bit samples (previous and current)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Updated the condition in the gpio_ra_interrupt_unset function to use a
logical OR instead of AND, since it should return if either port_num or
pin is not the same as the current callback.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Remove logically dead if and else-if conditions as shown by the static
analysis, replacing with the else statement.
When data_opt is assigned to the MIN of fifo_wmark_cfg and fifo_full_cfg,
both those variables will be non-NULL as an earlier condition ensures the
function returns if either one of the variables is NULL before assigning
to data_opt.
Signed-off-by: Alexander Apostolu <apostolu240@gmail.com>
Add SENSOR_TRIG_DATA_READY trigger support to RTIO streaming.
Currently it just handle XL drdy.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adapt MAX32690 driver to use Wrap_MXC_CAN_Init to handle differences
in the MSDK API (see analogdevicesinc/msdk#1306) between the
MAX32690 and MAX32662.
can_driver_api.timing_min required phase_seg1 >= 3 and phase_seg2 >= 2
when configuring CAN bit timing. Both microcontrollers covered by this
driver (MAX32662, MAX32690) support values down to 1 for both of these
timing parameters.
Refer to the docs for registers CAN_BUSTIM1, CANn_BUSTIM1.
Add a can0 node to the MAX32662 dtsi.
Signed-off-by: Ioan Dragomir <ioan.dragomir@analog.com>
Update the source_data and dest_data sizes with the frame size
in bytes before performing the transfer.
With these changes, we can handle cases where the buffers switch
between 8-bit and 16-bit modes.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Workaround to avoid getting the -EFAULT (14) error when running
the test_spi_word_size_x (x = 7, 9, 24) test cases:
Since these testcase configurations aren't supported, update
the error type to ENOTSUP to allow skipping the test cases using ztest.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
The driver treats the `source_data_size` and `dest_data_size` as a
width in bits and converts 8 bits to 1, 16 bits to 2, and 32 bits to 3.
This should be a width in bytes with 1 byte mapping to 0, 2 bytes to
1, and 4 bytes to 3.
Note that this preserves the current behaviour of silently accepting
invalid transfer bit widths.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Introduce the stm32u3 serie to the the existing flash driver
It is based on the stm32l5 model.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Implement conditional compilation to avoid the warning:
- Use LL_PWR_EnableVDDIO2() for STM32U3 series.
- Use LL_PWR_EnableVddIO2() for other series.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Some devices have multiple pinctrl regions; for instance, main pinctrl and
mcu pinctrl. Currently there can only be a single pinctrl instance picked
form a DT label. This patch makes the pinctrl driver initialise one
instance for each node with correct compatible string.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
For testing/debugging purposes, it will be possible then to register
or unregister an i2c target.
Signed-off-by: Tomasz Bursztyka <tobu@bang-olufsen.dk>
Co-authored-by: Hans Binderup <habi@bang-olufsen.dk>
The driver originally supported only it8xxx2 series. This updates
introduces compatibility allow it to also support it51xxx series
with minimal changes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
