The AD4114 is a low power, low noise, 24-bit, sigma-delta ADC.
This driver allows to use it with the Zephyr ADC API. It uses
the continuous acquisition ADC feature.
This ADC allows many configutations, but this driver uses it as the
most generic way :
- each can channel can be enable or disable using the device
tree configuration
- configure two setups (one for unipolar inputs, one for bipolar inputs)
- use an external clock
Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
1. Temperature Interface
According to BMI08x datasheet, temperature reading
requires both MSB and LSB bytes to be read and
processed correctly.
Temp data processing should follow the formula:
Temp in °C = (temp_msb * 8) + (temp_lsb / 32)
This patch implements the correct reading
sequence and calculation method as specified
in the datasheet.
2. Trigger Setting
Previously we set handler and then trigger struct.
However under some situation, as long as we set
the handler, we get into ISR immediately and never
set trigger struct.
I simply changed the sequence.
Testing:
- Verified temperature readings match datasheet
- Tested on stm32f407igh board with BMI08x sensor
Fixes: #82375
Signed-off-by: Wenxi Xu <xuwenxi0517@gmail.com>
`sensor_sample_fetch` is documented as blocking until the fetch
operation is complete. Update the implementation so that this is true.
Since the fetch operation now blocks, there is no need for the data
ready trigger.
Signed-off-by: Jordan Yates <jordan@embeint.com>
When configuring the device to run in one-shot mode, the AS6212 requires
the sleep mode bit to be set. From the datasheet:
```
The sleep mode is activated by setting the bit SM in the configuration
register to 1. This shuts the device down immediately and reduces the
power consumption to a minimum value.
Entering the sleep mode will take some time (120 ms maximum) and the
first conversion after the sleep mode has been entered takes longer than
the values specified in Figure 7. It is therefore recommended when
entering sleep mode to trigger a single shot conversion at the same
time. After 150 ms (max), the device has then entered the sleep mode and
subsequent conversion times are as specified in Figure 7.
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
Use the common `sensor_value_*` helper functions instead of implementing
the conversions again in the driver.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This commit introduces a new Sensor Clock API, enabling the retrieval
of cycle counts and conversion to nanoseconds based on the system or
external clock. The API includes:
- `sensor_clock_get_cycles()` to get the current cycle count from the
sensor clock.
- `sensor_clock_cycles_to_ns()` to convert cycles to nanoseconds using
the clock's frequency.
The implementation supports both system clocks and external clocks
defined in the device tree, making the sensor clock integration more
flexible for various sensor use cases.
Signed-off-by: Mark Chen <mark.chen@cienet.com>
Added more APIs for ARM SCMI clock management protocol.
- scmi_clock_rate_set
- scmi_clock_parent_get
- scmi_clock_parent_set
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Change the stepper API to instead of changing the stepper speed based on
the velocity in microsteps per second to use the delay in usec between
successive steps. Also remove the velocity from the `stepper_run` function
as typical API usage is enable -> set step interval -> run.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
Use hardware clock frequency to calculate watchdog expire ticks
instead of kernel's "ticks".
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Enabling `CONFIG_INPUT_FT5336_INTERRUPT` if the ft5336 node in DT
has `int-gpios` property.
As a result of this change, some boards can eliminate lines that
explicitly configure `CONFIG_INPUT_FT5336_INTERRUPT`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The SAM0 ADC has an internal register to divide the accumulated results
of oversampling the ADC by the amount of samples collected. This value
has to be set by the driver and was missing.
Signed-off-by: Patrick Günzel <patrick.guenzel@kinexon.com>
The commit 2c3165d187 ("drivers: spi: add opaque type to encode SPI
operation flags") introduces new type for operation flag, since it is
16/32-bit depending on CONFIG_SPI_EXTENDED_MODES.
Use the new type for safe, if the function 'spi_stm32_shift_frames' may
use extended operation flag later.
Signed-off-by: Haiyue Wang <haiyuewa@163.com>
Move all initialisation of the data struct to the init function to avoid
creating the very large `struct sd_card` in `.bss`.
Signed-off-by: Jordan Yates <jordan@embeint.com>
In the dma loop_transfer test (test_loop_repeated_start_stop()), the
order of calls is dma_config() -> dma_stop() -> dma_start(). This
currently does not work on xmc4xxx because after calling dma_stop(), the
dma would be in a suspended state. Fix this by leaving the suspended state
before exiting dma_stop().
Also don't clear the context (dma_channel->dlr_line and dma_channel->cb)
that was setup by dma_config().
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
When quering the DMA status we need to return the number of pending bytes
left in the transfer. Currently this is inferred by calling
XMC_DMA_CH_GetTransferredData(). However, this function actually returns
the number of items read from the source peripheral (via CTL.BLOCK_TS).
It doesn't guarantee that the last item was fully transferred to the
destination.
When using the ADDR_ADJ_INCREMENT/DECREMENT options it is better to use
DAR register to infer the number of transferred bytes. This points to the
memory address where the next data will be written. It only increments
after the ongoing transfer from source to destination is completed.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Some ADCs (e.g. SAM0) can only convert one channel at a time
and therefore need to be reconfigured for every voltage
divider prior to startin the conversion
Signed-off-by: Patrick Günzel <patrick.guenzel@kinexon.com>
end frame is used to supply clock pulses so that data goes to last
LED in the chain. Thus, it depends on the number of LEDs in the chain.
Previously, the number of ones sent into the end frame was
hard-coded and limited the usage of the driver to 64 LEDs in the
strip.
Signed-off-by: Cyril Fougeray <cyril.fougeray@toolsforhumanity.com>
Move the SAM V71 register name fixup from the SoC code into the PWM driver
next to the other PWM driver fixup.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit adds support for the STM32WB0 series to
the existing STM32 timer-based counters driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add new SENSOR_CHAN_FREQUENCY constant to allow implement sensors that
output frequency values in Hertz.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Add support for the I2C_MSG_RESTART flag to be able to use a
repeated start in between chained transactions.
The driver now uses the stop/restart flags set in the i2c_msg,
instead of starting and stopping for each transaction in the chain.
Signed-off-by: Lorenz Clijnen <github@lorc.be>
update gpio driver to adapt rt7xx gpio model:
1. There is no PORT_Type on RT7xx,so set PORT_Type as void
2. Add port_no parameter in gpio_mcux_config to adapt IOPCTL driver
3. Add gpio-port-offest parameter in blinding, it will help map the
relation between index n and gpio port when some soc have domain
access attribution.
3. Splite gpio_mcux_configure function into two functions(
gpio_mcux_iopctl_configure and gpio_mcux_port_configure)
according to CONFIG_PINCTRL_NXP_IOCON macro
4. Add code to adapt RT700 GPIO attribute configuration
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Define iocon array to store iocon base address
add index parameter support to support multi iocon instances
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
The DMA-based path of the lpspi driver is basically
almost a driver of it's own, move it to it's own file.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is (almost) a whole separate driver for RTIO,
move this code to its own file and move shared code
and definitions to a common file.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Move this driver to its own subfolder to organize it
since there will be new files added for this hardware.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Without this fix I get an MPU fault in samples/net/openthread/shell/
with CONFIG_IEEE802154_DRIVER_LOG_LEVEL_DBG=y.
Related commit: a7224830ce
Signed-off-by: Martin Jäger <martin@libre.solar>
Add hwinfo driver for Silicon Labs Series 2 devices. The driver
is separate from the Series 0/1 Gecko driver because the available
reset causes are completely different.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
This PR fixes the issue that building the driver with either
CONFIG_RTC_CALIBRATION=y or CONFIG_RTC_ALARM=y and without
'int-gpios' used will cause
'undefined reference to `rv8803_write_reg8'' error.
Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
Some time ago a new shim for nRF UARTE was added (uart_nrfx_uarte2.c)
which used nrfx_uarte.c driver underneath. It was supposed to support
nrf54x platforms. However, later on legacy driver (uart_nrfx_uarte.c)
was extended to support nrf54x platforms and it takes less code size,
has better performance and more features. Shim uart_nrfx_uarte2 will
no longer be supported. As new shim is the default and there is a
Kconfig to pick the legacy shim (CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y)
it cannot be deprecated in the normal way. Additional Kconfig option
is created (DEPRECATED_UART_NRFX_UARTE_LEGACY_SHIM) which is enabled
if CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n and it selects DEPRECATED.
A warning was also added to the CMakeLists.txt.
Patch removes use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM in tests.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
In order to ensure that watchdog channels are freed in proper
driver state, synchronization in form of simple loop needs
to be added after stopping. In no irq variant, it is already done
on nrfx level. NRFY function can be replaced by NRFX one in
the future.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Simplifies GPIO reset logic in `phy_mc_ksz8081_reset()` by introducing
a dedicated function, `phy_ksz8081_reset_gpio`. If this function returns
`-ENODEV`, it will fall back to using a command-based reset instead.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Simplifies error handling in `phy_mc_ksz8081_get_link()` by
centralizing mutex unlocking with a `done` label.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Link layer needs some fixing before hci driver can be minimally configured
and hence must revert conditional inclusion of core functionalities untill
new link layer is available.
Signed-off-by: Petri Pitkanen <petri.pitkanen@silabs.com>
