-The stm32wba6x has Dual Bank memory. Change the flash driver
to support this OPTion given by presence of the
DUAL_BANK bit (21) in the FLASH_OPTR register.
-Flash erase with 2 banks: Add the control of the BKER
bit of the FLASH_NSCR1 to select BANK1 or 2 of
the internal flash depending
on the page number >127 for BANK2
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The nRF lower levels (`spim_addr_check` and `qspi_addr_check`) do
address alignment validation before sending or receiving data. If the
buffer sizes are not aligned, errors like this are printed to the
console when the interface is powered up.
```
<err> : spim_addr_check : Unaligned address ee0b2 2002b020 1 0 0
<err> : spim_addr_check : Unaligned address eeb3e 2002bb40 1 0 0
<err> : spim_addr_check : Unaligned address ef5ca 2002c660 1 0 0
<err> : spim_addr_check : Unaligned address f0056 2002d180 1 0 0
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
Determine if lpflexcomm wrapped lpi2c by instance and connect
irq differently dependending on that to support platforms with
both flexcomm wrapped and unwrapped lpi2c's.
Applying c1286a8d8d425805fcceb3b872325fb4c439a572 to RTIO version.
Authored-by: Declan Snyder <declan.snyder@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The Low Power Flexcomm driver manages the interrupt handling
and provides an API to register interrupt callbacks.
Register the NXP LPI2C interrupt handler.
Applying dca6e64c93f26db254089f20225854bb1f8fe9b4 on RTIO-version.
Authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Some NXP SoC's have a FlexComm interface that manages the
interrupts.
Applying 482e39ea9556f53adbb7f67d0d0da3d17bbbae90 on RTIO-version.
Authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Update the driver to account for variations in the SDK driver
when it uses the instance number instead of the base address.
Applying 49bdcd2ef2fd5c91ab36f08d29e5183df5437843 on RTIO-version.
Co-authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
This patch establishes proper handling of RTIO OPs with multiple write
requests in the same transfer (as in: including OP_TRANSACTION flag).
An example of this is captured in test_ram_rtio_write_with_transaction
test). This patch makes that testcase pass for i2c_nrfx_twi_rtio.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
ISR safe runtime PM can only be used for all instances except for
spis120 which requires standard runtime PM.
Added compilation guard against using CONFIG_PM_DEVICE_SYSTEM_MANAGED
with spis120.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add FOREACH macro which iterates over all SPIM instances and creates
device instances for each enabled instance.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add compile time detection if fast SPIM instances are used
and system managed device PM is enabled. This configuration is
not supported.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not allow CONFIG_PM_DEVICE_SYSTEM_MANAGED when fast PWM instance
is used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Adding support for handling XOTUNE event in clock_control.
Right now XOTUNE event reflects situation when HFCLK is stable and tuned.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
- Unified the handling of USB OTG HS and USB OTG FS
by removing redundant preprocessor conditionals.
- Introduced a new macro `UDC_STM32_BASE_ADDRESS`
to dynamically set the USB base address.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Enable clock and power for the OTG HS peripheral
of the STM32N6x serie
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
When using low PWM frequency i.e 50Hz the resolution of pulse_cycles
got lost from converting pulse_cycles to duty cycle % and then back to
pulse_cycles again.
Furthermore TPM_UpdateChnlEdgeLevelSelect call would restart the pwm
constantly on a mcux_tpm_set_cycles call now only call
TPM_UpdateChnlEdgeLevelSelect when changing the polarity
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
New HAL update changed the prototype of the check DMA flag functions.
C0 use a const parameter for these functions.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
The LL_GetFlashSize function has been removed for
this new HAL H7RS release. Retrieves the value now from
the devicetree using the DT_REG_SIZE macro.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
This patch adds the missing completion call to the
RTIO_OP_I2C_CONFIGURE OPs. Without this, the drivers will lock when
calling i2c_configure().
Signed-off-by: Luis Ubieda <luisf@croxel.com>
After API_V2 auto-negotiation support was added by #86621
setup_mac_filter() was called before HAL_ETH_Init(), which resulted in
received multicast packets being discarded.
This moves the call to setup_mac_filter() to eth_iface_init(), after
HAL_ETH_Init() for both API_V1 and API_V2.
I've verified the problem and tested the fix on a Nucleo-H563ZI with a
simple application that just starts up and makes an mDNS query (which
depends on working multicast).
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
Zephyr has changed the rules for PINCTRL to use Kconfig select
feature at the driver level instead of setting the Kconfig
item directly in the board or application level. We updated
the MEC5 UART serial driver Kconfig to select PINCTRL.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Under certain conditions report_lock could already be used by the irq
before it was initialized, now we ensure we enable irq after report_lock
is initialized.
Furthermore in some conditions data->xfer_bytes could be equal
SBUS_FRAME_LEN resulting in a infinite loop doing zero reads when
fifo is still holding new bytes
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
The tmp116 sensor driver also supports tmp117 and tmp119. Therefore rename
to indicate that is supports a range of tmp devices.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
For the broadcast setwml ccc, the argument vector index of the input
length is 2 instead of 3. This commit fixs this issue.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
The lsm6dsv16x driver is using an incorrect value for the index
into the acceleration range. This results in using the wrong
range. The issue was found to be a bug in a MACRO in
lsm6dsv16x_decoder.h that was used to find the index in the
acceleration range. The MACRO was improperly counting zeros from the
leading edge, instead of the trailing edge.
Signed-off-by: Derek Valleroy <derekvalleroy@fb.com>
The i.MXRT10xx series have configurable GPIO pull strengths.
These are available for configuration in the pinctrl system, but not for
regular GPIO use.
This commit adds SOC-series specific GPIO configuration bits for selecting
weak or strong GPIO pulls, similar to drive strengths available from other
GPIO pin configuration examples.
This has been tested on a custom i.MXRT1062 product.
Signed-off-by: Stefan Giroux <stefan.g@feniex.com>
This was not getting enabled because label was passed instead of path
and dependency was not met.
Fix the DT function to use label.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
These nRF70 driver operational modes are important, so, extend the help
to clearly communicate the mode's purpose.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Create a driver implementation for the battery charge controller
TI BQ25713.
It includes the ability to enable / disable the controller and also
to setup max current and voltage charge parameters at initialization
time but also at run time.
On the other hand, it is possible to assign / obtain input voltage
and current regulation.
Signed-off-by: Kiara Navarro <knavarro@paltatech.com>
Add missing define in order to enable RGB_888 pixel format support
on the mcux_elcdif driver. Tested with TM070JVHG33 display
Signed-off-by: Isaac Yuki <isaaclucas.delimayuki@tq-group.com>
Fix build error which happens when LSM6DSV16X_STREAM=y and there
are no lsm6dsv16x driver instances on i3c bus.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add support for Nuvoton numaker m55m1x series EMAC controller.
Also include NOCACHE_MEMORY allocation.
Support to generate random mac address and remove emac data flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
At high throughput, the controller sometimes fails to start a new
transaction. Clearing the corresponding endpoint bit in the BUFF_STATUS
completion register before initiating a new transaction solves this
problem.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not check if the tailroom is greater than or equal to MPS because the
controller does not write directly to the buffer and therefore cannot
write outside the buffer.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
For the IN endpoint, we only need to set/reset the STALL bit in the
endpoint control register.
To set halt on the OUT endpoint, the AVAILABLE bit must also be set,
which is similar to starting a new transfer, but first any transfer in
progress must be canceled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
