Some devices do not have DEVICEID or BLE-related registers
in FICR. Use NFCID instead in such cases, if available.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Add #ifdef guards around WMM_UAPSD specific API calls in power save
functions to fix compilation errors when CONFIG_NXP_WIFI_WMM_UAPSD
is disabled.
Signed-off-by: Qingling Wu <qingling.wu@nxp.com>
When CONFIG_NXP_WIFI_HOST_SLEEP is disabled:
- Provide a stub implementation of device_wlan_pm_action()
- Conditionally compile nxp_wifi_wlan_wakeup() helper function
This preserves PM device infrastructure while avoiding references to
host sleep symbols that are conditionally compiled in wifi_nxp module.
Signed-off-by: Qingling Wu <qingling.wu@nxp.com>
The get_resolution function returns 13 when the resolution bit is set
and 16 when it is clear. Per the ADT7420 datasheet, bit 7 of the
config register set to 1 means 16-bit resolution and 0 means 13-bit.
This is also confirmed by the driver's own set_resolution and init
code which sets the bit when 16-bit mode is desired.
Swap the return values so that 16 is returned when the resolution bit
is set and 13 when it is clear.
Fixes: d07b8a20f6 ("sensor: adt7420: Extend ADT7420 Driver Support")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Add support for the Trasna LEXI-R10 cellular modem in the generic
cellular module driver, starting from similar cellular modules
(e.g., LARA-R6 and/or SARA-R4).
LEXI-R10 is an ultra-compact LTE Cat-1bis module, designed for
IoT and M2M applications, featuring integrated IP connectivity
and clients.
The binding identifies the UART of the device.
Signed-off-by: Mattia Rebato <mattia.rebato@trasna.io>
Currently the stm32g4x flash driver only works in dual bank for devices
that support it. This is inconvenient when using mcuboot on a device with
less than the maximum 512k of flash, as it creates an unaddressable "hole"
between the two banks, artificially constraining the partition layout for
the bootloader, primary, and upgrade slots. Update the flash driver to add
a runtime check to see if the device is configured in single bank or dual
bank mode and adjust the page size accordingly. Note that the driver must
do both a compile time and runtime check for dual bank configuration as
dual bank mode is only supported on some devices in the family, and for
those that do support dual bank mode, they may or may not be configured as
such.
Signed-off-by: Michael Estes <michael.estes@byteserv.io>
Add RTC shell commands for alarm configuration and query.
This patch introduces three new shell commands under CONFIG_RTC_ALARM:
`set_alarm <dev> <id> <mask> <time>`:
Set an alarm for the specified device.
`get_alarm <dev> <id>`: Retrieve the current alarm time.
`get_alarm_mask <dev> <id>`: Show supported fields/mask of the alarm.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Compute tm_wday after parsing RTC shell input by converting the parsed
datetime into a timestamp and back to struct tm.
Some RTC drivers rely on tm_wday when setting time, so ensure it is
always derived from the provided date to maintain consistent and correct
behavior.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The status variable is used in the while loop condition before
ad4114_read_reg() has a chance to populate it. If the uninitialized
stack value happens to have bit 7 set, the loop is skipped entirely
and the driver proceeds to read ADC data before the conversion is
ready, returning stale or invalid results.
Initialize status to 0 so the loop always executes at least once.
Fixes: 8250cc68b7 ("drivers: adc: ad4114: add driver support")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Use logical AND (&&) instead of bitwise AND (&) when checking the
product ID during initialization. The intent is to verify that the
product ID matches neither AD4052 nor AD4050, which requires a
logical operation.
Fixes: 4a9d1473d3 ("drivers: adc: ad405x: Add AD405X driver")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
R_RTC_ClockSourceSet() stops the RTC by clearing the START bit.
Explicitly restart the RTC after clock source configuration on
non-warm reset so the RTC runs correctly after initialization.
Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
Normally, the RTC clock source is configured only on a cold reset.
However, flashing with Twister triggers a software reset, which can
cause RTC tests to fail.
This option forces the RTC clock source to be configured after
flashing, ensuring the RTC test runs reliably.
Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
On some Renesas RA boards, `RSTSR0_PORF` is not set after a power-on reset.
Switch to using `RSTSR2_CWSF` (cold/warm start flag) to decide whether the
RTC clock source needs to be reconfigured.
Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
The IIC controller does not implement the recover_bus API. When a
peripheral holds SDA low, the bus becomes stuck and cannot be
recovered without intervention (such as a reset).
Add bus recovery support via GPIO bitbanging. When enabled via
`CONFIG_I2C_RENESAS_RA_BUS_RECOVERY`, the driver reconfigures
the SCL and SDA pins as GPIOs, clocks out 9 pulses on SCL to force
the peripheral to release SDA, then restores the pins to the hardware
I2C controller via pinctrl.
Add scl-gpios and sda-gpios devicetree properties to identify
the GPIO lines used for recovery.
Signed-off-by: Andres Hernandez <andres.a.h@outlook.com>
The driver needs all child nodes to be on the same adc device and the
channels to be in increasing index since it uses the ADC sequencing API,
validate that the config is correct before initializing the driver.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The ULPI PHY interface driver (phy_ulpi_itf.c) was only being compiled
for STM32F7X and STM32H7X series, causing build failures on other series
that use external ULPI PHYs, such as STM32F4X boards with ULPI PHYs.
Add missing F2/F4 series to the build condition alongside the existing
F7/H7 series checks. This ensures the ULPI interface driver is compiled
for any F2/F4/F7/H7 board that has a ULPI PHY node in its devicetree.
An alternative approach removing the series checks entirely and just
checking CONFIG_DT_HAS_USB_ULPI_PHY_ENABLED was considered, however
there was a concern that the ULPI interface may have different clock
control bits on other series.
This fixes build failures like "undefined reference to
__device_dts_ord_XXX__stm32_phy" when building for STM32F4 boards with
external ULPI PHYs (e.g., adi_sdp_k1). The build failures were
introduced in commit 8b8321d184.
Assisted-by: Claude:claude-sonnet-4-5
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Add support for the Telit LE910C1TX LTE modem, starting from similar
to ME910G1 and ME310G1 modems.
Signed-off-by: Luca Impagliazzo <Luca.Impagliazzo@telit.com>
On STM32H5, the bit 0 of the Option register of ADC1 controls the channel 0
switch control. It has to be set if either ADC1 or ADC2 wants to use this
channel. Until now, it was enabled only if ADC1 requested channel 0. This
commit fixes this by setting the option bit if channel 0 is used, with no
consideration of the ADC instance.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
In 'drivers/wifi/nxp/Kconfig.nxp', 'NXP_WIFI_SOFTAP_SUPPORT'
currently uses 'select NET_DHCPV4_SERVER', but this can be restrictive.
This tightly couples L2 behavior (AP) and L3 (IP).
It shouldn't matter which node acts as the DHCP server once those
nodes are linked at L2. This commit introduces a new Kconfig option
to make the DHCP server optional.
Signed-off-by: Mori Fumita <mfumita@electromag.com.au>
Mask STM_STMTCSR_TRACEID_Msk is already bit shifted so Kconfig value
should first be shifted and then masked. The way it was done previously
resulted in TraceID being cleared.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
TI MSPM0 VREF module is used by analog peripherals for reference voltage
Add support for TI MSPM0 VREF module.
Signed-off-by: Girinandha Manivelpandiyan <girinandha@linumiz.com>
This reverts commit 1643904ac4.
This change introduced a regression: A build warning when building
with clang, which is visible in the clang workflow in main
causing it to fail. The issue is in the HAL itself and the fix
is not evident.
Let's revert this commit until the issue is fixed in the HAL.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Soft reset is largely equivalent to power cycle. Add dummy read of chip ID
after soft reset in BMI270 initialization function. Dummy read is
performed via bus initialization.
Signed-off-by: Szymon Antkowiak <szymon.antkowiak@nordicsemi.no>
Add support for retrieving GPIO pin direction
when GPIO_GET_DIRECTION kconfig is enabled.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
Add support for toggling a reset line during GPIO
initialization when a reset controller is available
in the device tree.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
Replace direct register access using raw base addresses with
MMIO accessors to align with Zephyr DEVICE_MMIO API.
Use mem_addr_t for the base address and ensures compatibility with
architectures.
Signed-off-by: Muhammad Waleed Badar <muhammadx.waleedbadar@altera.com>
'sitronix,st7789v' panel controller driver is using ST7789V_PIXEL_FORMAT
Kconfig option to set pixel format, which is ignored in the device
initialization which instead uses DT colmod property to set the pixel
format.
Remove the Kconfig option and colmod DT property, and instead use the
standard pixel-format DT property to set the colmod register.
Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
The NWP does not deliver advanced (background) scan results to the host
when instant BG scan is disabled, so Zephyr never gets SCAN_RESULT /
SCAN_DONE for that path.
- Hardcode enable_instant_scan to 1 in advanced_scan_config with a
short comment explaining the NWP requirement.
Signed-off-by: Tejus Subramanya <ters@silabs.com>
Add a SPI-NAND flash driver for NXP FlexSPI controller. The driver
probes device geometry (page size, OOB size, pages per block, total
capacity) from the ONFI parameter page at runtime and supports read,
write, and block erase operations. Bad-block detection and marking
are exposed through the flash_ex_op interface, including the
FLASH_EX_OP_IS_BAD_BLOCK and FLASH_EX_OP_MARK_BAD_BLOCK operations.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add memc_flexspi_apply_pinctrl() for configuring additional FlexSPI
port pins when init is skipped due to XIP, and memc_flexspi_update_lut()
for runtime LUT updates using a stack buffer to avoid XIP pointer
rejection.
Guard all irq_lock() calls with CONFIG_FLASH_MCUX_FLEXSPI_XIP so
non-XIP systems do not incur unnecessary interrupt latency.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Correct the IFX_HPPASS_SAR_CH_EXISTS macro to correctly match devicetree
nodes using a hex address.
Assisted-by: Github Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
Move to the new MXC_SPI_GetAndClearFlags API to avoid a race condition
where flags not handled in the ISR would be cleared and missed as a result.
This fix removes the need for the previous partial workaround that simply
masked the issue in most scenario.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
When DMA is enabled, but there are no DMA channels assigned to the SPI
peripheral, properly fall back to setting up the dummy bytes for SPI RTIO
operations.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Instead of generic success/error status use the appropriate wifi
manangement status codes that can be used to overwrite the status.
Signed-off-by: Martin Koloska <martin.koloska@bytesatwork.ch>
