Commit graph

28,390 commits

Author SHA1 Message Date
Thomas Decker
69a6f24821 drivers: serial: uart_stm32: Fix typo in LOG_ERR string
Change "Could not enable (LP)UART clock" to "[...] disable [...]" when
clock_control_off() fails.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 09:34:35 -05:00
Ruoshan Shi
9f5310960e drivers: display: add waveshare dsi2dpi display bridge support
Replace the waveshare_dsi_lcd panel with the waveshare_dsi2dpi
display bridge.

Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
2025-12-08 06:14:31 -05:00
Axel Utech
ae69e60dad drivers: spi: sam: Fix configuring with more than 4 chip selects
If spi_sam_configure() is called with more than 4 chip selects the
current check fails even if the pins are used as gpios. The variable
spi_csr_idx already has the correct index to be checked and must be
used in this check.

Signed-off-by: Munawar Ali <ali@sofiha.de>
Signed-off-by: Axel Utech <utech@sofiha.de>
2025-12-08 06:14:08 -05:00
Ren Chen
7654e3a4ed soc: it8xxx2: block idle if timer is close to expiration
If the event timer or free-run timer is close to expiration when
system enters idle with I2C target DMA mode enabled, the memory
and CPU clocks may become unsynchronized after wakeup. This
causes CPU to fetch incorrect data and eventually trigger SoC
watchdog timeout.

Due to this hardware limitation, SoC should skip entering idle
mode if the remaining timer value is less than 150µs(safe margin).

Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
2025-12-08 06:12:16 -05:00
Jukka Rissanen
e2fa01d2c1 drivers: ethernet: intel_igc: Use net namespaced APIs
One POSIX symbol was not converted to network namespaced API.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:12:04 -05:00
Jukka Rissanen
83e3825654 drivers: net: canbus: Use network namespaced APIs
Use network namespaced APIs instead of POSIX symbols.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:12:04 -05:00
Mario Paja
9065e7b019 drivers: i2s: stm32 sai enable dma data size config
This change enables the user to configure SAI DMA data size.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-07 21:20:06 -05:00
Sreeram Tatapudi
5ecf248ba3 drivers: infineon: Drop cat1 from the files names
Drop cat1 from the file names to enable reuse by other
category devices as well

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-07 21:19:38 -05:00
Jordan Yates
76c5084943 sensor: current_amp: fix incorrect PM error
Returning `-ENOTSUP` (and logging a `LOG_ERR`) is not the correct
behaviour if there is no enable GPIO. The fact there was no work to do
does not make the result an error.

From the docs for `pm_device_runtime_get`
```
 * @retval 0 If it succeeds. In case device runtime PM is not enabled or
 *  not available this function will be a no-op and will also return 0.
```

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-07 21:19:04 -05:00
Michael Smorto
5b05d649d0 drivers: video: Changed common registers to OV767X
Updated register tables to use use OV767X.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
7ac0dc47bc drivers: video: Add OV7675 changes to OV767x
Adds support for the ov7675 camers.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
2ffdb90223 drivers: video: Changes the driver name to ov767x.c
Changes the driver name to ov767x.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
0d5c6aa074 drivers: video: Update OV7670 to use generic ov767x functions
Minimal changes to OV760 drive to use generic ov767x structures.
- This includes changes to function names.
-  Includes changes to defines as necessary.
-  Deleted camera_id as no longer required

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
a6311c5377 drivers: video: Restructure OV760.c driver before adding OV7675 support
Modifications for use of video cci helpers in video_common.h.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Guowei Li
83cfbc634f drivers: intc: gicv3: add ARM AArch32 affinity comparison
This commit introduces a new comparison for the ARM (AArch32) architecture
in the GICv3 interrupt controller.
It specifically compares the lower 24 bits of the affinity values,
because there is no aff3 in AArch32 or Arm-v7.

Signed-off-by: Guowei Li <15035660024@163.com>
2025-12-06 11:39:38 -05:00
Jacky Lee
f2ab79278e driver: spi: egis_et171_spi supports clock driver
Allows "egis_et171_spi" to use basic clock information
provided by the clock driver to calculate the runtime
SPI frequency.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-06 11:39:09 -05:00
Srikanth Boyapally
d784a95c5c spi: cdns: Add support for slave transfers exceeding FIFO depth
Enable slave mode to handle transfers larger than FIFO depth (128 bytes)
by implementing dynamic TX threshold management.

Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
2025-12-06 11:38:51 -05:00
Srikanth Boyapally
4b75597786 spi: cdns: Fix unreliable RX not empty detection with software counter
The Cadence SPI controller has a hardware issue (Xilinx AR#65885
contains more details) where the RX_NOT_EMPTY (RNE) status bit
reports inconsistent state. This causes the driver to unreliably
detect when RX FIFO contains valid data, leading to transfer
failures and test hangs.

Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
2025-12-06 11:38:51 -05:00
Scott Worley
cd6d7c9515 drivers: gpio: microchip: mec: One common driver for all MEC parts
Microchip MEC parts have a similar GPIO peripheral block. We
create a unified driver for all parts. NOTE: MEC GPIO interrupt
detection sets active status when changed from interrupt detect
disabled to any enabled mode. Driver ISR and interrupt configuration
implementation includes work-arounds for this issue.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-06 11:38:34 -05:00
Peter van der Perk
084f2a1dda drivers: pwm: Fix prescaler 256 overflow and get cycles
Setting a prescaler of 256 would overflow the uint8_t.
Also get cycles calculation was wrong.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-12-06 11:37:45 -05:00
Alexandre Rey
2bc15b4532 drivers: i2s: mcux_sai: correct DMA burst length
Set DMA burst length in bytes.
Fixes a bug introduced in #97777.

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-12-06 07:13:05 -05:00
Hake Huang
00e5a399cc drivers: clock_control: kinetis scg support
add driver and dts-binding for kinetis_scg driver
used on ke1xz

Signed-off-by: Hake Huang <hake.huang@nxp.com>
Signed-off-by: Michael Galda <michael.galda@nxp.com>
2025-12-06 07:12:52 -05:00
Yves Wang
9d76a637f9 drivers: watchdog: cop: ignore unused parameter
In install timeout api, the cfg parameter does not make sense to cop, we
can ignore it rather than return an error code to keep forward
compatibility.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-06 07:12:45 -05:00
Badr Bacem KAABIA
c8d9011925 drivers: adc: mcux_adc16: Fix buffer size check for multi-channel reads
The mcux_adc16 driver's read function fails to validate the user-provided
buffer size when `adc_sequence.options` are used (extra samplings).

The calculation erroneously considered only the size required for one
channel, neglecting the total number of channels in the sequence.

This leads to a **buffer overflow** when reading multiple channels.

Fix this by using `POPCOUNT(sequence->channels)` to determine the
correct channel count and ensure the buffer size is sufficient.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-12-06 07:12:36 -05:00
Kate Wang
1527cd506a drivers: display: display_co5300: Update panel driver
1. Fix wrong backlight pin in driver overlay
2. Remove the power-on pin configuration in code and binding, and
add mipi display panel regulator in panel overlay instead. Set
regulator-boot-on' to true means the power-on pin will be enabled
uring system boot.
3. Remove 'last_known_framebuffer' from panel data structure. It is
not used anywhere
4. Fix bug in 'co5300_set_pixel_format' function.
5. Fix the issue that the panel does not support start coordinates
   and the width/height of the updated area being odd value.
   Solution: In panel driver, maintain a full screen-sized buffer,
   its address and pitch alignment is configurable in device tree
   and shall be compliant with the display controller's requirements.
   It can be placed in RAM or if the RAM space is not enough it can
   also be placed in other memory resion. When there is a frame
   update request, the updated area will be first filled to the
   buffer, if the area's size or coordinate is odd, adjust the value
   so the real updated area covers the requested updated area, then
   use this buffer to send pixel to panel, this can ensure the
   updated area's size and coordinate are always even.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Yangbo Lu
216695e91b drivers: eth_nxp_imx_netc: fix wrong irq_lock area in netc_eth_rx
The irq_lock area including net_pkt_rx_alloc_with_buffer() was causing
error "Context switching while holding lock!".
Actually we didn't have any hardware access to protect in netc_eth_rx,
so just removed irq_lock.

Fixes #99694

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-06 07:10:46 -05:00
Charles Hardin
5c70e93afd drivers: pwm: stm32: change the order of deadtime and enable all timers
For stm32h7 the order matters to get the pwm to output the values as
expected. As reported for the the H730 doesn't produce PWM output when
the LL_TIM_OC_SetDeadTime is called after LL_TIM_EnableAllOutputs. So,
switch the order of the calls and this doesn't impact the stm32f413zh
boards.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-06 07:10:01 -05:00
Guillaume Gautier
fbb2848ef2 drivers: spi: stm32: fix spi rtio with fifo-enable
This commit fixes the SPI RTIO transfers when the fifo-enable property is
enabled.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
133da1c017 drivers: spi: stm32: extend data size support
Extend the number of SPI data sizes supported for series that allow it.
The driver uses the new property st,stm32-data-width to create a table
with all compatible data widths and to check if the SPI instance
support the required width (some instances may have a limited set
of widths compared to others on the same SoC).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
f91258d17e drivers: spi: stm32: invert ll_func_spi_dma_busy logic
Inverts ll_func_spi_dma_busy logic so that the function returns true if
the SPI DMA is busy (as suggested by the name) instead of the other way
around.
Also completes the check for H7-compatible with the LL_SPI_IsActiveFlag_EOT
function when transfer size is set.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Yassine Safraoui
50ebaed6bf drivers: i2c: xmc47_relax_kit: fix clock frequency macro
The xmc47_relax_kit i2c driver is incorrectly using the
I2C_SPEED_STANDARD macro to set the clock frequency. The correct macro
to use is XMC4_I2C_SPEED_STANDARD which is defined by the XMC4 driver.

Signed-off-by: Yassine Safraoui <yassine.safraoui@grenoble-inp.org>
2025-12-05 14:55:22 -05:00
Sai Santhosh Malae
f8b5b77348 drivers: spi: siwx91x: Guard callback registration
Guard callback registration with CONFIG_SPI_ASYNC to avoid
build error for blocking SPI transfers using DMA

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
d4b551b3fb drivers: spi: siwx91x: Swap write and read data inside GSPI controller
Swap the write and read data paths within the GSPI controller to ensure
correct data is seen on the SPI lines during 16-bit transfers.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
b6cef6fbf6 drivers: spi: siwx91x: Align mosi_overrun to 32 bytes
Updated mosi_overrun alignment from 4 bytes to 32 bytes to
ensure compatibility with the GPDMA driver. This prevents
alignment-related errors during DMA transfers.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
9ebba6821b drivers: spi: siwx91x: Add support for higher burst rates using GPDMA
Enable higher SPI burst sizes when using GPDMA to improve throughput.
Bursts are only enabled when both TX and RX channels use GPDMA and
the SPI clock frequency is at least 10 MHz, as DMA flow control is
unreliable at lower SPI rates.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
23c8db4f8c drivers: spi: siwx91x: Add helper to round GSPI freq to valid range
Add gspi_siwx91x_pick_lower_freq() to select the nearest lower
supported GSPI clock frequency based on the requested value.
The GSPI clock can operate only at discrete frequencies such as
80 MHz, 40 MHz, 26.6 MHz, 20 MHz, and so on (80 MHz divided by
integer factors). If the requested frequency does not match one
of these valid steps, it is rounded down to the nearest lower
supported frequency.

The driver now logs both the requested and the actual programmed
frequency along with the divider value, helping users verify the
effective SPI clock configuration.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
cbb2fda8d2 drivers: clock_control: siwx91x: Set INTF_PLL_FREQUENCY to 160 MHz
The GSPI and QSPI peripherals run on the interface PLL clock.
To ensure correct operation, the interface PLL frequency should
be set to 160 MHz. This provides a base clock of 80 MHz to the
QSPI peripheral, which matches its required operating frequency.
The GSPI peripheral can continue to operate at higher frequencies
as it receives the full interface PLL clock.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
76b1a07c54 drivers: gpio: siwx91x: Implement device runtime PM for GPIO ports
The existing device runtime PM model requires applications to call
pm_device_runtime_get()/put() on the GPIO controller device directly,
which is not ideal when GPIO ports are exposed as child nodes.

This update enables runtime PM at the GPIO port (child node) level,
allowing applications to manage power through the port devices instead
of the top-level controller.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:53:49 -05:00
Tim Pambor
373d92ae73 drivers: rtc: rtc_shell: add calibration support
Add `get_calibration` and `set_calibration` subcommands to allow users
to read and modify the RTC calibration settings from the shell.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-05 14:53:27 -05:00
Zafer SEN
241fdaa980 drivers: modem: hl78xx: Add AirVantage FOTA support
Sierra Wireless AirVantage FOTA updates in the HL78xx modem driver.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
d2a083c142 drivers: modem: hl78xx: Add AT Shell support
Adds AT shell support, enabling developers to send AT commands directly.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
0124ac6287 drivers: modem: hl78xx: reduce startup_ms and increase init chat timeout
The previous delay could cause missed URCs because the pipe and chat
layer were not yet attached when the modem started sending its first
messages (+KSUP). The modem boot takes ~1.8s, while the driver only
needs ~120ms to set up the interfaces, so reducing the delay ensures
the receiver is ready before the modem outputs any URCs.

Increase hl78xx_init_chat_script command limit from 10 to 100 to allow
longer initialization sequences.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
5caa49c08f drivers: modem: hl78xx: rename timing configs to clarify units
Rename HL78XX device timing configuration options to include units (ms):
- CONFIG_MODEM_HL78XX_DEV_POWER_PULSE_DURATION ->
  CONFIG_MODEM_HL78XX_DEV_POWER_PULSE_DURATION_MS
- CONFIG_MODEM_HL78XX_DEV_RESET_PULSE_DURATION ->
  CONFIG_MODEM_HL78XX_DEV_RESET_PULSE_DURATION_MS
- CONFIG_MODEM_HL78XX_DEV_STARTUP_TIME ->
  CONFIG_MODEM_HL78XX_DEV_STARTUP_TIME_MS
- CONFIG_MODEM_HL78XX_DEV_SHUTDOWN_TIME ->
  CONFIG_MODEM_HL78XX_DEV_SHUTDOWN_TIME_MS

Update MODEM_HL78XX_DEFINE_INSTANCE macro to use *_MS options.

This improves configuration clarity and robustness of modem init.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
4805aafd4e drivers: modem: hl78xx: Improve restart handling and boot tracking
This update refactors the HL78xx initialization and runtime state
machine to provide robust handling of unexpected modem restarts
and improve PDP and boot status management.

Key changes:
- Add KSUP unsolicited response to the global chat match table
  so modem boot status is monitored independently from the
  initialization script.
- Introduce a boot-status structure tracking previous boot state
  to detect unexpected restarts.
- Dispatch a new MODEM_HL78XX_EVENT_MDM_RESTART event when the
  modem reports a READY status after having been previously
  booted.
- Add restart-handling transitions across relevant states
  (await-power-on, RAT-config, await-registered, carrier-on) to
  ensure the driver cleanly re-enters the initialization
  sequence.
- Rework init and post-restart script entry points to run
  asynchronously via hl78xx_run_init_script_async() and
  hl78xx_run_post_restart_script_async().
- Move bus-open and chat-attach operations out of the
  init-script state and into the await-power-on state for
  clearer separation of responsibilities.
- Expose a getter for the AT-ready match structure.

These changes improve resilience during modem restarts, clarify
the state machine flow, and prepare the driver for multi-PDP-
context configurations.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
5c082329c2 drivers: modem: hl78xx: Fix GSM RAT registration and PDP handling
Fix several issues in GSM mode for the HL78xx modem driver to
ensure correct registration reporting, RAT handling, and PDP
context activation.

Changes include:
- Skip band configuration when RAT=GSM to prevent +CME ERROR
  responses.
- Explicit PDP activation (AT+CGACT=1,1) for GSM data sessions.
- Parse +CGACT URCs and track PDP activation state internally.
- Introduce gprs status struct and update initialization
  scripts to handle GSM reliably.
- Add helper functions and chat scripts to manage GSM
  registration and PDP flow.
- Correct GSM registration-status handling: enable CREG=3 and
  disable unused CEREG.
- Dynamically switch between CREG (GSM) and CEREG (LTE/NB-IoT)
  based on active RAT.

These changes improve driver stability and ensure reliable data
and registration behavior on GSM networks.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
bc08d3cdb7 drivers: modem: hl78xx: reorder Kconfig entries, and comment fixes
This patch applies multiple small cleanups across the HL78xx modem
driver, improving readability, consistency, and diagnostics without
changing logic.

Key changes:
- Added missing blank lines in Kconfig sections for readability.
- Improved several log messages for clarity and guidance to users.
- Added a debug log when RAT/Band configuration requires a modem restart.
- Replaced an incorrect SET_RAT_GMS_CMD macro name with SET_RAT_GSM_CMD.
- Added TODO marker for unhandled script failure case.
- Corrected log format string in event handler to include event ID.
- Added an informational log on modem initialization.
- Added clarifying comments in header structures and APN lookup path.
- Normalized #endif comment style throughout the driver.
- Fixed use of CME_ERROR_STRING in chat match definitions.
- Applied formatting hints (clang-format off/on) around multi-line
  MODEM_CHAT_MATCHES blocks.
- Improved enum documentation in public API header.

These changes improve maintainability and developer usability without
modifying driver behavior.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Ioannis Damigos
cc4bc45556 drivers/timer/cortex_m_systick: Avoid division by zero
Preprocessor evaluates CYC_PER_TICK as zero in condition
`(COUNTER_MAX / CYC_PER_TICK) == 1` when
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is defined.

This commit skips the check when
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is defined.

Fixes: #100040

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2025-12-05 11:10:58 -05:00
Fin Maaß
8f8071a546 drivers: ethernet: phy: split generic phy
moves the fixed link functionality of the
generic ethernet phy into its own driver.
This makes both drivers more readable and
efficient.

Also makes it easier to use the normal generic
phy as a base for a vendor specific driver, as
the fixed link functionality is not needed on
them.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Fin Maaß
a21fdccd50 drivers: ethernet: nxp: allow driver to be build without mdio
allow driver to be build without mdio,
implemented similar to ptp.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Alberto Escolar Piedras
efca68625a Bluetooth: userchan: Validate UNIX socket path fits in sockaddr_un
sockaddr_un.sun_path is limited to 108 in Linux
(and to similarly small numbers in other systems).

Let's check that it fits before copying it, and error out otherwise
(the user won't be able to connect to that socket if the path
is truncated, and if we overflow we will just corrupt memory).

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 11:10:38 -05:00