config->adc is of type 'const struct device *', assigned via
DEVICE_DT_GET(). It has no '.dev' member — that field exists only
in 'struct adc_dt_spec'.
The LOG_ERR_DEVICE_NOT_READY() call in lpadc_temp40_init() was
using config->adc.dev, causing a compile error on all platforms
that select NXP_LPADC_TEMP40:
error: 'config->adc' is a pointer; did you mean to use '->'?
Remove the spurious '.dev' dereference. LOG_ERR_DEVICE_NOT_READY()
accepts 'const struct device *' directly, so passing config->adc
is correct and consistent with the device_is_ready() call on the
line above.
Signed-off-by: Bartlomiej Fijal <StaryAnoda@Gmail.com>
When flash_stm32_xspi_init() returns early in the XIP fast path it
leaves layout.pages_size unset. This causes problems for code that
relies on the page layout being available, even in XIP mode. This
commit adds a fallback to ensure a valid page layout is always
available.
Signed-off-by: Julien Racki <julien.racki-ext@st.com>
Add a die temperature sensor driver for Bouffalo Lab SoCs using
the internal TSEN peripheral integrated into the GPADC.
The driver uses the ADC subsystem for hardware initialization and
raw sample acquisition via adc_bflb_tsen_read_phase(). Temperature
is computed from two ADC measurement phases (TSVBE_LOW toggle)
using the formula: temp = (|v0 - v1| - tsen_offset) / 7.753
The TSEN calibration offset is read from efuse when available,
falling back to the default value of 2042.
Includes:
- Sensor driver at drivers/sensor/bflb/bflb_tsen/
- DT binding for compatible "bflb,tsen"
- TSEN nodes (disabled) in bl60x, bl61x, bl70x, bl70xl dtsi files
Tested on BL602, BL616, BL706, and BL704L hardware.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Add temperature sensor (TSEN) support to the BFLB ADC driver.
When input_positive is set to the TSEN channel (14), the driver
automatically configures CONFIG2 for TSEN mode: enables TS_EN,
sets VREF to 2.0V, CHOP_MODE to Vref AZ, and clears test/debug
bits. ADC calibration is skipped for TSEN channels since the
temperature formula uses raw values.
A new adc_bflb_tsen_read_phase() function is exposed for the TSEN
sensor driver to perform the two-phase measurement (TSVBE_LOW
toggle) needed for temperature calculation.
Also makes efuse calibration failure non-fatal (warning instead
of error) since some chips lack programmed trim data.
Signed-off-by: William Markezana <william.markezana@gmail.com>
The current flow sets CS before the SPIM peripheral actually drives
the bus. This can cause SCK to be in the incorrect initial state
dictated by CPOL. New flow enables SPIM after it has been configured,
before CS is set, and disabled is after CS is cleared, thus the bus
is driven by SPIM during the entire transfer.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The gpiote_nrfx.h header is needed for a macro used when handling
NRF52_ANOMALY_58
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The spi context tx_buf, rx_buf, tx_count and rx_count members are
modified during the transfer. These members are currently accessed
in spi_context_wait_for_completion when calculating the expected
timeout, which happens concurrently with the transfer being in
progress. This can lead to concurrency issues as the mentioned
members may be modified independently as they are being accessed by
the thread setting up the wait.
Remove this potential conflict by calculating the number of bytes
as part of spi_context_buffers_setup and store it, before the
transfer is started. Then used the stored value when setting up
the wait.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Ensure SPI pins are correctly configured before setting CS, by
configuring the SPIM before setting CS.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The common pm_suspend implementation for the spi_nrfx_spim drivers
unconditionally sets the sleep state. The sleep state may not be
available, in which case we should not try to set it. Check
CONFIG_PINCTRL_KEEP_SLEEP_STATE and only try to set sleep state if
true.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The header at drivers/spi/rtio.h was moved to a relative path, and
renamed "spi_rtio.h".
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add soc-nv-flash child nodes to the six NXP FlexSPI boards
not yet converted: mimxrt595_evk, mimxrt685_evk, vmu_rt1170
(mx25um51345g), and mimxrt1050_evk, mimxrt1060_evk,
mimxrt1062_fmurt6 (hyperflash).
Update FlexSPI NOR and HyperFlash drivers to read
write_block_size from the soc-nv-flash node. Remove
soc-nv-flash.yaml from hyperflash and mx25um51345g
bindings.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
Apply the formatting-only adjustments flagged by the
ClangFormat compliance check in the STM32 I2C v2 driver.
Keep these style-only changes separate from the functional
commits in the branch.
Signed-off-by: Narek Aydinyan <aydinyan.narek@gmail.com>
Use an explicit boolean comparison for the
target-preempt helper call in the IRQ path to address
review feedback without mixing the style-only change
into the functional commits.
Signed-off-by: Narek Aydinyan <aydinyan.narek@gmail.com>
Replace the hard-coded bus-wait timeout with
CONFIG_I2C_STM32_WAIT_BUS_IDLE_TIMEOUT_USEC and use it when
waiting for the bus to become idle before starting a new
controller session with target mode attached.
Keep wait_bus_idle() thread-context only, switch timeout
tracking to k_timepoint_t, and sleep briefly between BUSY
polls.
Also document why the IRQ transfer path resets
device_sync_sem before arming a new transfer.
Signed-off-by: Narek Aydinyan <aydinyan.narek@gmail.com>
In target+controller mode, the STM32 I2C v2 peripheral can
recognize its own target address while a controller transfer is
being started. If the driver stays on the controller path,
target IRQ handling may be blocked and the bus can hang.
Wait briefly for BUSY to clear before starting a new controller
session when target mode is attached. If own-address recognition
still happens after a controller request has been queued, abort
the controller path and continue immediately with target
handling.
Fold the later handover-only cleanup into this change so the
branch keeps a single commit for the controller/target race
handling behavior.
Fixes#99074
Signed-off-by: Narek Aydinyan <aydinyan.narek@gmail.com>
In multi-master scenarios, controller mode may mark itself active before
START is actually issued. If the controller then waits for BUSY while an
ADDR event arrives in target mode, target IRQ handling can be blocked,
which may leave the bus stuck.
Abort the pending controller START when ADDR is detected so target-side
handling can proceed correctly.
Fixes#99074
Signed-off-by: Narek Aydinyan <aydinyan.narek@gmail.com>
Add QDEC driver support for Realtek Bee series SoCs,
including RTL87x2G (AON QDEC) and RTL8752H (Basic QDEC).
This driver supports:
- X, Y, and Z axis count reading
- Hardware interrupt-based event trigger
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
The SAM0 SPI driver previously supported DMA only for asynchronous
operations, which required higher-level drivers needing blocking DMA
transfers to implement workarounds. This patch extends DMA support
to the synchronous transfer path, enabling efficient blocking SPI
transactions without driver-specific hacks.
With this change, both synchronous and asynchronous SPI operations
can leverage DMA for improved performance and reduced CPU overhead.
Signed-off-by: Ramya T <ramya.t@microchip.com>
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Use the sys_ringq instead of the custom ring_buffer implementation for
SiWx91x I2S driver.
The aim is to reduce code duplication and improve maintainability.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
The SSC I2S driver was using a custom ring buffer implementation for
buffering audio data. This commit replaces the custom ring_buffer
implementation with the sys_ringq implementation to improve
maintainability and code reuse.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Replacing the i2s_litex ring_buffer implementation with the
sys_ringq implementation to improve maintainability and code reuse.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
This commit updates the ipm_console_receiver driver to use the standard
ring_buf API instead of ring_buf_item*.
Since the ipm_console driver operates at the byte level, there is no need
to use the item-level API. This makes way for the removal of ring_buf_item
api in the future.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Replace the ring buffer–based event queue with the new sys_ringq API to
simplify input event handling. The sys_ringq abstraction removes the need
for manual item size management and improves readability by removing logic
regarding item boundries.
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
For ethernet and wifi drivers the carrier
is on by default, no need to set it up in the
iface init again.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add Infineon vendor quirks to the UDC DW2 implementation. This
ties to the infineon,usbhs binding.
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
add driver support for TI MSPM0 AES module
Introduced a hardware accelerated AES driver for the TI MSPM0
enable support for encryption and decryption using ECB and CBC mode
of operation.
Signed-off-by: Girinandha Manivelpandiyan <girinandha@linumiz.com>
This patch handles UULP GPIO configuration when the GPIO_INT_WAKEUP
flag is set. It allows the interrupt to wake the device from deep sleep.
The code has been tested by configuring UULP GPIO 2 (button_0) as a
wakeup interrupt on the siwx91x_rb4338a board.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Add JEDEC IDs 0x19609D (IS25LP256) and 0x19709D (IS25WP256) to the
IS25 family switch. Like other IS25 variants, dummy cycles are reset
before SFDP probe, which handles the full LUT configuration.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
The atomic_cas/atomic_set lock in shared LP RAM does not work
once RISC-V hardware atomics are used: lr.w/sc.w reservation
sets are not honored across the HP and LP harts.
Replace it with a per-direction volatile busy flag and a memory
fence. Sender claims the slot under irq_lock and returns -EBUSY
if the receiver has not consumed the previous message; receiver
clears the flag after the callback runs. Each transition has a
single writer, so no atomic is needed.
Returning -EBUSY matches the pattern used by other Zephyr mbox
drivers (ti_secproxy, renesas_ra_ipc, rpi_pico, xlnx_ipi_mailbox,
ti_omap, mhuv3, renesas_rz_mhu) and lets the caller decide the
retry policy.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
There is a typo in the DT_INST_IRQ_ macro. SDMA was used
until now only with HIFI4 DSP (xtensa) and for this arch
priority parameter is ignored.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The TM1637 support up to 6 digits, or just a single one.
Therefore, update the driver and read the column count from
the device tree to set the numbers of digits in use.
Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
The nRF9160 SLM init script does not query IMSI or ICCID. These fields
require SIM access, which is only available after the modem enters
airplane mode (AT+CFUN=4).
Add AT+CIMI (IMSI) and AT%XICCID (ICCID) to the dial script after
AT+CFUN=4, where the SIM is initialised and accessible. AT%XICCID is a
Nordic-proprietary command whose response carries a %XICCID: prefix,
distinct from the +ICCID: prefix used by other modems. Add a dedicated
xiccid_match for this response format alongside the existing iccid_match
and qccid_match definitions.
Signed-off-by: Nikita Schewtschuk <nik@schew.dev>
For next-generation it51xxx series, external timers switch
from count-up to count-down when combination mode is enabled.
This change introduces Kconfig option to allow selecting
count-up mode according to hardware design.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Add SoundWire Digital Audio Interface (DAI) driver for AMD
ACP 7.0 audio DSP. This enables audio streaming configuration
for SoundWire-connected audio peripherals and codecs.
Also adds DAI_AMD_SDW type to the DAI subsystem enum.
Signed-off-by: Siva Subramanian Ravi Saravanan <sravisar@amd.com>
Add DMA drivers for AMD ACP 7.0 audio DSP:
- Host DMA driver for memory transfers between system memory
and ACP audio processing units
- SoundWire DMA driver for audio streaming over SoundWire bus
Signed-off-by: Siva Subramanian Ravi Saravanan <sravisar@amd.com>
Add interrupt controller driver for AMD ACP 7.0 audio DSP.
Supports up to 9 interrupt sources including DMA and SoundWire
peripheral interrupts via a second-level dispatch mechanism.
Signed-off-by: Siva Subramanian Ravi Saravanan <sravisar@amd.com>
Add support for configuring the LPTMR as a wakeup source by integrating
with the WUC (Wakeup Controller) subsystem.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Fix multiple minor issues which trigger build warnings with clang,
including:
* label followed by a declaration is a C23 extension
* duplicate 'const' declaration specifier (DEVICE_API already has const)
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The configuration passed to lora_config() is not supposed to be modified by
the driver. Make it const to save on RAM.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add a generic software PWM driver as a fallback
when no dedicated hardware PWM pins are available.
This implementation leverages a single hardware
timer interrupt as a time base to derive an
arbitrary number of software-controlled PWM channels.
The period is the same for all channels.
This enables use of LED brightness and blink APIs.
Tested on Nucleo H563ZI with this overlay:
/ {
status_leds: status_leds {
compatible = "pwm-leds";
status_led_1: status_led_1 {
pwms = <&soft_pwm 0 PWM_MSEC(10) PWM_POLARITY_NORMAL>;
label = "1";
};
};
soft_pwm: soft_pwm {
compatible = "zephyr,pwm-bitbang";
#pwm-cells = <3>;
timer = <&tim6_counter>;
pwm-gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
};
};
&timers6 {
status = "okay";
st,prescaler = <24999>;
tim6_counter: counter {
status = "okay";
};
};
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: Stefan Gloor <stefan.gloor@siemens.com>
Add a comprehensive driver for the Microchip PAC194x/195x family of
multi-channel power monitors. This driver supports VBUS, VSENSE,
and power accumulation measurements.
Key features and implementation details:
- Support for PAC1941/42/43/44 (9V FSR) and PAC1951/52/53/54 (32V FSR).
- Efficient I2C handling: uses per-channel burst reads to optimize
bus bandwidth based on enabled channels.
- Flexible Refresh Modes: introduced SENSOR_ATTR_REFRESH_MODE to
allow users to choose between AUTO_WAIT (synchronous),
AUTO_NOWAIT (asynchronous/latched), and MANUAL modes.
- Broadcast Support: added a force refresh command using I2C
General Call (0x00) to synchronize snapshots across multiple
sensors (up to 16 instances) simultaneously.
- Configurable range: support for Unipolar, Bipolar, and Bipolar
Half FSR modes via Devicetree.
Tested on RISC-V (ESP32-C3) with 16 PAC1944 instances.
Signed-off-by: Wojciech Macek <wmacek@google.com>
Extend flash and I2C drivers to support BL808 register base addresses
and SoC-specific configuration guards.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Rename BL61x GPIO and pinctrl drivers to bl61x_808 variants since
BL808 shares identical register layouts. Update compatible strings,
Kconfig, CMakeLists, and BL61x device tree accordingly. Extend the
DMA and IR receiver drivers' BL61x guards to also cover BL808.
Signed-off-by: William Markezana <william.markezana@gmail.com>
