Combine the Cortex-M7 ENET workaround updates into one commit.
- clear CACHE_ENET on i.MX RT11xx Cortex-M7 for ERR050396
- disable ETH_NXP_ENET_USE_DTCM_FOR_DMA_BUFFER by default on Cortex-M7
- keep the final Kconfig condition independent of
DT_HAS_NXP_ENET1G_ENABLED
This avoids touching the same Kconfig and SoC files in follow-up
commits while preserving the intended behavior for PR #106679.
Validation:
- branch history squashed so workaround files are updated once
in the series
Signed-off-by: Hake Huang <hake.huang@nxp.com>
Handle both RX frame and RX buffer interrupts in the NXP ENET driver.
This matches the MCUX HAL interrupt handling and avoids leaving RX work
queued behind an unhandled RX buffer interrupt source.
Validation:
- built samples/net/dhcpv4_client for mimxrt1170_evk@B/mimxrt1176/cm7
with boards/nxp/mimxrt1170_evk/dts/nxp,enet1g.overlay
- verified MCUX HAL uses RX frame and RX buffer interrupts together
Signed-off-by: Hake Huang <hake.huang@nxp.com>
Add driver for the NXP RTC analog module found on MCX L series
SoCs. This RTC supports BCD time/date mode with hundredths-of-second
resolution and 3 independent alarms.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Set tx_config.xferPending when a read follows the write so the PDL
holds the bus and generates a repeated START instead of STOP.
Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
The PDL bundles completion (RD_CMPLT/WR_CMPLT) and ERR events into
a single cbEvents() call. The handler gave transfer_sem twice, leaking
count to the next transfer on i2c_scan.
Make the error and completion paths mutually exclusive with else-if
so exactly one k_sem_give() occurs per callback.
Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
On STM32H5 / STM32U5 with GPDMA the USART can stop generating DMA RX
requests after uart_rx_disable() clears DMAR and DMAR is later re-enabled.
Toggling the USART enable (UE) before re-asserting DMAR resets the USART
internal state machine and allows RX DMA requests to resume.
Fixes: #101345
signed-off-by: Ashirwad Paswan <ashi06712@gmail.com>
This commit edits mspi_stm32_xspi and
mspi_stm32_ospi drivers to include S_D_D
data rate support and refactor some blocks.
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Signed-off-by: Sarah Younis <zephyr@exalt.ps>
This commit extends mspi_stm32_xspi and
mspi_stm32_ospi drivers to add timing support
required for external PSRAM devices.
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Signed-off-by: Sarah Younis <zephyr@exalt.ps>
This commit adds support for APS256 and APS6408L in RLC/WLC
configuration. This includes a dedicated mapping for these
variants.
also this commit updates:
- Read/write length handling for APS256/APS6408L
- Vendor ID read sequence to support APS256/APS6408L
register behavior
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Signed-off-by: Sarah Younis <zephyr@exalt.ps>
The `pinctrl_soc_pin_t` format occupied two uint32_t even though all info
it stores can be compressed in 32 bits only, and also didn't map very well
to the hardware (especially on STM32F1). Due to defects, the format was
also NOT what the `stm32_gpioport_configure_pin()` function consumed to
actually configure a GPIO port, requiring additional decoding/manipulation
logic.
Introduce a vastly reworked format which only requires 32-bit per pinctrl
entry and maps nicely to hardware and becomes the new format consumed by
stm32_gpioport_configure_pin(). This heavily simplifies the pinctrl driver
since it no longer needs to examine the actual values (except to determine
the target GPIO port and pin - this is done on purpose!). The GPIO driver
converts Zephyr flags to this new format too.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Instead of silently ignoring the flags, warn the user when an illegal
GPIO configuration is provided on STM32F1. To avoid breaking backwards
compatibility and tests, the old behavior is however retained.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Simplify the logic translating Zephyr GPIO flags into STM32-specific flags:
- flatten if chain for output type determination
- change how input modes are handled
- introduce new INPUT_FLOAT/INPUT_PUPD pincfg values which are used for
input mode depending on whether or not user requests pull-up/down
- these values can have the PULL_UP / PULL_DOWN OR'ed into them
- share PU/PD decoding between INPUT and OUTPUT mode
While at it, also return -ENOTSUP to caller if attempting to set a pull-up
or pull-down on a disabled pin instead of silently discarding the request.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move the logic which sets the output level based on configuration to the
common `stm32_gpioport_configure_pin()` function to reduce duplication.
To support the GPIO use case where a pin's configuration is changed without
modifying its output state, a new parameter is introduced which specifies
whether or not the output level should be modified.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Use `_Pos`/`_Msk` suffixed defines for pinctrl format bits definitions and
declare `_Msk` already shifted. This is aligned with the CMSIS definitions
format which shorter, easier to understand and enables use of
macros _FLD2VAL/_VAL2FLD.
Update all code using these defines accordingly.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Flags were already converted to 'ret', but this value was not used in the
nsos_adapt_fcntl_setfl() invocation. Introduce 'mid_flags' to make it more
readable and pass that value to nsos_adapt_fcntl_setfl() for proper flags
conversion.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This function already returns errors in "mid" namespace, so return
NSOS_MID_SO_ERROR in "mid" namespace, so propagate that value directly.
This error is converted to Zephyr error namespace in nsos_connect().
While at it, add a comment related to the 'ret' variable.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Return error code in "mid" namespace, to be consistent across all
nsos_adapt_sendmsg() return values.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Add addrinfo mapping between host and Zephyr. This fixes issues for example
when AF_INET had to be mapped between host (value 2 in glibc on Linux) and
Zephyr (value 1).
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
There was a copy-paste error, resulting in conversion to AF_UNIX.
Additionally sll_family needs to be converted to from "mid" to "host"
value.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
We don't need to save the MAC address in the data
struct, therfore use a local var in the iface init for it.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
move dev init into iface init. By registering the
uart pipe at the end of the iface init, we also no longer
need to check in the callback if the iface init was done.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Added support for the MDINT interrupt pin, through which the PHY signals
the MCU when certain link events occur.
Signed-off-by: Robert Khanafiev <robert.khanafiev@fischer-electronic.com>
The link was monitored in a separate thread that was initialized with
an incorrectly defined stack. This caused an exception on some systems.
The thread has been replaced with a dedicated workqueue.
Signed-off-by: Robert Khanafiev <robert.khanafiev@fischer-electronic.com>
Add rtc node on stm32n6 DT.
Enable backup domain access before RTC clock configuration and not after.
Add rtc to the supported tags
Signed-off-by: Basile GRUNER <basile.gruner@smile.fr>
This reverts commit 6685c3028b
in order to refactor the handling of indexed 4 bit pixel formats
We can handle indexed 4 bit pixel formats in a generic way without having
to resort to "private" pixel format definitions. This introduces a new
pixel format, PIXEL_FORMAT_I_4, for (up-to) 16-color palette displays.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add a Kconfig CONFIG_DAI_MAX_BESPOKE_CFG_SIZE to configure the maximum
blob size for dai_config_set. This only affects user-space usage via
syscalls when the blob needs to be copied to kernel memory before
validation.
The default is increased to 1024 to make tests pass with upstream
SOF project configurations.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Add driver support for TI MSPM0 ADC module.
Add a configurable reference voltage support with vref.
Add this driver in shell.
Signed-off-by: Jackson Farley <j-farley@ti.com>
Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
Unify all "device not ready" error messages across sensor drivers with
the LOG_ERR_DEVICE_NOT_READY macro, following the pattern established
for input drivers in commit 31b5866.
This improves consistency and makes device readiness errors easier to
grep across the codebase. Using the standardized macro ensures device
names are properly formatted with null-safety checks.
Image size impact (tests/drivers/build_all/sensor on native_sim,
building 211 sensor drivers):
- Before: 1,033 KB (text: 961 KB)
- After: 1,036 KB (text: 964 KB)
- Change: +2.5 KB (+0.25%), text: +2.5 KB
The small size increase is due to the macros adding null-safety checks
and dynamic device name formatting, which generates slightly more code
than some of the simpler static log strings used by drivers previously.
Assisted-by: Claude:claude-sonnet-4.5
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Several sensor drivers were logging device readiness failures as LOG_DBG
rather than LOG_ERR, making initialization failures harder to diagnose.
These readiness checks occur during device initialization and return error
codes, so they should be logged as errors rather than debug messages.
This change affects drivers that check for bus or GPIO device readiness
and ensures consistent error reporting across the sensor subsystem.
Assisted-by: Claude:claude-sonnet-4.5
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
There is no reason to not have DMIC be a proper driver class, so make
the appropriate change so that DMIC drivers actually populate a
driver_api struct.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
