The new DSA framework purpose and changes are as below.
- Aligned to Linux DSA framework which has been already mature framework
for many years, For now in zephyr, the DSA components were splited
as: switch, port, master(not need driver file for now), slave, and tag.
Seperated drivers were used for maintaining and developing new
features.
- The unified dts bindings (aligned to linux) were supported. The port
driver would parse DTS to decide the port type (master port, slave
port, or cpu port) to set up the switch. All the ports registered as
standard ethernet devices. (dsa port and dsa switch tree was not
supported.)
- How to add DSA device driver based on the framework? All the device
driver needing to do is providing dsa_spi implementation and private
data, and calling below initialization.
DSA_INIT_INSTANCE(n, _dapi, data)
- For switch tag case, recv/xmit helpers in dsa_api could be used for
taging/untagging. No modified ethernet drivers.
For no-tag type case, ethernet driver of master port should support
packet injection/extraction for slave ports leaving NULL recv/xmit.
The dsa_nxp_imx_netc.c driver will be the first example of the new DSA
framework.
The future work for DSA will be supporting bridge for ports. We may align
Linux to give users two options to use DSA device:
- Standalone mode: the switch ports work as regular ethernet ports.
- Bridge mode: switch mode with virtual bridge device which could be
assigned IP address.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Current DSA TX/RX way was hard-coded in ethernet devices driver
with ETH_DSA_SUPPORT and NET_DSA.
This patch is to make such way obsolete, as we actually will support
a better DSA framework to handle this in NET/DSA core driver.
To make legacy devices not affected, below options are used instead.
- ETH_DSA_SUPPORT_DEPRECATED
- NET_DSA_DEPRECATED
Once the legacy devices are converted to new DSA framework, this code
could be removed.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add Bouffalo Lab serial driver. The driver uses pinctrl to configure
pins and have power management capabilities.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add it515xx analog to digital converter driver which supports 8 channels
ch0 ~ ch7 and 12-bit resolution.
Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
When GPIO17 or 16 is used as an external REF_CLK signal, the output is
enabled in eth_esp32.c This was added in PR number #65759 and then refined
in PR #74442. However this does not work for PHYs which need the REF_CLK
for MDIO communication, such as LAN8720A. In such cases phy_mii driver
tries to get the ID of such a PHY before REF_CLK is present. Therefore
in this PR I propose to move REF_CLK initialization from eth_esp32.c to
mdio_esp32.c which gets initialized before PHY and ETH.
Signed-off-by: Łukasz Iwaszkiewicz <lukasz.iwaszkiewicz@gmail.com>
move net_if_carrier_off() before
phy_link_callback_set() to ensure the carrier is
not truned off, when the link is already up.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
move net_if_carrier_off() before
phy_link_callback_set() to ensure the carrier is
not truned off, when the link is already up.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
move net_if_carrier_off() before
phy_link_callback_set() to ensure the carrier is
not truned off, when the link is already up.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
There is no smartdma on RT700, so to perform DCS memory write the CPU has
to write APB buffer word by word, which is too slow for most applications.
But the DCNano in DBI mode can be used to interface with the MIPI-DSI on
RT700, and send data to MIPI-DSI to transfer, once it is properly
configured, which solves the issue.
First added new parameter first_write in display_buffer_descriptor to let
NXP DCNano DBI driver know to use MIPI_DCS_WRITE_MEMORY_START or
MIPI_DCS_WRITE_MEMORY_CONTINUE.
Second updated the MCUX MIPI-DSI driver to support using the NXP DCNano DBI
driver for memory write.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Introduce NXP NCNano driver using MIPI DBI class. This peripheral
supports 8080 and 6800 mode. The driver also supports used with
nxp,mipi_dsi_2l driver, for the panel with DPHY bus, such as g1120b0mipi.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Update nxp,dcnano-lcdif to support IP change on RT700. There are extra
registers need to be configured for the lcdif on RT700. Add new binding
item "version" to tell which version of the IP the SoC has.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
update remaining steps should just update the remaining steps, rescheduling
should happen after updating steps and hence is moved to position mode task
which is also in coherence with velocity mode task
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
The low level function names in the stm32l4xx low level driver are
different than all the other stm32's even though the functionality is the
same. This breaks the entropy module for these parts. This patch fixes the
build and has been tested on a custom stm32l4p5 board.
This STM32CubeL4 issue has been reported (ST Internal Reference: 207828).
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/88621
Signed-off-by: Matt Ihnen <matt.ihnen@gmail.com>
Addressed an issue where alignment of dma desc varaible
of dma0 is corrected to 1024 instead of 512.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Addressed an issue where regular/non-scatter-gather DMA
transfers were not explicitly using the primary DMA descriptor
structure. This ensures a smooth regular DMA transfer after
any scatter gather transfer.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Introduced a new variable in the `dma_siwx91x_channel_info`
structure to provide a clean way to differentiate transfer
directions. This enhancement is utilized to trigger software
requests specifically for memory-to-memory transfers
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
In Clang 16 run with some flags, the compiler does not accept a static
const variables as struct initializer. This caused build errors in only
some contexts. Always use the devicetree macros to access the source
device node as a workaround.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Add stub functions for the I2C DMA callbacks, which are invoked
during or upon completion of DMA-based I2C transactions. Without
these, NULL pointer calls occur on DMA transfer complete or error
events, leading to faults within ISR context.
Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
This patch allows ti_dmtimer to provide the symbol z_sys_timer_irq_for_test
whenever tests are enabled. Not providing this results in failing some
kernel test cases which require this symbol.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Call i2c_rtio_complete with a non-zero status code in case of an error
so that application does not get stuck waiting for the completion queue
event. An example to this situation could be an I2C target device
responding with a NACK to a read or write request by the controller.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Allocate the memory in `nrf_wifi_if_send` *before* taking the nrf70
global mutex. This prevents the function from deadlocking the
application if attempting to send under memory-pressure, since many of
the memory release paths also happen under the global mutex.
Signed-off-by: Jordan Yates <jordan@embeint.com>
In some case, we may need to describe a domain clock for a device
while there is no way to configure it.
Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
Updates uart_mgumgr_recv_cb to uart_mcumgr_recv_cb to reflect the context
in which it is used.
Signed-off-by: Daniel Mangum <georgedanielmangum@gmail.com>
The I2C shell allows a user to input "i2c scan i2c0" for instance, to
scan addresses on the i2c0 bus enabled in DT. This currently causes
an infinite loop when CONFIG_I2C_MAX32_INTERRUPT is enabled.
The infinite loops happens because 0-length transactions
(tx_len == rx_len == 0) not being handled both by the Async
i2c_max32_transfer and by the controller ISR.
This commit makes two changes:
1) [ISR] When an address ACK is received, if there is simply no data to
send or receive, then just give up the semaphore, preventing the
i2c_max32_transfer function from waiting infinitely.
2) [i2c_max32_transfer] After getting the semaphore back, if there is no
data to send or receive, then avoid waiting for the BUSY flag to clear
since clock stretching should not occur by definition for transactions
which merely contain an address ACK.
Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
Move MSPI NOR commands to rodata.
Replace array with empty padding (~1kB) with macro-based assignments.
Ref: NCSDK-32779
Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
Extend driver to support single lane and 1-4-4 IO modes.
Move flash chip quirks to a separate file.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Added driver for the PAJ7620 gesture sensor. For now,
just added basic gesture mode, although sensor also
has other modes (proximity and cursor modes).
Signed-off-by: Paul Timke Contreras <ptimkec@live.com>
