Initial commit for a STM32L152 based GPIO expansion chip.
The mfxstm32l152 driver offers GPIO controller fonctions.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This is necessary for the I3C device type check, tested with:
west build -p -b nucleo_h563zi samples/subsys/shell/shell_module
-DCONFIG_I2C=y -DCONFIG_I2C_SHELL=y -DCONFIG_I3C=y
and
west build -p -b nucleo_h563zi samples/subsys/shell/shell_module
-DCONFIG_I2C=y -DCONFIG_I2C_SHELL=y -DCONFIG_I3C=n
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Added a length check in the spi write incr routine to handle both
single and multi byte write operations properly.
Signed-off-by: Mayank Narang <narang.may77@gmail.com>
The lis2de12 sensor driver spi interface was calling spi read api.
This leads to a single byte operation on reading acceleration data
which is a multi byte operation. Fix it by adding a call to spi read
incr api instead. Added a length check to handle both single and multi
byte read properly.
Signed-off-by: Mayank Narang <narang.may77@gmail.com>
If DMA-based transaction fails, usually due to a timeout, DMA channels
may need to be explicitly stopped otherwise further calls to transceive
function will immediately return due to DMA constantly being busy.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Hardware chip select is originally handled by the HAL driver. However, a
finer grained control is needed to keep CS asserted between requests and
deassert it after last request is completed. Workaround this problem by
handling hardware chip select in Zephyr driver.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
`NRF70_SYSTEM_WITH_RAW_MODES` is more accurately described as an
additional option on top of `NRF70_SYSTEM_MODE`, not as a unique
choice of `NRF70_OPER_MODES`.
This allows the elimination of multiple `NRF70_SYSTEM_MODE ||
NRF70_SYSTEM_WITH_RAW_MODES` dependencies.
Signed-off-by: Jordan Yates <jordan@embeint.com>
This was present in the form of video_pix_fmt_bpp() inside ST and NXP
drivers, and was returning the number of bytes, which does not allow
support for 10-bits, 4-bits or non-byte aligned video formats.
The helper leverages the VIDEO_PIX_FMT_*_BITS macros.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Changes introduced in 293b9a16ca didn't
verify correct behaviour when running `TIMER1` with `TIMER0` is paused,
and was reporting the wrong tick counter being incremented. Correct this
and extend the testing to verify correct behaviour.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add the possibility to activate the XBARB driver
Update NXP HAL revision to include support for xbarb
Signed-off-by: Mathias Landolt <mathias.landolt@loepfe.com>
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
TI OMAP mailbox is the inter-processor mailbox IP found in TI
K3 devices (AM62X, AM64X, J721E .etc). The mailbox hardware uses
a queued mailbox interrupt mechanism that provides a communication
channel between processors through a set of registers and their
associated interrupt signals by sending and receiving messages.
The interrupt/bank associated with each processor entity is found
through the usr_id property from device tree.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
The `BT_DRV_RX_STACK_SIZE` config is used by HCI drivers to determine a
suitable stack size for their RX thread. These threads handle the HCI
transport and pass HCI messages to the Bluetooth host via `bt_hci_recv()`.
Previously, the default stack size was 256 bytes, but it seems to be too
small currently.
Measuring the peak stack usage of `bt_hci_recv()` in different scenarios
indicates that the function needs over 300 bytes of stack. Thus, an RX
thread stack size of 512 should cover that and leave some margin.
Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
The EUSART peripheral must always be enabled in configure(), as
its enable state gets cleared when the state machine is unretained
in deep sleep. The rest of the config registers are retained,
so they can continue to not be repainted on every configure() if
the context is the same as last time.
Remove unnecessary duplicated enable at the end of configure(),
the SPIInit HAL function already performs enable.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Only lookup for i3c devices if I3C=y, fixes a build error:
zephyr/drivers/i2c/i2c_shell.c:
In function 'device_is_i2c':
zephyr/drivers/i2c/i2c_shell.c:341:43:
error: array type has incomplete element type 'struct i3c_driver_api'
341 | return DEVICE_API_IS(i2c, dev) || DEVICE_API_IS(i3c, dev);
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix compiler warning when optional property reset-gpios
is not supplied in the ti,tcan4x5x-compatible device tree
node
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Add support for TRNG peripherals that lack interrupt lines in the STM32
entropy driver.
This enables usage of the TRNG of STM32WB05/06/07 SoCs with the driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Allow DSA_TAG_SIZE to be set based on the size determined by Kconfig
and the enabled switch hardware.
This fixes support for the KSZ8863 which also has a tail tag of
one byte.
Signed-off-by: Bas van Loon <s.r.vanloon@ziggo.nl>
Drop few redundant device_is_ready for functions that are only used as
argument to shell_device_filter, as shell_device_filter checks for that
alrady.
Suggested-by: Yishai Jaffe <yishai1999@gmail.com>
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit replaces a bunch of ifdefs and bindings with a single
extensible binding, and makes all standard mtime system timers consistent.
Signed-off-by: Camille BAUD <mail@massdriver.space>
In order to allow a custom disk name same as with the standard
sdmmc driver an additional device-tree property was introduced.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Split the USART driver into separate implementations for Silabs Series 2
and Series 0/1 boards. This change improves maintainability (especially
with the support of pin-ctrl and clock-ctrl on series 2 boards).
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
DMA transfers are supposed to write to buffer tail. Use the proper
pointer to make multipart DMA transfers actually write the data to the
intended location.
The issue was observed on control write transfers where the OUT Data
Stage was at least 128 bytes (because endpoint 0 transfer width is
limited to 7 bits).
The issue is unlikely to happen on non-control transfers because the
transfer size width is at least 11 bits (at most 19 bits) and packet
size counter is at least 4 bits (at most: 10 bits) which means that
at least 2048 byte transfer spanning at least 15 packets (or at least
524288 byte spanning 1023 packets for 19 bits transfer size counter
and 10 bits packet counter) is required to necessitate multipart DMA.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Prepare buffer to receive SETUP data on OUT endpoint 0 after endpoint
halt. This solves the issue where the device would no longer process any
control transfers after the first failed transfer with too large OUT
Data Stage (when processing failed due to data stage buffer allocation
failure).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The DOEPTSIZ0 XferSize field is 7 bits long, meaning that maximum single
transfer can be 127 bytes long. Configure the control write (OUT)
transfers considering the XferSize field size to support transfers with
data stage larger than 127 bytes.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
