The driver was unconditionally setting hal_dev->cs_pin_id to the target
number, which activates hardware CS lines even when GPIO-based chip
select (cs-gpios) is used. This caused issues when using hardware CS
via pinctrl with reg > 0.
Also update the binding documentation to clarify the interaction between
cs-gpios and hardware CS via pinctrl.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add devicetree properties to control UHCI SLIP encoding/decoding
when using UART with DMA (async API). Both properties default to
disabled to prevent unintended data corruption.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
1. For the situation when the RAM space is limited and the driver's
frame buffer cannot be place in RAM, add a new property 'ext-ram' in the
binding, so if in device tree this property is assigned to a secondary
RAM space, place the frame buffer there. The old way is to define the
frame bufeer address in Kconfig, which may cause inconvenience if other
data also needs to be placed in the same RAM space.
2. Update the driver to support new requirement on RT700. The IP requires
a 64-byte alignment for the frame buffer stride.
3. Update the calculation of frame buffer size. If the pixel format is
updated, the frame buffer size shall be updated too.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
PINT connects GPIO pin to seperate IRQ slot. This info is
hidden in PINT driver, there is no way to know which IRQ
actually the GPIO pin is connected to.
Add new API to get which IRQ slot is connected to, based on
pin index.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Disable rejoin by setting max_retry_attempts to 1. This is done to keep
the NWP state in sync with Zephyr Host, given that Zephyr does not have
a "rejoin ongoing" state.
Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Since the w5500 is used in arduino shields it should use the current
code patterns since it will be examined as a reference for other
drivers. So, this is just trying to catch up to the changes that have
been made in the microchip, litex, and virtio drivers.
Use the net_eth_mac_load code pattern from those other drivers and
update a few things to the code guidelines as well.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
From the prior change b38a46bade adding
in the mac configuration in the device tree it is appropriate to
remove the local mac address bindings. This is done in this commit.
There is no intended functional change
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Preserve the volatile qualifier when casting the shared memory pointer
in flash_cpu01_receive_cb() to avoid dropping volatile semantics during
inter-processor communication.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The driver gives us this information, so we just need to translate it to
Zephyr's type like we already do for security.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
`SHELL_STACK_SIZE` should not be redefined as a symbol with no
dependencies, it should be applying a new default to the existing
symbol.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The combination of two different return variables (`status` and `ret`)
resulted in most failure paths through the bringup code still returning
success.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Preserve original write length for DCACHE_InvalidateByRange()
Guard declaration of `size` with CONFIG_HAS_MCUX_CACHE to avoid
unused-variable warnings when cache is disabled
Add pointer validity checks before cache invalidation
Signed-off-by: Holt Sun <holt.sun@nxp.com>
In async UART mode with DMA, the RX completion callback was incorrectly
relying on rx_counter which is never updated in DMA mode since data
bypasses the UART FIFO via UHCI+GDMA.
Fix by reading the actual transferred byte count from the DMA
descriptor's length field using gdma_ll_rx_get_success_eof_desc_addr().
Direct LL calls are used because this runs in ISR context where
dma_get_status() is not IRAM-safe.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Added configuration option to disable auto acknowledgment for
virtual wire WARN signals and added a callback to handle them.
This change introduces:
1. Support to disable automatic acknowledgment for VW WARN signals.
2. A callback mechanism to notify application firmware for explicit
handling.
Behavior:
1. If auto-ack is disabled, the callback notifies the application to
handle VW WARN signals.
2. If auto-ack is enabled, the driver acknowledges VW WARN signals
without notifying the application.
Signed-off-by: Yerrajennugari Raj Kumar <yerrajennugari.raj.kumar@intel.com>
Fixed the following bugs with the heartbeat monitor
- State did not update on CHAN_ALL
- Adjusted semaphore behavior
- Fixed interrupt setup
- Fixed time calculation bug
- Split heartbeat update into seperate function call
Signed-off-by: Robert Perkel <robert.perkel@microchip.com>
The previous implementation had three issues regarding temperature
reading:
1. The unit scaling was incorrect. The datasheet specifies 0.125 C/LSB,
but the code multiplied by 125 instead of 125000 for micro-degrees,
resulting in values off by a factor of 1000.
2. The MSB and LSB registers were read in two separate transactions,
which is not atomic.
3. The bitwise reconstruction of the 11-bit value was inefficient.
This commit fixes the scaling factor to 125000, implements a burst read
for both temperature registers to ensure atomicity, and optimizes the
bit manipulation logic.
Signed-off-by: Liang Jiaxiang <moonbite233@gmail.com>
The payload status is evaluated when decoding, which may indicate sharp
distance transitions (from very long to close) and requiring a few more
cycles to stabilize. We don't want to stop the data-stream because of
these, otherwise the data-stream continuity is compromised.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The clock options used within the driver are supposed to be ordered
from lowest to highest power consumption, so the lowest/default
option is the most power efficient. The order was reversed to make
the init code of the lfclk a bit simpler, and this was accounted for
in the clock option lookup function. However, the common nrf clock
control request/release feature would request the lowest index, not
the lowest clock option, so the lfclk would default to its highest
power consumption mode.
The clock option init and lookup has been refactored to be sorted
from lowest to highest power consumption, and comments have been
adjusted accordingly.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
- Update the driver to support the kit_pse84_eval board
- Update to new peripheral clock allocation scheme
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
New hal_nordic was merged some time ago, fix no longer needed.
This reverts commit fe0b6b3b55.
Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
This modification prevents the bet pointer from being nulled at the end
of the loop, which would otherwise render the search for a suitable
erase type ineffective. It also optimize the loop as it omits
unnecessary operations.
Without this change, the erase size defaults to one sector. If the chip
defines fewer than JESD216_NUM_ERASE_TYPES (=4) erase types, this
behavior still works, as the resulting command will correspond to a
sector erase operation. However, if the chip defines all erase types,
the resulting command will be the one specified in the erase type. But
since bet is nulled, the erase size will incorrectly default to the
sector size.
Signed-off-by: Martin Gysel <me@bearsh.org>
depending on build configuration, spi_context_cs_configure_all() is a
no-opt, so mark the data variable as maybe unused.
Signed-off-by: Martin Gysel <me@bearsh.org>
- call spi_stm32_pm_policy_state_lock_xxx functions wenn context is
locked
- do not call spi_stm32_pm_policy_state_lock_put() in internal helper
spi_stm32_complete() (which gets called from various places) but at the
end of a transfer where it belong
Signed-off-by: Martin Gysel <me@bearsh.org>
Move most of the code that is used to interface with IronSide SE on the
nRF54H20/nRF9280 from the soc/nordic directory to the hal_nordic
repository. The interface code is now provided by the new IronSide
support package. Build system code and glue code that makes use of
Zephyr APIs is now located in the modules/hal_nordic directory.
Update the directory path for IronSide SE interface code in
MAINTAINERS.yml to match the move from soc/nordic/ironside to
modules/hal_nordic/ironside.
Also included are some refactoring changes and cleanup to match the new
supporting code.
C code and Kconfigs have been renamed to *ironside_se* / *IRONSIDE_SE*
to match the supporting code changes. Users of these APIs in zephyr
have been updated to match.
Individual configurations for different "IronSide services" have been
removed as the API serialization for all of these is now provided in
a single C file / header file (ironside/se/api.h).
The ironside_boot_report_get() API has been removed. The boot report
structure can be accessed through the IRONSIDE_SE_BOOT_REPORT macro.
Most configs relating to UICR / PERIPHCONF have been moved under the
"IronSide SE" menu to make it clear that these are part of the
IronSide SE interface.
The macros that in uicr.h that were used to add entries to the
PERIPHCONF section have been removed. The supporting code now provides
PERIPHCONF_XYZ() macros that can be used to initialize structures that
go into this section, and the zephyr part now only contains a macro
UICR_PERIPHCONF_ENTRY() that is used to place an arbitrary structure
into the section. The gen_periphconf_entries.py script used to generate
PERIPHCONF entries based on devicetree has been updated to use the new
macro system.
IronSide SE integration code/configs is now guarded by HAS_IRONSIDE_SE.
Note that the UICR build system integration that relies on Sysbuild
remains under the soc/nordic directory for now, but will be moved to
the modules/hal_nordic directory once it is clear how the integration
will look there.
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Current driver protections prevent to initialize driver when run as from
an external application running from ext flash. Aim is to avoid performing
full driver initialization of the NOR flash controller the application
is read from.
But this problem is actually only valid when application is running in XIP
mode (read in memory mapped mode at run time).
In ram load mode, since there is no direct activity from the application
on the NOR device, nothing prevents the ext flash driver to be used fully.
Hence, we should allow the controller initialization to happen, with some
adjustments. Mostly, what we need is to:
- skip the hal init
- abort memory mapping afterwards to let the jedec reading happen.
Remove conditions around `stm32_xspi_is_memorymap()` and
`stm32_xspi_abort()` which can finally be useful in various cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add support for gesture / motion based interrupts
when INPUT_CST816S_EV_DEVICE is enabled.
Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
rts5913_sha256_update was changed in #94218, but this function passes
it's input into rts5912_sha256_process also.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Add support for Nuvoton NuMaker M55M1X high-speed USB 2.0 device
controller. Compared to M46X HSUSBD, M55M1X HSUSBD introduces some
differences:
- DMA must handle cache coherency because net_buf can be cache-able
- USB suspend interrupt becomes continuous. Aavoid being locked by
this interrupt and forward this message just once
- New register bit HSUSBD_OPER_HISHSEN_Msk, which controls to enable
USB handshake
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Add support for Nuvoton NuMaker M46X high-speed USB 2.0 device
controller.
The code is re-organized to implement both usbd and hsusbd in single
source file. Multiple instances of either usbd or hsusbd are supported,
but usbd and hsusbd cannot support simultaneously. This limitation is
for easy implementation with just single source file, assuming that real
application just needs one usb device type.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Previous control transfer can be incomplete and then causes not only
net_buf leak but also logic error. This recycles dangling net_buf for
new clean control transfer.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
On Control Out failure, this changes to report error message instead of
assert failure because USB bus error is allowed to happen.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Refine code on ATTR undefined bits:
- Add USBD_ATTR_PWRDN_Msk if it is not defined
- Following BSP USBD driver, add note on BIT(6) for hidden
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
the phy is already configured by the phy driver in zephyr
and we don't want to overwrite it in the HAL_ETH_Init
function in the stm32 HAL.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This patch is a workaround to a know issue when Bluetooth and pm
is activated.
We actually need to set the tx power to the Bluetooth controller
(network coprocessor) before sending power saving request to the
coprocessor.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
If PKA is running, it needs the RNG clock to properly works.
Don't turn it off when RNG computation is over.
Signed-off-by: Gaétan Froissard <gaetan.froissard@marshmallow.kids>
