Building with clang warns:
drivers/sensor/st/lsm6dso/lsm6dso.c:89:19: error: unused function
'lsm6dso_reboot' [-Werror,-Wunused-function]
static inline int lsm6dso_reboot(const struct device *dev)
^
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Building with clang warns:
drivers/sensor/st/lsm6dso16is/lsm6dso16is.c:83:19: error: unused
function 'lsm6dso16is_reboot' [-Werror,-Wunused-function]
static inline int lsm6dso16is_reboot(const struct device *dev)
^
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Building with clang warns:
drivers/flash/spi_nor.c:306:20: error: unused function
'delay_until_exit_dpd_ok' [-Werror,-Wunused-function]
static inline void delay_until_exit_dpd_ok(const struct device *const dev)
^
delay_until_exit_dpd_ok is only used when ANY_INST_HAS_DPD is defined.
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
This driver allow to use Zephyr native IP stack or the IP stack provided
by HAL / WiseConnect.
The WiseConnect implementation may take advantage of the specific
features provided by the 917 (power consumption, speed,
validation...).
Some notable features are not available with this interface:
- It seems Zephyr does not provide API to offload multicast membership
management. User should be to directly call WiseConnect APIs
- Support for ICMP frames is difficult. Note that WiseConnect
automatically answer to ping request. It is just not possible to
send ping requests and receive ping responses.
- Zephyr and WiseConnect both support TLS offloading. However this
patch does not implement it.
- Reentrancy in the WiseConnect side is uncertain.
This implementation has been tested with samples/net/wifi/ (which relies
on subsys/net/lib/shell).
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Driver was tested with a custom application which enabled the BT_SHELL.
Basic functionalities were verified:
- Scanning
- Advertising
- Connecting
Configuration needed for the test:
- CONFIG_BT=y
- CONFIG_BT_PERIPHERAL=y
- CONFIG_BT_CENTRAL=y
- CONFIG_BT_SHELL=y
- CONFIG_SHELL=y
Co-authored-by: Tibor Laczko <tibor.laczko@silabs.com>
Signed-off-by: Tibor Laczko <tibor.laczko@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Implement DMA driver for siwx917 using UDMA peripheral. For now,
Scatter/Gather DMA is not yet supported.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Support for random number generator is required for most of the
cryptographic operations, including support for WiFi and TLS.
This driver has been tested with tests/drivers/entropy:
*** Booting Zephyr OS build v3.7.0-4339-g1ec5ce05f9f8 ***
Running TESTSUITE entropy_api
===================================================================
START - test_entropy_get_entropy
random device is 0x8217298, name is rng@45090000
0x93
0x3e
0xf1
0x68
0xd4
0x22
0xbf
0x4d
0xad
PASS - test_entropy_get_entropy in 0.012 seconds
===================================================================
TESTSUITE entropy_api succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [entropy_api]: pass = 1, fail = 0, skip = 0 ...
- PASS - [entropy_api.test_entropy_get_entropy] duration = 0.01 ...
------ TESTSUITE SUMMARY END ------
===================================================================
RunID: d1547c805699201af769cb01331efcce
PROJECT EXECUTION SUCCESSFUL
Co-authored-by: Tibor Laczko <tibor.laczko@silabs.com>
Signed-off-by: Tibor Laczko <tibor.laczko@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This device is included on Silabs SiWx91x series. The current driver is
able to manage "High Power" and "Ultra Low Power" pins.
Co-authored-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This driver is mostly the initial seed for further implementation of a
real clock driver.
It doesn't allow the user to choose the clock source for the various
peripherals. The driver hardcodes some sane values.
Note that for now, the driver snps,designware-i2c does not support
"clocks" attribute. So this patch hardcode the clock configuration in
the init of the clock driver.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Currently, ns16550 allows the user to specify a clock attribute in the
Device Tree. This node is use to retrieve the internal frequency of the
hardware block.
However, ns16550 expects the clock is already initialised and it doesn't
try to enable it. Let's fix that issue.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This is to support handling pseudo MAC during initialization, but not
to support DSA master port. Current driver supports DSA with limitation
that only switch function is available without management via DSA master
port. DSA master port support is TODO work.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
NXP i.MX NETC is a TSN capable Ethernet IP. It may support
ENETC MACs, or/and multiple ports switch.
The ENETC MAC was handled by eth_nxp_imx_netc driver.
This DSA driver is to support NETC switch device.
Current driver supports DSA with limitation that only switch
function is available without management via DSA master port.
DSA master port support is TODO work.
Take i.MX RT1180 NETC hardware as an example.
+--------+ +--------+
| ENETC1 | | ENETC0 |
| | | |
| Pseudo | | 1G |
| MAC | | MAC |
+--------+ +--------+
| zero copy interface |
+-------------- +--------+----------------+ |
| | Pseudo | | |
| | MAC | | |
| | | | |
| | Port 4 | | |
| +--------+ | |
| SWITCH CORE | |
+--------+ +--------+ +--------+ +--------+ |
| Port 0 | | Port 1 | | Port 2 | | Port 3 | |
| | | | | | | | |
| 1G | | 1G | | 1G | | 1G | |
| MAC | | MAC | | MAC | | MAC | |
+--------+-+--------+-+--------+-+--------+ |
| | | | |
NETC External Interfaces (4 switch ports, 1 end-point port)
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add the parameters crcaps and crhdly1 in to the i3c device descriptor.
Also, retrieve the values if they are available.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When GPD is enabled, the pinctrl driver enables pin retention if the
peripheral is in the FAST_ACTIVE1 domain. This seems to break CAN, so
make sure retention is not active.
Investigations on why this is needed are ongoing, however, this makes
CAN functional again with some minor changes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This is necessary to suppress CMake build warning due to no source file
defined for drivers__serial.
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Add new item ulps_control in binding. If the MIPI DSI on the SoC support
ULPS, and user set the bus to enter ULPS after transfer in mipi_dsi_msg,
driver will set the bus to enter ULPS.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
USB stack does not check api->lock() and api->unlock() return value and
all UDC drivers block without timeout in its lock() and unlock() api
implementations. There is no realistic way to handle lock() and unlock()
errors without making USB device stack API unnecessarily complex.
Remove the return type from lock() and unlock() to make it clear that
the functions must not fail.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Adds support for the SENSOR_ATTR_SLOPE_TH and SENSOR_ATTR_SLOPE_DUR
attributes These set the sensitivity for the SENSOR_TRIG_DELTA trigger
which uses the sensor's wakeup feature.
Signed-off-by: Corey Wharton <xodus7@cwharton.com>
When individual axis is retrieved, it does not require the other values.
Simplify one-shot decoder to follow this pattern.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The video_stream_start/stop() APIs are counter-symetric and have
the same function signature. Also, the implementation logic for
those driver APIs is generally the same. Merge them to save memory
and code lines.
For the sake of simplicity, still keep the user APIs to preserve
backward compatibility with downstream applications.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
When stopping, the framework calls driver's stop callback then driver's
flush callback. Hence, driver's flush callback does not need to call
stop callback again.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Map the timer register space using DEVICE_MMIO_NAMED_MAP so if the MMU
is enabled, the register space is mapped correctly in the virtual
memory.
Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
Revise the sys_mm_drv_update_page_flags function to pass a cacheable
virtual address as the second parameter to the arch_mem_map function.
This approach aligns with the implementation of the sys_mm_drv_map_page
function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
