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28,390 commits

Author SHA1 Message Date
Liam Ogletree
bb8381d2bf drivers: haptics: Add support for CS40L5x haptic driver
CS40L5x is a family (CS40L50/51/52/53) of haptics drivers designed
for trackpads, tablets, and automotive applications.

This PR provides basic functionality for ROM features and serves
as a starting point for the upstream driver. Notably, RAM firmware,
SPI,  and certain CS40L51/52 features (e.g., diagnostics,
closed-loop algorithms) are excluded from this PR.

Tested with internal/external boost configurations. Tested I2C.
Tested all ROM features with each device variant (50/51/52/53),
including ROM playback, "buzz" playback and configuration, custom
haptics playback and configuration, trigger playback and configuration,
runtime haptics logging, and gain configuration.

Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
2026-01-05 23:38:24 +01:00
Fabrice DJIATSA
4727415b25 dts: arm: st: wb0: add support for timer kernel clock
PR #93198 introduced the support for the timer kernel
clock for most STM32 series.

it was missing for STM32WB0 serie.

These changes are required for the related timer tests/samples
to pass.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
4d6eaa6f63 drivers: flash: wb0x: update function to get flash size
For STM32WB0x series, LL_GetFlashSize returns the flash size in words,
not bytes. The previous implementation incorrectly interpreted this
value, leading to a large discrepancy between the expected size (512 KB)
and the computed size (64 MB) in the test_get_size ztest.

This change updates the logic to correctly compute the flash size in
bytes, ensuring accurate results in size-related operations.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Camille BAUD
78f6b8dcb7 drivers: display: clean up ssd1306
clean up and improve ssd1306 driver code

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-01-05 17:16:45 +00:00
Camille BAUD
b350791855 drivers: display: Improve SSD1306 error handling and reporting
returning -1 doesn't constitute proper error reporting.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-01-05 17:16:45 +00:00
Ibrahim Abdalkader
ca6aed203c drivers: sdhc: stm32: skip semaphore wait on HAL error
When HAL_SDIO_WriteExtended_DMA or HAL_SDIO_ReadExtended_DMA returns
an error, interrupts are not enabled so the semaphore would never be
given, and it will always timeout.

Some drivers expect certain functions to fail during normal operation.
For example, WHD calls whd_kso_enable during sleep/wakeup cycles which
can fail. This would waste 200ms (CONFIG_SD_CMD_TIMEOUT default) on
every such failure.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2026-01-05 17:16:36 +00:00
Martin Meyer
95b0c72bf2 drivers: sensor: ti: opt300x: extend support to otp3004 sensors
The ti,opt3004 ambient light sensor is having same I2C interface
as ti,opt3001.

Signed-off-by: Martin Meyer <meyer.m90@gmail.com>
2026-01-05 17:16:13 +00:00
Gaetan Perrot
92607b3bf8 drivers: modem: hl78xx: hl78xx_cfg: fix APN NULL check
hl78xx_set_apn_internal() was calling strlen(apn) before checking
the APN pointer against NULL, making the defensive check
ineffective.

Reorder the code so the NULL check is performed before dereferencing
the APN pointer.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-05 16:07:15 +01:00
Zhaoxiang Jin
510253d12a drivers: sensor: mcux_lpcmp: Removed redundant help information
Removed redundant help information

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-05 16:06:37 +01:00
Zhaoxiang Jin
af536abe7d dts: drivers: remove nxp,sensor-lpcmp.yaml
1. Removed nxp,sensor-lpcmp.yaml and merged its
properties into nxp,lpcmp.yaml. Now a single
dt-binding (compatible: nxp,lpcmp) is shared
by two drivers: the sensor API-based LPCMP
driver and the comparator API-based LPCMP driver.

2. Updated the driver and samples accordingly.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-05 16:06:37 +01:00
Jan Behrens
2f654b6e14 drivers: counter: Added RPI Pico PIT counter driver
Added a counter driver for the RPI Pico/RP2040 that implements
programmable interval timer (PIT) functionality using the PWM HAL.

Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2026-01-05 11:38:13 +01:00
Holt Sun
f18be66783 boards: lpcxpresso55s28: add CRC peripheral support
Add CRC hardware peripheral support to NXP LPC55S2X SoC family and
enable it on the lpcxpresso55s28 board

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Holt Sun
ed2fc81d4b drivers: crc: add NXP LPC CRC driver
Add CRC driver implementation for NXP LPC microcontrollers.

The driver supports:
- CRC-CCITT, CRC-16, and CRC-32 IEEE polynomials
- Configurable input/output bit reversal
- Seed value configuration
- Thread-safe operation with semaphore locking
- Streaming CRC calculation via begin/update/finish API

Hardware limitations:
- Processes data in 8-bit chunks internally
- 32-bit writes require 4 cycles (8-bit × 4)
- Supports back-to-back writes of 8/16/32-bit width

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Thinh Le Cong
23892b038f drivers: serial: fix IAR warning Pe1072 about declaration after a label
Fix Pe1072 warning (declaration after case label) by wrapping with braces

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2026-01-04 14:11:51 +01:00
Gaetan Perrot
dab667f51c drivers: clock_control: renesas_ra_cgc: fix API name typo
Fix a typo in the Renesas RA clock control API symbol name.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:20:24 +01:00
Gaetan Perrot
15eb2ee314 drivers: clock_control: renesas_ra_cgc: fix NULL subsys handling
Fix unsafe handling of the clock control subsystem pointer.

The subsystem argument was cast before being validated, which could
lead to invalid memory access when NULL is passed.

Rework the on/off callbacks to validate the subsystem pointer before
casting it, drop unnecessary device checks, and mark the device
argument as unused.

Also simplify get_rate() validation by checking only the rate
pointer.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:20:24 +01:00
Gaetan Perrot
0f59ae35d4 drivers: ethernet: eth_virtio_net: remove invalid NULL check
Remove a NULL check on the device pointer that occurs after the
pointer has already been dereferenced.

This check can never be true and is therefore misleading.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:19:52 +01:00
Alberto Escolar Piedras
a2f45762f1 arch posix: cleanup NATIVE_APPLICATION support remnants
NO_POSIX_CHEATS was a macro used to avoid including the content of a
header (`posix_cheats.h`) which allowed building applications in the
POSIX architecture without the native simulator, avoiding collisions
between some embedded symbols and those from the host C library.

Support for this way of building, and this header and macro were
removed in e150ffb92c, but these users
were forgotten. This was harmless, but let's just clean it up now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-03 10:19:34 +01:00
Abderrahmane JARMOUNI
fe039cb07b drivers: flash: silabs: replace 'depends on DMA' with 'select'
When a driver requires the usage of a low level driver subsystem
(like SPI, I2C, DMA...), it shall enable it instead of depending on it.
Also, make DMA usage depend on its DT properties being defined.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-01-02 16:01:31 +00:00
Abderrahmane JARMOUNI
6d9ded6651 drivers: adc: silabs IADC: replace 'depends on DMA' with 'select'
When a driver requires the usage of a low level driver subsystem
(like SPI, I2C, DMA...), it shall enable it instead of depending on it.
Also, make DMA usage depend on its DT properties being defined.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-01-02 16:01:31 +00:00
Gaetan Perrot
aaa321569f drivers: gpio: infineon: remove redundant NULL check in ISR
Remove a redundant NULL check on the device pointer in the GPIO
interrupt handler.

The device pointer is dereferenced unconditionally before the check
and cannot be NULL in this context.

No functional change intended.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-02 09:57:43 +00:00
Muhammed Asif
f58e1a3098 drivers: counter: microchip: Add TCC G1 driver
- Adds support for g1 counter driver with tcc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2026-01-02 09:57:06 +00:00
Hau Ho
ae1c5a9a06 drivers: flash: Add flash driver support for RX261
Add config RX_FLASH_TYPE1 support for RX261

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Ha Duong Quang
63c052c4cf drivers: adc: add support for s32k5
Add two new definitions, ADC_SAR_IP_HW_REG_SIZE and
ADC_SAR_IP_CHAN_2_BIT, to eliminate the inclusion of
Adc_Sar_Ip_HwAccess.h, since this header file does not
exist for the S32K5 platform.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2026-01-01 21:28:46 +01:00
Ivan Iushkov
0436b8abd8 drivers: sensor: fix possible unaligned access icm45686
icm45686_encoded_fifo_payload is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel and gyro members.
The issue was detected by clang compiling with
-Wunaligned-access flag:

```
icm45686.h:52:6: error: field accel within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:48:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]

icm45686.h:57:6: error: field gyro within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:53:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```

Small C code snippet to demonstrate the reported issue:
```
struct icm45686_encoded_fifo_payload icm45686;
// prints 1:
printf("%lu\n", __alignof__(icm45686));
// prints 1:
printf("%lu\n", __alignof__(icm45686.accel));
// prints 2:
printf("%lu\n", __alignof__(typeof(icm45686.accel)));
```

This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel and gyro members.

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2026-01-01 21:28:12 +01:00
Ivan Iushkov
bd6a228911 drivers: sensor: fix possible unaligned access bmi08x
bmi08x_accel_frame is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel member.
The issue was detected by clang compiling with
-Wunaligned-access flag:

```
bmi08x.h:605:2: error: field  within 'struct bmi08x_accel_frame'
is less aligned than 'union bmi08x.h:605:2)' and is usually due
to 'struct bmi08x_accel_frame' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```

This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel member.

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2026-01-01 21:28:12 +01:00
Muhammad Waleed Badar
9d0a229461 drivers: sensor: add adxl345 range attribute setter
Add adxl345_attr_set_range() to allow runtime config.
of the accelerometer's measurement range via the
SENSOR_ATTR_FULL_SCALE attribute.

The function maps the requested range to the nearest supported
ADXL345 range (±2g, ±4g, ±8g, or ±16g) and updates the device
configuration accordingly.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2026-01-01 21:26:42 +01:00
TOKITA Hiroshi
41a86eb1fe drivers: crypto: Add initial support for rpi_pico sha256 accelerator
Add basic support for RaspberryPi Pico's SHA256 hardware accelerator.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 11:00:21 +00:00
Qingsong Gou
d2b64ae909 drivers: dma: sf32lb: fix get_status
Fix get status interface

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Qingsong Gou
98742f1b07 drivers: serial: sf32lb: add uart async API support
add uart async API support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Zhaoxiang Jin
f110ef9c0a drivers: clock_control: nxp_mc_cgm: enable tempsense clock
Enable clock for tempsense module in NXP MC CGM driver to
support temperature sensing functionality.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
ab23a9f012 drivers: sensor: nxp: Add NXP tempsense driver
Add a new driver for the NXP TempSense temperature
sensor found in various NXP MCUs, such as the MCX
family. The driver reads temperature data from the
TempSense peripheral and provides it via the Zephyr
sensor API.

The TempSense peripheral details can be found in the
NXP MCXE31x reference manual chapter 78.
reference manual can be found at:
https://www.nxp.com/webapp/Download?colCode=MCXE31XRM

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
e7d24c8088 drivers: adc: add clock frequency selection for SAR ADC
This commit enhances the SAR ADC driver by adding
support for clock frequency selection. The clock
frequency can now be configured via the devicetree,
allowing for better optimization of ADC performance
based on application requirements.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
TOKITA Hiroshi
4d04eb0998 drivers: spi: spi_rpi_pico_pio: Fix pio_program variable constness
Since RPI_PICO_PIO_GET_PROGRAM returns const variable, so changed
`pio_program_t *` variables in data to `const pio_program_t *`.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 10:57:55 +00:00
Gaetan Perrot
0c8f4741b8 drivers: espi: espi_taf_npcx: reorder NULL checks
Move the NULL checks for the protection configuration parameters
before dereferencing them to avoid potential NULL pointer
dereferences.

The device pointer is assumed to be valid.

No functional change intended.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2025-12-31 10:56:02 +00:00
Bjarki Arge Andreasen
a493141dd4 drivers: clock_control: nrfs_audiopll: disable clock on init
The nrfs audiopll is automatically started if freq fraction or
prescaler is requested. The initial state of the clock should be
off, so send a disable request after setting initial freq fraction
and prescaler.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-30 09:10:18 -06:00
Bjarki Arge Andreasen
1124070207 drivers: clock_control: nrf_fll16m: ensure main power domain is on
Ensure the MAIN power domain is on before triggering
NRF_LRCCONF_TASK_CLKSTART_0 task.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-30 09:09:37 -06:00
Krzysztof Chruściński
4cff3bd1d9 drivers: timer: nrf_grtc: Use nrf_sys_event registration
Use API for registering synchronous interrupts. It reduced interrupt
latency due to NVM memory wake up.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-30 09:07:32 -06:00
Ajay Neeli
8c202d2b93 drivers: mbox: Add AMD-Xilinx IPI Mailbox
Add a new MBOX driver for the AMD-Xilinx IPI Mailbox, providing support
for the Versal-NET and Versal Gen 2 platforms

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Qingsong Gou
355c2f42e8 drivers: serial: sf32lb: add config_get and configure
Add config_get and configure APIs support

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-29 13:05:41 +01:00
Holt Sun
bc9a0a726b counter: mcux_lptmr: fix prescaler/glitch filter configuration
Fix incorrect LPTMR prescaler/glitch filter mapping that led to wrong
frequency calculation and wrong hardware configuration.

- Calculate effective counter frequency correctly:
  * Time Counter mode: divide by 2^(value + 1)
  * Pulse Counter mode: divide by 2^value
- Map prescale-glitch-filter directly to the HAL enum (no offset math)
- Add prescale-glitch-filter-bypass DT boolean (default false)
- Restrict prescale-glitch-filter to 0..15 and update bindings/DTS users
- Add build-time validation for Pulse mode (value 0 requires bypass)

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-29 09:27:54 +01:00
William Tang
18e5e29749 drivers: can: mcux: flexcan: move to per-instance MB configuration
This change refactors the FlexCAN driver to use per-instance message
buffer configuration instead of global Kconfig options. The driver now
calculates message buffer allocation at compile time based on device
tree properties for each FlexCAN instance.

Key changes:
- Remove global CAN_MAX_MB Kconfig option and associated range constraint
- Add number_of_mb, rx_mb, and tx_mb fields to mcux_flexcan_config
  structure
- Move callback arrays and atomic allocation bitmaps from static global
  arrays to per-instance static arrays generated by macros
- Update data structure to use pointers to per-instance arrays instead
  of fixed-size embedded arrays
- Add compile-time validation to ensure sufficient message buffers are
  available for required RX filters and RX filters greater than 0

This approach allows different FlexCAN instances to have different
message buffer configurations based on their hardware capabilities
and device tree settings, improving memory efficiency and flexibility.
The change maintains backward compatibility while enabling better
resource utilization across different SoC variants.

Fixes #92798

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-28 10:11:51 +01:00
Tim Lin
f36e8b1d60 drivers/i2c: it8xxx2: Add I2C_CODE_IN_RAM for critical functions
Introduce the I2C_CODE_IN_RAM option to place selected critical
functions into the RAM code section.

This allows latency-sensitive I2C paths to execute from RAM when
required, while keeping the default behavior unchanged.

NOTE1: Enable I2C_CODE_IN_RAM on it81202bx: RAM size +2272B.
NOTE2: With kernel in RAM, enabling I2C_CODE_IN_RAM saves ~558ms
       over 1,000 transfers (W/R/W2R), tested on it81202bx.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-12-27 21:01:12 +00:00
Holt Sun
8cb5b7dd58 drivers: watchdog: wdt_mcux_wwdt: reject callback without warning IRQ
The WWDT callback is only invoked from the warning interrupt path.
If CONFIG_WDT_MCUX_WWDT_WARNING_INTERRUPT_CFG is 0, the warning
interrupt is effectively disabled, so a configured callback would
never fire.
Return -ENOTSUP and log an error when a callback is provided
without enabling the warning interrupt, to avoid a silent no-op.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Holt Sun
8b365a3e2c drivers: watchdog: wdt_mcux_wwdt: fix window calculation.
Correct the WWDT window value calculation and add proper
range validation.

The window value was incorrectly set to the minimum timeout value.
Per hardware specification, it should be calculated as:
  windowValue = timeoutValue - min_window_ticks

Also add:
- MAX_TIMEOUT boundary checks
- Validation before value assignment

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Sylvio Alves
e855856a5d drivers: spi: esp32: move pinctrl to init
Move pinctrl_apply_state() from configure to init to ensure pinctrl
is applied once at boot rather than on every transaction.

When cs-gpios is defined, spi_context_cs_configure_all() runs after
pinctrl and reconfigures the CS pin as GPIO, properly overriding
any CS routing set by pinctrl.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-26 10:18:16 -06:00
Tim Pambor
f35189eeef drivers: eth: phy: adin2111: support C45 register access
Implement read_c45 and write_c45 functions to support clause 45
register access. This enhancement allows to access C45 registers
even when the MDIO controller does not natively support clause 45.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-26 10:17:32 -06:00
Tim Pambor
c9f8e8c856 drivers: eth: phy: adin2111: Use C45 access by default
Use clause 45 MDIO access by default and only fallback to the phy
internal clause 45 bridge if the MDIO controller does not support
clause 45 transactions.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-26 10:17:32 -06:00
Maochen Wang
a8137baf65 drivers: sdhc: imx_usdhc: add retry for DAT3 card detection
DAT3-based card detection can return a false negative on the first read
due to transient signal states after enabling detection. Add a bounded
retry loop (limited by IMX_USDHC_DAT3_DETECT_RETRY) with a short delay
between attempts to improve robustness.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-26 10:17:10 -06:00
Fabin V Martin
cf8d97ab39 drivers: uart: microchip: sercom g1: Add DMA support
The current driver implementation only support pooling and
synchronous operations. By adding DMA support the driver will
be able to operate in asynchronous mode which helps to improve
CPU usage and save power.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00