ppp->next_escaped is set when a 0x7d escape octet is received and cleared
only when the escaped octet itself arrives. A frame aborted mid-escape
(0x7d 0x7e, RFC 1662 ch. 4.2) therefore leaves the flag set, and the first
octet of the following frame that reaches STATE_HDLC_FRAME_DATA gets XORed
with 0x20.
Today the damage is limited because STATE_HDLC_FRAME_ADDRESS stores the
Address octet without consulting the escape state, so the corruption lands
on the Protocol field and the frame is dropped on an unknown protocol.
Clear the flag whenever a 0x7e delimiter is seen, in all three states that
can observe one.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Aleksandr Senin <al@meshium.net>
Consider k_work_submit() return value in STM32 I2C RTIO driver. If
failing the bus recovery sequence is not started in which case the
error must but reported to the caller and the RTIO queue should not
stall.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove the dedicated BCM2711 auxiliary UART driver and its associated
Kconfig entry now that support has been integrated into the generic
NS16550 driver.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add support for the Broadcom BCM283x auxiliary UART variant to the
NS16550 driver by introducing a dedicated Kconfig option and variant-
specific register definitions required for the extended register set.
This enables the generic NS16550 driver to support the auxiliary UART
found on Broadcom BCM283x SoCs.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
When check_buffer_size() fails, the driver was returning early
without calling adc_context_complete(). This caused the caller
to hang indefinitely waiting for the context to complete. We now
properly complete the context with the -ENOMEM error code.
Fixes#115091
Signed-off-by: Saksham Gupta <saksham77779@gmail.com>
The DINOFF update read back SMTEN instead of DINOFF, so the write
seeded the input-disable register from Schmitt-trigger state and
destroyed the other pins' DINOFF bits. Read DINOFF, matching every
other read-modify-write in the function.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
The bridge already forwards the port configuration (baudrate,
parity, etc...) to the peer, but not the modem control lines.
Forward DTR RTS state to the peer port as well, so a bridged
serial port carries the control lines through like a USB-serial
adapter does.
Note the forwarding is compiled in only if CONFIG_UART_LINE_CTRL
is enabled.
Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
This macro eliminates manual size/alignment management and prevents
namespace collisions by moving internal queues to file-private scope.
Signed-off-by: Cesar Vandevelde <cesar.vandevelde@gmail.com>
The 16-bit branch of spi_gd32_frame_exchange() read the TX buffer
through a uint8_t pointer, copied from the 8-bit branch, so the high
byte of every 16-bit frame was transmitted as zero. Read a full
16-bit word, matching the RX side.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add modem driver for Nordic nRF91 series running the
Serial Modem application v2.0.0 or later. This includes the nRF91M1 module.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
The migration from static const struct audio_codec_api to DEVICE_API()
accidentally removed the static qualifier from aic26_api. Restore static
to keep the symbol file-local and match the previous visibility
semantics.
Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
The driver so far hardcoded INT1 (INTMAP1_LOWER at 0x2A) for all
interrupt mappings, so a board that routes only INT2 to the host could
never receive trigger or FIFO watermark interrupts. INT1 and INT2 have
bit-for-bit identical event mapping registers (INTMAP2_LOWER at 0x2B).
Select the connected pin from the int1-gpios/int2-gpios devicetree
properties and route the interrupt mappings to the matching register,
following the pattern already used by the adxl345 driver. When only
int1-gpios is present the driver keeps using INT1, so existing device
trees continue to work unchanged.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
For the power sequence writes, a previous PR accidentally
implemented standard writes instead of raw writes for a
number of register write sequences, which results
in CS40L5x devices never waking from hibernation. Just
need to change the existing writes to raw writes.
Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
The HX8353E's GRAM is 132x162 (columns x rows). Setting rotation to 90
or 270 sets the MADCTL row/column-exchange (MV) bit, which swaps which
GRAM axis the width/height devicetree properties address. The existing
BUILD_ASSERT never accounts for this, so a panel wired at 90 or 270
degrees with e.g. width = 160, height = 128 (a valid 132x162 GRAM
config once swapped) is incorrectly rejected at compile time.
This mirrors the same fix already running in production on real
MD-UV390 PLUS hardware in a downstream out-of-tree board.
Assisted-by: Claude Sonnet 5 <noreply@anthropic.com>
Signed-off-by: Andrew Yong <me@ndoo.sg>
Replace direct SDMMC register accesses with the equivalent
sdmmc_ll_* low-level helpers from hal_espressif for interrupt
handling, controller and fifo reset, DMA setup, the command
engine, timeout configuration, card data-busy polling and
bus-width selection. The two duplicated local DMA helpers are
dropped in favor of sdmmc_ll_init_dma and sdmmc_ll_stop_dma.
Register accesses with no low-level equivalent (whole-register
interrupt-mask save, restore and set, and the response fifo
read) are left unchanged.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Every bus width, clock and timing change logged at info level, so
enumerating a card printed a dozen lines of routine progress on
any build with info logging on. An sdio peripheral on the second
slot doubles that.
Drop those messages to debug level. The error paths are
unchanged, so a failure still reports at its original level.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Both slots are served by a single sdmmc controller: one register
block, one command engine, one dma channel and one interrupt
line. The driver kept that state per instance, so enabling a
second slot had the two fight over the shared registers and the
build asserted on more than one slot.
Move the controller-wide state into a shared struct and run the
bring-up once, on whichever slot initialises first. A controller
mutex serialises transactions across slots and records the owner,
so the interrupt handler routes completion events to the right
queue and the per-slot clock divider is reprogrammed through a
clock update command when the bus changes hands. Restore the
saved interrupt mask on every error path in the clock helper,
which previously left the mask blanked and killed the other
slot's interrupts.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The esp32 sdhc driver routed its slot pins directly and had
no path for block-mode CMD53 transfers or for the DAT1 card
interrupt, so an sdio card function could not be driven from
it.
Route the slot pins through the gpio matrix and add CMD53
block and byte transfers plus card interrupt enable and
disable, which an sdio client needs to move frames and to be
woken by the card. The card interrupt is masked in the
handler and re-armed by the consumer, so the enable and
disable helpers avoid sleeping primitives and stay callable
from the callback.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Enable the full-speed USB device controller on STM32L1:
- Assert PLL VCO = 96 MHz at build time (USB clock = VCO / 2).
- Skip the runtime 48 MHz clock check; the clock is deterministic.
- Drive the DP pull-up via SYSCFG_PMC USB_PU (no disconnect GPIO).
- Add the usb controller node and a nop USB PHY in devicetree.
Signed-off-by: Florian Moesch <florian.moesch@draeger.com>
The MIPI_DBI_SPI_READ_REQUIRED macro is used directly in
preprocessor conditionals; the leftover file-scope variable named
var is unused and pollutes the global namespace.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Each detected error was assigned with '=', so simultaneous conditions
reported only the last one checked. OR the flags together.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add support for uc8253 e-paper display driver. This chip shares most
registers layout with uc8151, hence the extension of the uc81xx driver
to also support the uc82xx without changing the filename.
Tested with Waveshare sku22698 e-paper HAT connected to Nucleo f446re
via SPI.
Signed-off-by: Grabowski Łukasz <lukasz.grabowski@pcosa.com.pl>
Propagates haptics API changes to the CS40L26/27 driver, notably
*_calibrate(), *_select_source(), and *_set_level(). Removes
CS40L26/27-specific API functions that were exposed in the
public header that have now been replaced by the haptics API.
Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
The VREFBUF output voltage is factory-calibrated by ST. On series such
as STM32H5 or STM32U5, the VREFBUF loads trimming data automatically
when changing voltage scale. However, on series such as STM32WB, the
software is responsible for loading the correct trimming data from OTP.
Implement reading of trimming data from OTP and manual application of
the proper trimming data by software, gated behind a new Kconfig option
for the driver, CONFIG_REGULATOR_STM32_SOFTWARE_TRIM, enabled by default
on series without automatic loading by hardware (these series' DTSI are
updated to provide the `nvmem-cells` property which gates the option).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
-Add option to have IR using vendor command without PDN toggle
to over come resetting of a non BT CPU in case of COEX scenarios
Signed-off-by: Vinit Mehta <vinit.mehta@nxp.com>
Add a Dom0 wrapper for XEN_DOMCTL_unbind_pt_irq.
Use SPI-only argument handling, matching the existing bind_pt_irq wrapper.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Expose a Dom0 wrapper for XEN_SYSCTL_tbuf_op using the Xen public
headers provided by zephyr-xenlib.
The wrapper follows the existing sysctl helper pattern: validate the
caller-provided request, copy it into xen_sysctl, issue
HYPERVISOR_sysctl(), and copy Xen-updated fields back on success.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Fix build error on the ace_v1x_{art,rtc} drivers where compiler
cannot find the register header files. Since those header files
reside at the same directory, convert it to local include.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
