Coming with nrfx 4.3, NRF_GPIO_HAS_DETECTMODE is now
defned only when it is actually accessible.
Removed the hidden Kconfig option and used
nrfx symbol only.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
the boot banner is printed at the end of
the init process with
``SYS_INIT(boot_banner, APPLICATION, 0);``
we don't need the early console for it.
When CONFIG_EARLY_CONSOLE is enabled,
the console will init with PRE_KERNEL_1, otherwise
with POST_KERNEL. Both are before APPLICATION.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The original net.c in hal_nxp contains Zephyr-specific code, which
violates the rule that HAL 'Zephyr modules should not contain code that
is written exclusively for Zephyr'.
Move the network porting layer and Zephyr relocation related CMakelist
change into drivers/wifi/nxp to align with Zephyr architecture.
Also fix build issues and switch to Zephyr-defined configurations.
Add nxp_net_if_get_device() wrapper API.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
DMA_XILINX_AXI_DMA_DISABLE_CACHE_WHEN_ACCESSING_SG_DESCRIPTORS describes
a specific implementation strategy rather than the underlying intent:
manage cache coherency manually because the platform doesn't provide
hardware coherency for DMA accesses. Tying the symbol name to the
mechanism makes it harder to evolve the driver to a different coherency
strategy without breaking existing user configurations.
Introduce DMA_XILINX_AXI_DMA_MANUAL_CACHE_COHERENCY with the same
semantics and update the driver's #ifdef sites to use it. Keep the
original symbol around as an invisible alias that selects DEPRECATED
and the new symbol so existing out-of-tree configs continue to work
and produce a deprecation warning at build time instead of silently
losing the behaviour.
Signed-off-by: Abin Joseph <abin.joseph@amd.com>
The Xilinx PG021 spec requires the DMA to clear DMACR.RESET before any
further DMACR writes are honored. Use Zephyr's WAIT_FOR() helper from
<zephyr/sys/util.h> to spin on DMACR.RESET clearing after the soft-reset
write, with an XILINX_AXI_DMA_RESET_TIMEOUT_MS ceiling. On timeout, log
an error and return -EIO so the failure surfaces immediately instead of
being absorbed by silently dropped subsequent register writes.
Signed-off-by: Abin Joseph <abin.joseph@amd.com>
The IRQ lock/unlock helpers used bare 0x1 / 0x2 bit literals in the lock
key returned to the caller, and indexed the per-channel array with bare
0 and 1. Both required a "TX is 0, RX is 1" comment to read.
Replace the bit literals with named constants
XILINX_AXI_DMA_LOCK_KEY_TX_ENABLED / _RX_ENABLED, derived from the
existing channel index defines via BIT(), and replace the bare channel
indices with XILINX_AXI_DMA_TX_CHANNEL_NUM / _RX_CHANNEL_NUM. The
"TX/RX is N" / "TX/RX was enabled" comments become redundant and are
removed.
Signed-off-by: Abin Joseph <abin.joseph@amd.com>
Add the SYS_CTR clock IDs to the CCM rev2 dt-bindings header and handle
both the SYS_CTR base and slow clocks in the rate query callback so the
counter driver can retrieve its operating frequency at init time.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add a Zephyr counter driver for the NXP MCUXpresso System Counter
(SYS_CTR). The driver supports:
- 56-bit free-running up-counter
- Selectable clock source: 24 MHz base clock or 32 kHz slow clock
- Two compare frames (alarm channels) with a shared interrupt
- Standard Zephyr counter alarm API
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add DMA driver support for Realtek Bee series SoCs,
including RTL87x2G and RTL8752H.
This driver supports:
- Memory to Memory transfer
- Peripheral to Memory transfer
- Memory to Peripheral transfer
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Some MCUX LPTMR instances expose counters narrower than 32 bits.
Raw uint32_t subtraction in tickless mode can treat a 16-bit
hardware wrap as a 32-bit wrap.
Compute elapsed time and compare distances in the hardware counter
domain with COUNTER_MAX.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Implement AUPLL management in the BL61x clock control driver,
following the same pattern as the existing WIFIPLL implementation.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Add support for issuing a software reset sequence (RSTEN 0x66 followed
by RST 0x99) to the flash device during initialization, before reading
SFDP parameters.
The feature is controlled by a new devicetree property
'initial-soft-reset'. When enabled, the driver sends the reset
sequence using temporary LUT entries to avoid flash data
access during XIP critical sections.
An optional 't-reset-recovery' property specifies the minimum time in
nanoseconds the flash needs after reset before accepting new commands.
If provided, the driver will busy-wait(self defined) for the
specified duration.
Suggested-by: Sanjay Varghese <Varghesemela@gmail.com>
Link: https://github.com/zephyrproject-rtos/zephyr/pull/105891
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Fix by demoting BIT(6) to a fallback, checked only when no active
entry method bit (BIT(0), BIT(1), BIT(4)) is also set. This aligns
with the approach in Zephyr's generic spi_nor driver and the Linux
kernel spi-nor subsystem, both of which prefer active entry commands
when available and treat the "always 4-byte" indication as a last
resort. Sending 0xB7 to a device that is already in 4-byte mode is
idempotent and harmless.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
the litex ethernet driver uses NET_IF_DT_INST_GET,
therefore we need to depend on NET_L2_ETHERNET, so
it can't be used with ETH_DRIVER_RAW_MODE.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The UART driver's ISR could read the TC interrupt flag multiple times,
but doing so is unsafe as the interrupt flag could be clear during the
first read but set during the second, whereas the ISR expects the same
value all along.
Read the flag's status exactly once at the start of the ISR and use the
cached value in all checks instead of reading the hardware register.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Reset the I2S RX FIFO when restarting the DMA channel between
descriptors. Without this, residual samples held in the FIFO at the
channel boundary are read first after the GDMA reload and cause a
drift in the captured stream.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
this commit replaces SDMMC_FIFO_SIZE usages related to
RXFIFOHF/TXFIFOHE handling with SDMMC_HALFFIFOBYTES.
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
This commit fixes#108757.
It adds NULL pointer checks in FIFO read/write functions to avoid crashes
and fixes buffer offset handling in the switch speed path.
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Add support for JPEG and PNG compressed formats to the video software
generator driver. This enables testing of compressed video formats
without requiring actual camera hardware.
The compressed frame buffers are included at compile time via
generated header files, with configurable file names to support
custom test patterns.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Refactor BG9x driver to use DLC1 setup script with correct URC
configuration (AT+QCFG="cmux/urcport",1) and drop the periodic script.
The dial script is now only a ATD*99***1# so when PPP dialing is
retried, none of the URC setup scripts are retried.
Also, add the missing baud rate change script.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Refactor "nordic,nrf91-slm" to configure URC and PPP in the
network setup script.
The dial script can be now left empty as AT#XPPP=1 automatically
starts the PPP on the secondary DLC.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
* Add separate state RUN_NETWORK_SCRIPT before running the PPP dial script.
* Allow defining modem with separate network setup script.
These changes allow modem to be defined with a separate script
that runs on DLC1 channel and configures URC messages and joins the
network.
The PPP dial command can then be refactored to be only a single ATD*99#
or AT+CGDATA which runs on DLC2.
URC channel is not switched, so it can be configured to be DLC1
if given modem has a command for it.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Replace the `no-disconnect` property with enum `zephyr,suspend-action`
which aims to be more flexible. The enumeration currently has three
values: two replicate the old behavior when `no-disconnect` was absent
and present (respectively `disconnect-with-pupd` and `none`) and the
third is introduced to tackle the issue below.
The core issue is that the current implementation of the input_gpio_keys
driver will forward GPIO_PULL_DOWN/GPIO_PULL_UP flags from Devicetree to
the GPIO driver when disabling the pin, which is not really sensible...
...but works anyways: most drivers seem to ignore these flags if pin is
configured as GPIO_DISCONNECTED! The correct interpretation per GPIO API
seems to be `pin in Hi-Z/"floating" state with PD/PU resistor enabled`
which is not supported by some hardware; compliant drivers should return
-ENOTSUP which would bubble up and prevent the input_gpio_keys device
from suspending. The new enumeration's third value, `full-disconnect`,
is designed for such controllers (although really, it should be used in
most if not all cases): when selected, the Devicetree PD/PU flags are
explicitly masked out when calling gpio_pin_configure(GPIO_DISCONNECTED)
which should then succeed on more hardware than currently. One effect is
that the GPIO pin should enter a Hi-Z/"floating" state without PD/PU but
this ought to be fine, as the input_gpio_keys driver does not read the
state of the GPIO line state while suspended (and reconfigures pin as
GPIO_INPUT during resume, which enables the PD/PU again if any).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Reject malformed nrf_wifi_umac_event_power_save_info payloads before
copying TWT entries into struct wifi_ps_config. The handler previously
trusted num_twt_flows and indexed twt_flow_info[] without checking
WIFI_MAX_TWT_FLOWS or event_len, which could overflow the fixed Zephyr
twt_flows buffer and read past the event buffer.
Fix issue #108848.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Assisted-by: Cursor:Auto
Previously announced_cycles was set directly to the current counter
value, which includes sub-tick remainder cycles from ISR latency.
Over time these remainders accumulate, causing the announced tick
boundary to drift away from the true tick grid.
Advance announced_cycles in whole-tick increments instead, so that
the sub-tick fraction is naturally absorbed by the next interval
rather than compounding across interrupts.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Enable use of the WM8904 driver on platforms that do not provide
direct access to the MCLK signal. Introduce fs-ratio, which is used
to derive the MCLK value from the selected frame sync (FS) rate.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Add `i3c config_get controller <bus>` and `i3c config_get target <bus>`
shell commands to print all fields of i3c_config_controller and
i3c_config_target respectively.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Host can cancel current Control transfer for timeout and send new
Setup packet for new one. In this situation, driver can get out
of sync and even fail all the following Control transfers, probably
getting stuck in NAK'ing.
Because the HSUSBD hardware doesn't support disarm for Control Data
already armed for previous Control transfer, this update tries to
fix the issue via monitor of Data IN token. This approach has the
points:
* Wait for Data IN token received to arm Data IN
This lowers the chance of mis-arm at the cost of performance.
It also makes mis-arm error not propagate further in one or two
broken Control transfers.
* Cancel current Control transfer on new Setup packet received
Fixes: #104922
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For HSUSBD, unlike Control Data OUT which is automatically armed,
we can safely flush FIFO on new Setup packet whose direction is IN
because Data IN for the new Control transfer is not yet armed.
It is manually armed after processing the new Setup packet.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For USBD, move Setup interrupt handling to the back of Data/Status
so that the order Data/Status->Setup can be kept when both flags
are asserted at the same time for delayed message handling. Both
flags asserted for the order Setup->Data/Status is an error
condition because the Data/Status transfer won't be armed until
the Setup packet is processed.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
The sd-gpios property is optional, and GPIO_DT_SPEC_INST_GET_OR()
leaves sd_gpio.port NULL when it is absent.
The driver checked sd_gpio.port->name in the init and PM turn-off
paths, which dereferenced the missing GPIO spec before it could skip
shutdown pin setup. Check the port pointer directly instead.
Assisted-by: Codex CLI:GPT-5.5 High Reasoning
Signed-off-by: Daniel Lindestad <lindestad@proton.me>
The data struct for FT6146 driver has no reason to contain both a timer
and a GPIO callback at the same time since polling vs. interrupt mode
are mutually exclusive at compile time.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Codex:gpt-5.5
Save a tiny bit of memory by storing input codes as 16-bit values since
that's what the input subsystem expects.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Codex:gpt-5.5
Measurement of the internal Vddcore voltage differs only slightly from
the Vbat measurement. The main difference is that the Vddcore channel
is enabled differently in the ADC peripheral.
To avoid code duplication, the existing Vbat sensor driver is extended
to also handle the Vddcore measurement.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Add MEC175x SoC series support to the Microchip XEC ADC driver.
Refactor the driver to use DTS-encoded GIRQ and PCR properties
instead of series-specific ifdefs, enabling a unified driver
across MEC150x, MEC172x, and MEC175x.
Update mec_adc.h register definitions to support all three SoC
series with proper Kconfig guards for 16-channel ADC variants.
Signed-off-by: Srinivas Edireswarapu <srinivas.edireswarapu@microchip.com>
Add coordinator driver for RISC-V Advanced Interrupt Architecture (AIA)
that provides a unified API wrapping APLIC and IMSIC operations.
The coordinator simplifies application code by providing wrapper functions
for common AIA operations:
- IRQ enable/disable: Manages IMSIC EIID enable/disable
- Source configuration: Configures APLIC source trigger modes
- MSI routing: Routes APLIC sources to specific harts and EIIDs
- Source enable: Enables APLIC interrupt sources
- GENMSI injection: Software-triggered MSI via APLIC GENMSI
Note: In AIA-MSI mode, APLIC sources and IMSIC EIIDs are decoupled.
irq_enable() only enables the EIID in IMSIC; APLIC sources must be
configured separately via the source configuration APIs.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add RISC-V APLIC driver split into shared core and MSI-specific
modules following the GICv3/ITS pattern:
- intc_riscv_aplic_priv.h: private header with struct aplic_cfg,
register helpers, and aplic_msi_init() declaration
- intc_riscv_aplic.c: core driver with domain enable, source
configuration, device instantiation; calls aplic_msi_init()
when CONFIG_RISCV_APLIC_MSI is enabled
- intc_riscv_aplic_msi.c: MSI-specific code for APLIC target
routing, GENMSI injection, and MSI address geometry setup
This split allows direct delivery mode support to be added later
without touching MSI code.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Add RISCV_APLIC base Kconfig (enabled by DT_HAS_RISCV_APLIC_ENABLED)
and RISCV_APLIC_MSI sub-config that is only available when every APLIC
node in the devicetree has an msi-parent property. This prevents
build failures when APLIC is used in direct delivery mode without an
IMSIC. Update CMakeLists.txt to build intc_riscv_aplic.c for the
base config and intc_riscv_aplic_msi.c for the MSI sub-config.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Replace open-coded fragment loop with NET_PKT_FRAG_FOR_EACH() macro
in eth_dwc_xgmac_send().
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>