Commit graph

24538 commits

Author SHA1 Message Date
Josuah Demangeon
d1e71ae901 drivers: video: sw_generator: add support for bayer and YUV formats
This refactors the pattern generator functions to also offer bayer formats
as input. 4 variant of bayer formats are proposed. The pixel packing is
also now split from the color selection: only a single RGB and single YUV
array used by all the pattern generators.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Josuah Demangeon
70b4b93985 drivers: video: sw_generator: modify video_sw_generator_fill_colorbar()
Add a check for the array size to avoid overwriting unrelated memory when
the buffer is too small for the full format. It first check if there is
enough buffer for one line, and fill it programmatically. Then, it will
try to duplicate that line over the entire buffer, in the limit of the
room available.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Josuah Demangeon
82d2f94f12 drivers: video: sw_generator: fix video_sw_generator_enum_frmival()
Return an error on fie.index >= 1 as there is only one framerate entry
per pixelformat, this prevents an endless loop.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Josuah Demangeon
ba5d3bad8b drivers: video: sw_generator: use video_format_caps_index()
Use the video_format_caps_index() function to check if a format matches
any entry of the format caps.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Josuah Demangeon
c15f24de60 drivers: video: sw_generator: refactor: flatten arrays
Help with maintainance and possibly readability by using a more regular
layout for various tables of numbers. This adds a comma on the last
element to help with formatters like clang-format.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Josuah Demangeon
d8d04ba66b drivers: video: sw_generator: preserve full prefix for internal functions
In order to help debugging through GDB and other error messages and debug
tools, convert the __xxx prefix to video_sw_generator_xxx full prefix.
To help keep function names short, use slightly shorter sufixes.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 19:56:30 +02:00
Francois Ramu
4bb618c66f drivers: clock control: stm32H7RS has a PLL2 & 3 or HCLK5 output
Add the definitions of the PLL2 and PLL3 outputs for the stm32H7RS mcus
and the HCLK 5 which is clock source for the XSPI instance.
and other HCLKn for other peripherals.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Francois Ramu
e13722bc38 drivers: flash: stm32 xspi flash driver set the DelayBlock if exists
The stm32H7RS serie has no DelayBlock Bypass control in its DCR1 register.
For other stm32 devices with DelayBlock bypass control, set the value
directly in the structure.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Francois Ramu
93b983d578 drivers: flash: stm32 xspi drivers supporting the stm32h7r/s mcu
Add the support of the stm32h7rs serie to the
drivers/flash/flash_stm32_xspi driver.
The stm32h7rs has no delayblock

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Francois Ramu
8cb8017038 drivers: flash: stm32 xspi driver supports clock domain config
Add the clock domain configuration for the xspi nodes
Where the DTS defines main clock and peripheral clock sel
plus a XSPIM clock

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Maciej Meijer
982abadd34 mbox: workaround for missing ic-msg
When a LD sends an ic-msg to SCFW - it happens that sometimes that SCFW
does not handle the request.
For the moment the problem is solved by sending a second vevif event
shortly after the initial request.

Signed-off-by: Maciej Meijer <maciej.meijer@nordicsemi.no>
2025-05-21 17:34:56 +02:00
Stoyan Bogdanov
dddbfcce76 drivers: counter: Add support for cc23x0 RTC counter
Add support for cc23x0 RTC driver in counter.
RTC is always ON after device boot. Timer is restared only
on POR, and is active during STANDBY and ACTIVE power states.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-05-21 17:34:16 +02:00
Francois Ramu
abc3fec255 drivers: clock control: stm32H7 has the same clock source for all PLL
Select the PLL clock source for PLL2 or PLL3 as well as main PLL
This choice is useful if main PLL is off (sysclock from fixed clock)
but PLL2 or PLL3 are on for other peripherals
All PLL must have the same source else this is an error.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 14:04:26 +02:00
Ioannis Damigos
3956dff4b8 drivers: hwinfo_smartbond: Implement hwinfo_get_device_id() function
Implement hwinfo_get_device_id() function

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2025-05-21 14:04:17 +02:00
Mark O'Donovan
d33da4db35 drivers: flash_stm32_qspi: add st,read-id-dummy-cycles
Add new device tree property specifying the number of
dummy-cycles required when reading the JEDEC ID.

The Arduino Opta has an at25sf128a with JEDEC ID 1F 89 01.
The PR below adds support for this, but the id read is 01 1F 89.
Changing DummyCycles to 16 causes the correct value to be read.

https://github.com/zephyrproject-rtos/zephyr/pull/89539

Signed-off-by: Mark O'Donovan <shiftee@posteo.net>
2025-05-21 14:04:09 +02:00
Alberto Escolar Piedras
5d31bce072 drivers/i2c/i2c_ambiq: Fix code compliance issues
Fix 4 issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Alberto Escolar Piedras
ed4ed05501 drivers/video/video_ctrls: Fix code compliance issues
Fix issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Alberto Escolar Piedras
d20adfedb1 drivers/stepper/adi_tmc: Fix code compliance issues
Fix issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Alberto Escolar Piedras
08ff55af07 drivers/display/display_stm32_ltdc: Fix code compliance issues
Fix 2 issues detected by checkpatch

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-05-21 12:35:28 +02:00
Vit Stanicek
37ec78f3dc drivers: misc: Add nxp,rtxxx-dsp-ctrl
Add the nxp,rtxxx-dsp-ctrl driver.

Responsibility of this driver is to load code executed by Xtensa-family
cores on NXP i.MX RTxxx microcontrollers and to control their run.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-05-21 12:34:32 +02:00
Krzysztof Chruściński
1ca4b333b4 modules: hal_nordic: nrfx: Decouple clock control from nrfx_clock
Create Kconfig configuration for nrfx_clock driver and use that to export
configuration to nrfx via nrfx_kconfig. So far nrfx_kconfig was using
Kconfig flags from clock_control which created a fixed connection between
nrfx_clock and clock_control and nrfx_clock could not be used without
clock_control in Zephyr.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-05-21 12:33:00 +02:00
Krzysztof Chruściński
c58ae7467b drivers: serial: nrfx_uarte: Workaround for spurious RXTO during restart
Some SoCs generates unexpected RXTO event during restart.
Restart happens when ENDRX_STARTRX short is enabled and STOPRX
is triggered (via short or by CPU). STOPRX starts closing
procedure and ENDRX event is generated at some point which
triggers STARTRX and closing procedure is interrupted. RXTO
should not be triggered in that case. Due to internal timings
some SoC on fast UARTE instance will trigger RXTO followed
by RXSTARTED. This RXTO event shall be cleared as receiver is
actually restarted and not stopped.

Affected SoC is not in tree so Kconfig is added which enables
the workaround.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-05-21 09:30:15 +02:00
Saravanan Sekar
f236a56040 drivers: serial: Add initial support TI MSPM0 UART
Add initial support for TI MSPM0 UART with basic poll-in and poll-out
functionality.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
dee5a06a45 drivers: gpio: mspm0: Add a gpio support for MSPM0 family
Add a GPIO driver support for TI MSPM0 SoC family.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
258cc7e9cf drivers: pinctrl: mspm0: Add a pinctrl driver for TI MSPM0
Added a pinctrl driver support for MSPM0 Family.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Saravanan Sekar
51bb5ddde4 drivers: clock: ti: Add initial support TI MSPM0 clock module
Add initial support TI MSPM0 clock module

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Signed-off-by: Jackson Farley <j-farley@ti.com>
2025-05-21 08:04:32 +02:00
Yangbo Lu
09ff615f67 drivers: ptp_clock_nxp_enet: re-enable ENET timestamp IRQ
ENET timestamp IRQ still needed to be enabled from IP.

This is a fix-up for below commit:

faa55bd44b drivers: ptp_clock_nxp_enet: avoid configuring
            IRQ handlers again

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-21 08:02:22 +02:00
Yangbo Lu
2da6257bec drivers: eth_nxp_enet: support handling ENET timestamp events
The ENET timestamp events may be via ENET IRQ rather than ENET
timer IRQ handled in ptp driver for some platforms like i.MX RT1060.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-21 08:02:22 +02:00
Yangbo Lu
2c10b2fb46 drivers: ptp_clock: add ptp_clock shell commands
Added ptp_clock shell commands to check, use, and verify
ptp clock. Supported get, set, adjust, rate adjust, and
selftest functions.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-05-21 08:01:44 +02:00
Josuah Demangeon
c8ff2b89d9 drivers: video: common: introduce CCI utilities
Add a library for the Camera Common Interface, part of the MIPI CSI
protocol standard defining methods to configure a camera device over I2C,
such as which size for the register address/data.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-21 08:01:12 +02:00
Peter Wang
dd1bc2434a boards: frdm_mcxa166, frdm_mcxa276: add hwinfo reset_cause support
1. enable hwinfo support
   - get_reset_cause
   - get_supported_reset_cause
   - clear_reset_cause
2. verified tests/drivers/hwinfo

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-05-20 18:27:56 +02:00
Josuah Demangeon
c67b915482 drivers: video: shell: introduce the video shell
Introduce the video shell and implement some video shell commands.
Make use of the various querying API to implement tab-completion, and
validiate the data, as well as convert string names into integers.
Commands provided: frmival, format, ctrl, start, stop, capture

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-20 18:27:43 +02:00
Phi Bang Nguyen
075ee09bd1 drivers: video: mcux_smartdma: Don't set_format() in get_format()
Do not set_format() when doing get_format(). This design seems initially
to simplify the sample (just get_format() and everything works out of the
box) but it makes thing incomprehensive and error prone.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
d0eedc5192 drivers: video: mcux_csi: Don't set_format() in get_format()
Do not set_format() when doing get_format(). This design seems initially
to simplify the sample (just get_format() and everything works out of the
box) but it makes thing incomprehensive and error prone.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
0c1e2c9e6d drivers: video: Move format pitch setting to bridge drivers
The format pitch (bytesperline) field is typically set by the bridge
drivers, i.e. DMA, ISP drivers who actually handle the memory as they
know exactly the memory layout constraints.

Application just set the pixel format and resolution and must always
read back this field to see what the driver actually sets (to allocate
buffers for example).

Also, drop format pitch setting in sensor drivers as this is not needed.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
0b090fafa3 drivers: video: stm32-dcmi: Drop video_stm32_dcmi_is_fmt_valid
Drop video_stm32_dcmi_is_fmt_valid() as it is not needed. In this
function, (i) checking against a format based on another utility
function video_bits_per_pixel() is not robust, this check is done in
the sensor driver, (ii) checking against the heap size is not
appropriate because this should be done when allocating buffers, not
in get/set format.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
fcadb792be drivers: video: Compute bits per pixel according to format
Compute bits per pixel according to the pixel format instead of
hardcoding it.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
da12135525 drivers: video: ov5640: Fix constrast value sign
Fix sign's register for constrast value.

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
a3c31a5ca1 drivers: video: ov5640: Fix brightness control register
Fix the sign register for brightness control

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Trung Hieu Le
cc5f5506da drivers: video: ov5640: Fix HUE register write
SDE_CTRL8_REG's value must be modified using modify_register.

Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
ae63908ae7 drivers: video: ov5640: Drop cur_pixrate internal variable
Update the control value directly. No need for an internal variable.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Farah Fliss
33ff1f65d6 drivers: video: mt9m114: Make the driver multi-instance
The mt9m114 camera driver used to be single-instance.
Improve it to multi-instance.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Farah Fliss
46bf6b589f drivers: video: mt9m114: Fix coding style
Fix coding style in a variable naming.

Signed-off-by: Farah Fliss <farah.fliss@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
c94bcb883b drivers: video: mipi_csi2rx: Fix type range related to pixel rate
Fix some type range related to pixel rate which can cause overflow.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Phi Bang Nguyen
a1e58acf4b drivers: video: mipi_csi2rx: Explicitly set init priority
The MIPI CSI-2 Rx needs to be initialized after the camera sensor which
is generally initialized with CONFIG_VIDEO_INIT_PRIORITY.

This is currently true "by chance" due to the order the linker links the
object files. This linker order is not easily controlled, so use an
explicit priority value to ensure this requirement.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-05-20 18:27:35 +02:00
Bjarki Arge Andreasen
8cf519db06 drivers: spi: nrfx_spim: self resume until spi_release()
The nrxf_spim driver currently resumes itself for the duration of
a transfer, however, in case SPI_LOCK_ON is used, the driver needs
to keep itself resumed until spi_release() is called. Currently,
this results in unbalanced suspend as the bus puts itself both
after transaction is done, and when spi_release() is called.

This patch makes the driver check if SPI_LOCK_ON is set once
transaction is complete, if yes, selv get one more time to
account for the two puts which will follow.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:09:11 +01:00
Bjarki Arge Andreasen
43720efe31 Revert "drivers: spi: nrfx_spim: prevent self suspend until spi_release()"
This reverts commit 937a44a74e.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:09:11 +01:00
Bjarki Arge Andreasen
f94c6f20ff drivers: clock_control: nrf fll16 remove closed loop impl
Remove the closed loop mode implementation for the fll16m clock.
Closed loop causes a hardware bug resulting in increased current
consumption if SoC experiences high, but within spec, temperatures.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-05-20 16:08:31 +01:00
Sai Santhosh Malae
1971bc0a8e drivers: i2s: siwx91x: Add siwx91x I2S primary driver
Implement I2S driver for siwx91x device

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-20 15:24:50 +02:00
Sai Santhosh Malae
dcdc8e8a55 drivers: i2s: siwx91x: I2S clock initialization for siwx91x
Clock driver changes required for initializing the I2S clock
for the siwx91x driver

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-20 15:24:50 +02:00