After removing NATIVE_APPLICATION, only NATIVE_LIBRARY is
possible with ARCH_POSIX.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is not possible to build anymore in that mode, so we do not
need to support it in this driver cmake files.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Enhanced RX cannot be used when UART_x_NRF_HW_ASYNC is used so changing
default value to depends on.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
In certain configurations timeout field is not present in the
data structure so preprocessor ifdef must be used instead of
compiler check.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The variable 'mask' was declared but never used in
uart_sedi_line_ctrl_set().
This commit removes it to clean up the code..
No functional changes.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
USB_OTG_HS_EMB_PHY macro is always defined, so
`defined(USB_OTG_HS_EMB_PHY)` always results in true. This means that
driver always selected `USB_OTG_SPEED_HIGH_IN_FULL` and never
`USB_OTG_SPEED_HIGH`.
Fix that by checking value of defined macro.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Deleted a redundant check for 'rpu_ctx_zep' pointer after it was already
dereferenced.
Clarifies code logic in nrf_wifi_get_power_save_config function.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Wrap K_HEAP_DEFINE to fit within 100-character CI limit and apply
consistent spacing.This is a formatting-only change.
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Adds an assertion and runtime log to ensure 'step' is not zero before
using it in division,preventing undefined behavior without modifying
the public API.
Avoids a signature change (void → int) to preserve API stability for
Zephyr 4.2.A more complete solution can be proposed for 4.3.
CID: 444378
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Fix regression caused by memset() replacement to zero volatile struct.
ESP32-C6 data_buf struct differs from other SoCs and needs custom
handling.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
s/net_if_get_by_ifindex/net_if_get_by_iface/
Fixes: 0e57844b2d ("drivers: wifi: esp_at: Bind DNS to device net
interface")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The reset commands were sent only in SPI mode, causing the device not to
be properly reset when in QPI mode. On the STM32H747I-DISCO boards, this
was causing the driver initialization to fail due to a bad SFDP magic
after flashing the external memory using STM32CubeProgrammer since the
external loader is configuring the flash memory in QPI mode.
The commands are sent in QPI mode first, then in SPI mode:
- If the flash memory was in QPI mode, the two first reset commands are
processed and after reset, the flash memory is in SPI mode and
correctly handles the SPI mode reset commands.
- If the flash memory was in SPI mode, for each QPI command the chip
select signal will be released before the flash memory had the
opportunity to receive a whole command (1 byte), so the partially
received commands will be ignored and won't cause any harm. Then, the
chip is reset by the commands sent in SPI mode.
Signed-off-by: Thomas Altenbach <altenbach.thomas@gmail.com>
This is not really high priority to support and is disrupting test
reporting, for now just hotfix the test by returning that this is not
supported, it's not really necessary anyways, there's multiple ways to
call the API to achieve the same effect.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is really no need for this header file at all besides if
there is a requirement to be annoying.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This data update returns an error, we should propogate it where it is
called if there is an error returned.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The transfer must be aborted before clearing the status flags otherwise
they will be set again before the transfer is aborted and stay set
causing infinite interrupt.
Also, elevate the log message to error level and give it actual useful
information. The "flag" being logged before literally just is a bit that
says if there is an error or not, which we already know by virtue of
handling an error. The channel error status has actual details about
what was the reason of the error. Also this status should be reported
before the transfer is aborted to get the right status.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Adhere to Programming Guide with regards to when the DIEPCTL0.CNAK is
set. This allows the driver to survive abusive control transfers with
extremely short host timeouts.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
With the four-channel-capture-support property enabled, the STM32 PWM
driver was missing every other frames during PWM capture.
The counter values are now reset just after getting the pulse and the
period of the cycle, instead of waiting the next interrupt to do so, and
thus missing a cycle.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The 'sys' argument in clock_control_renesas_ra_get_rate() is unused and
has been removed to clean up the implementation.
This also aligns with the function's actual behavior and eliminates
misleading validation logic.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Function spi_context_release reads the content of ctx->config without
checking first if it is set. In many drivers (including STM32), when a bad
configuration is made for the first transaction, ctx->config is not set,
and spi_context_release is called, resulting in hard fault.
This commit adds a check that ctx->config exists before reading it to
avoid this problem.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fixed a bug where unconfigured clocks were connected to the can
interface in the device tree for SAM0, causing the interface to work
incorrectly. Fixed by adding the correct index when calling GENCTRL.
Also, the default divider has been reduced to 6 to allow setting
the bitrate to 500 kbps.
Tested on a canopennode sample on a board with an ATSAMC21E18A
microcontroller.
Signed-off-by: Vitaliy Livnov <vitaliy.livnov@devkit.agency>
Move the call to prepare_regulator_voltage_scale()
before PLL setup in clock_stm32_ll_h7.c.
This ensures the voltage regulator is configured
to the appropriate voltage scale before increasing
the system clock frequency via PLLs.
Without this change, the system configuration
may be out of spec.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Coverity reported a memory - illegal accesses when using memset in
ataes132a_aes_ecb_block(). This can happen when the input block is
exactly 16 bytes: memset(¶m_buffer[19], 0x0, 0) is called. But this
is an undefined behaviour in C even if size is 0, as ¶m_buffer[19]
is an invalid pointer.
The fix consists of simply skipping memset() in this case, since there's
nothing to zero out.
Coverity CID: 434642
Signed-off-by: Loic Domaigne <tech@domaigne.com>
When the QSPI is used in dual flash mode, e.g. on the STM32H747I-DISCO
board, only the first flash memory was reset and configured in 4-byte
addressing mode. This was in particular causing data to be incorrectly
read from the second flash memory and only even bytes were valid during
a read.
The dual flash mode was only enabled after reading the SFDP table since
it is desired to read the table of only one flash memory, not both.
This commit changes the driver to only disable the dual mode temporarily
while reading the SFDP table, ensuring all other commands and in
particular configuration commands are sent to both flash memories.
Signed-off-by: Thomas Altenbach <altenbach.thomas@gmail.com>
The STM32F7 family does not yet support power management in Zephyr.
Besides, LL_I2C_EnableWakeUpFromStop and LL_I2C_DisableWakeUpFromStop
are not implemented in the H7 HAL/LL drivers
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Replace memset() with an explicit loop to zero the data_buf array,
which is part of a volatile struct. Standard memset does not guarantee
volatile stores, which can lead to incorrect hardware access.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Correct PLL input frequency calculation to consider
HSI clock divider in clock_stm32_ll_h7.c file.
For sake of simplicity, use PLLSRC_FREQmacro that
already considers the HSI clock divider when applicable.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
During #89407 a driver-specific header stm32_dcmipp.h got introduced to
support new functionnalities not yet covered by video APIs.
Move this header into a new <include/zephyr/drivers/video/> include
direcctory like what other driver classes do.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Fix an issue where the BME280 sometimes returns an incorrect chip ID
immediately after a power cycle. This causes sensor initialization to fail.
According to the datasheet, the sensor requires a 2 ms start-up delay after
power is applied. This patch introduces a sleep delay to ensure the
required start-up time is respected before reading the chip ID.
Signed-off-by: Filip Stojanovic <filipembedded@gmail.com>
Setting the DOZEN bit in the flexio so the soc
does not force the peripheral to go into
low power mode when the soc is in idle.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Previously we always had driver to support 2M PHY regardless of
configuration. As this was fixed the missing support statemenent
caused 2M support to miss regardless of configuration.
Signed-off-by: Petri Pitkanen <petri.pitkanen@silabs.com>
The clock tree of the STM32H7RS series uses the ppre1
and ppre2 naming convention instead of apb1_prescaler
and apb2_prescaler for bus prescaler.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Current Implementation to write to MAC_MDIO_ADDRESS causes CR to be
set to 0. This leads to the divide always being 42 (on FRDM_MCXN947)
so, by default the clock is running at ~3.6MHz which is out of spec
range (1.0-2.5MHz)
This stops the do_transaction function from overwriting CR.
It also saves off the CR register before DMA reset
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
