Preparation to introduce the Upper Link Layer (ULL) and
Lower Link Layer (LLL) split architecture.
- Move SoC dependent HAL to vendor specific folder.
- Preparation to split data structures into ULL and LLL
types.
- Added more role and state conditional compilations.
- Added some work-in-progress implementation of advertising
extensions, will be used as inspiration in the new split
architecture work.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Updates the MCUXpresso SDK to version 2.5.0 for applicable SoCs.
Wireless (KW*) and legacy (KL25) SoCs were not included in this
MCUXpresso SDK release and are therefore not updated here.
New in this release is SoC-level and board-level support for external
xip flash in the i.MX RT family.
For RT1050, we are now using the MCUXpresso SDK for the EVKB version of
the board, which correponds to an upgrade from A0 to A1 silicon.
However, we don't yet have Kconfigs in place to support A1 silicon part
numbers, and therefore add a simple cmake hack to convert A0 part
numbers to A1 part numbers.
The SDK flash driver interface also changed slightly in this release,
and thus the zephyr flash shim driver is updated accordingly.
Origin: MCUXpresso SDK
License: BSD 3-Clause
URL: mcux.nxp.com
Purpose: Provide device header files and bare metal peripheral drivers
for Kinetis, LPC, and i.MX SoCs.
Maintained-by: External
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
When MSI clock is available and in PLL-Mode (high accuracy), use it as
USB source clock. This allows to enable USB on STM34l475 disco iot
board without having to add external oscillator.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The Kconfig option ETH_SAM_GMAC was missing it's dependency on
NET_L2_ETHERNET. Before this patch Kconfig was allowing users to
enable the driver, but the driver was not added because the CMake code
only adds the driver when NET_L2_ETHERNET.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Samples for cc3220sf_launchxl where assertions are enabled
(e.g. http_get) fail to build because some of the strings used in the
simplelink wifi driver have parentheses around them. This breaks the
current implementation of the __ASSERT macro. This commit removes
the parentheses, which are unnecessary.
http_get has been verified to build after this change.
Fixes#12192
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Return actual pixel format that is in use by the SDL display driver
instead of returning a hard coded value.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
Make the following nRF peripheral drivers:
- ADC
- GPIO
- I2C
- SPI
- UART
- USB_DEVICE
enabled by default so that users do not need to explicitly enable them
in their applications after choosing an nRF SoC as the build target.
Kconfig options enabling these drivers depend on both a given hardware
feature (e.g. I2C) and an nRF family SoC selected, so effectively they
will be automatically enabled only when it is adequate (and in most
cases these drivers are the only option for a given hardware feature
on nRF SoCs).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implementations of both flavors of serial drivers for Nordic SoCs
are no longer dependent on the gpio driver. Remove the dependency
from Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert lsm9ds0_gyro driver to get the device name as well as
i2c slave information and gpio info for triggers from device tree.
Updates the build_all test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Nordic UICR are non-volatile memory registers for
configuring user-specific settings. Basically it is subset of flash
memory available in the SoC.
Add support for operations on NVM which belongs to UICR.
UICR are written or read as ordinary flash memory.
For erasing UICR it is required to call erase with UICR start
address and its size (this is caused by what hardware supported).
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
nRF 16MHz clock is used by both BLE radio and temperature sensor.
During BLE connection if the temperature sensor is also used then
at some point assert condition is hit in temp_nrf5_sample_fetch().
The error code -EBUSY seen during clock_control_off() is that clock
is no longer needed for the temperature sensor, but it cannot be
just turned off because it is still needed for BLE connection.
Signed-off-by: Dhananjay Gundapu Jayakrishnan <dhananjay.jayakrishnan@proglove.de>
ieee802154_nrf5 uses net_analyze_stack function in a loop, which
prints logs at inf level. As net_core's log level is used in
this function which by default is set to inf, it kept spamming stack
usage logs.
Prevent this behavior by adding additional log level check in the driver
itself, so that this log will only be printed if
IEEE802154_DRIVER_LOG_LEVEL is set to debug.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Convert lsm9ds0_mfd accel/magn driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fixed channel type in get accel/magn channel routines,
where, by mistake, GYRO definitions were used instead of
ACCEL/MAGN ones.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add support for SoF events to the USB STM32 device driver. When
CONFIG_USB_DEVICE_SOF is enabled, enable the corresponding interrupt
and provide a non-weak callback function calling status_cb.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Check for ARLO, BERR, OVR, and NACK errors during any kind of
transmission. Helps fix getting into a while(1) loop in any of these
scenarios when in polling mode.
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
On SoC families using a Cortex-M7, it is possible to flush only specific
cache lines. Therefore pass the offset and len so that the flush can be
done with more granularity.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
In general synchronisation between memory and the instruction cache
should be done explicitly, for example this is how it is done for RAM.
It is also done that way for flash writes in the current STM32 flash
driver.
However in case of flash erases, the current STM32 flash driver flushes
the i-cache. It probably doesn't make a big difference for the
Cortex-M3/M4 families as the cache is very small. That said it might
have bigger impact on families based on Cortex-M7 as it has between 4KB
and 16KB of i-cache, that will be added latter in this patch serie.
This patch therefore remove the i-cache flush in
flash_stm32_flush_caches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This reduces the amount of #ifdef and keep all of them at the same
place. The empty function is then optimized-out by the compiler.
At the same time change the negative test by a positive one to simplify
adding new entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The timeout handling in the STM32 flash driver is currently a counter
in the busy check loop. This doesn't scale well across the whole STM32
family:
- The duration of the loop depends on the CPU speed, the activation of
caches.
- The duration of the longest flash operation (a sector erase as the
driver doesn't support mass erase) can varies a lot mostly depending
on the sector size, 2K on F0 and L4 families or 128K on the F4 family.
In addition the timeout can change depending if the writing thread is
prempted or not.
Fix that by defining a timeout in ms depending on the family, and using
k_uptime_get to get a precise measurement of the time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
STM32 uart Kconfig instance flags were not following
same naming scheme than other drivers (i2c, spi, ..)
Update driver to use UART_X instead of UART_STM32_PORT_X
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Moving towards serialized fragmentation, adapting mac command creation
to avoid the need of ll_reserve etc...
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no need to reserve any space for each frag, as the l2 will
allocate a frag for the ethernet header, arp will do the same.
This is one step further to removing the concept of ll reserve.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
I2C transfers could simultaneous be called that would
cause an inconsistent state in NRFX I2C state (and HW).
The NRFX TWI driver would expect to be in state
`NRFX_DRV_STATE_INITIALIZED` while being in state
`NRFX_DRV_STATE_POWERED_ON`.
Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
Improve initialization of the ADC.
After initialization with the default values, the clock source
of the ADC is asynchronous clock (ADACK) and clock divide ratio
is 8. The minimum conversion clock frequency is 1MHz.
Add clock divider selection and set default divide ratio to 1.
That sets the conversion clock frequency to approximately 5MHz.
Default configuration for the voltage reference is set to
external pins V_REFH and V_REFL. Depending on the MCU configuration
V_REFL may be connected to ground and V_REFH to VREF_OUT.
Since Voltage Reference block is not supported, the ADC does not work
properly on FRDM-KW41Z. Add voltage reference selection to fix it.
Enable self-calibration function as recommeded in Reference Manual.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This definition was needed to translate the old symbol used in MDK
for accessing the GPIO peripheral in nRF51 SoCs (NRF_GPIO) to the
one used for all newer SoCs (NRF_P0). Now the translation is done
in the HAL for GPIO (nrf_gpio.h).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to make use of the configurable bus width and burst size
options in memcpy mode, lets add configurations bits for the same.
This configuration is derived from the TRM of STM32F446xx Page No. 210
"Memory-to-memory mode" section and verified on 96Boards STM32 Sensor
Mezzanine board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This patch fixes a bug in System timer driver where
the sys_clock_disable() function was enabling the
timer instead of disabling it.
Change-Id: I4a667d30d43d1f84094d074241ee18d7bb2b2565
Signed-off-by: David Vincze <david.vincze@arm.com>
The introduction of -fno-common caused a link error in eswifi driver due
to lack of missing extern on eswifi_bus_ops_spi. Adding the extern
resolves the link error.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
