Enable support for HCLK, PCLK1, PCLK2, PCLK4 and PCLK5 as subsystem
clock sources identifiers on STM32N6 SoCs. HCLKx relates to the AHBx
buses clock and PCLKx relate to the APBx buses clocks.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
SETUP data is unconditionally ACKed by the controller. Other DATA
packets sent to OUT control endpoint 0 (i.e. OUT Data Stage packets
and OUT Status Stage packet) are ACKed by the device only if the
endpoint was enabled with CNAK bit set.
In Buffer DMA mode controller will lock up in following scenario:
* OUT EP0 is not enabled, e.g. OUT Status Stage has finished
* Host starts Control Write transfer, i.e. sends SETUP DATA0 and
device ACKs (regardless if endpoint is enabled or not)
* host sends OUT Data Stage (OUT DATA1)
- software enables endpoint to be able to receive next SETUP data
while host is transmitting the OUT token. If CNAK bit is set
alongside the EPENA bit, the device will ACK the OUT Data Stage.
If CNAK bit is not set, the device will NAK the OUT Data Stage.
When the lockup occurs, from host perspective the OUT Data Stage packet
was successfully transmitted. This can result in host starting IN Status
Stage if there was only one OUT Data Stage packet. This in turn results
in device never getting the DOEPTINT0 SetUp interrupt. Besides just not
getting the SetUp interrupt, any subsequent control transfer won't be
noticed by device at all.
The lockup was first observed while stress testing. The host was issuing
endless sequence of Control Write, Control Read, Control Write, Control
Read, ... commands. When the controller did lock up in Buffer DMA mode,
from host perspective the device was timing out all control transfers.
Avoid the Buffer DMA lockup by setting CNAK bit only when necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Implement the '.reset' interface in the nrfx-timer driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Implement the '.reset' interface in the native-posix driver
to allow the upper layers to use the counter_reset
function.
Signed-off-by: James Roy <rruuaanng@outlook.com>
The U-Blox M10 seems to interleave UBX and NMEA messages in a way that
confuses the M8 driver leading to missing the same message that directly
follows the UBX part every time (leading to no navigation updates).
As the driver does not parse the UBX blocks during normal operation anyways
it can just be disabled.
Signed-off-by: Jakob Riepler <jakob+zephyr@chaosfield.at>
The i3c group address support is rather very incomplete here. Remove
references to it. This could all easily come back when/if group support
comes in.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Make the zephyr,input-sdl-touch driver be multi instance and add the
possibility to associate it with a display. The input events are only
emitted if the events occured on this display.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
Adds storing of the zephyr display device struct inside of the windows
user_data, so it can be used inside of the SDL touch driver context for
checking the origin window of a received event.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
MAX14917 is an eight high-side switch, specified to deliver up to 700mA
(min) continuous current per channel. The high-side switches have
on-resistance of 120mΩ (typ) at 25°C ambient temperature
Signed-off-by: Robert Budai <robert.budai@analog.com>
Moves the MPU6050 accel/gyro scale settings from KConfig to Devicetree.
Adds a new setting for the MPU6050 sample rate divider register and
transmits it to the sensor upon initialization.
This helps to reduce the interrupt firing rate when combined with the
data ready trigger.
A default division factor is provided which ensures compatibility with
existing applications.
The MPU6050 sample application is extended and used for hardware tests.
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Add support for setting the sample frequency via `attr_set` and the
output data rate from device tree source.
Signed-off-by: Fredrik Gihl <fgihl@hotmail.com>
There is const used in a few places and some hacks to get around
that const. Just remove the const as well as remove the hacks.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Added support to get irq from dts node, because some platforms may
use multi-level interrupts, and the system INTID may not be connected
directly to interrupt controller.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Before that fix we read the inpupt register when toggling
gpios. With this fix, we now read the output register for
toggling a pin.
Signed-off-by: Sven Ginka <s.ginka@sensry.de>
Due to the introduction of `shell_fprintf_normal` in PR #77192, we can
minimize caller overhead by eliminating direct `color` parameter passing.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Aligned the `struct shell *` argument name from `shell_ctx` to `sh`
for consistency with other drivers' usage of `sh`, and to match
the `shell_cmd_handler` argument name.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Allow configuring MTU for CMUX.
Some AT manual and specification define this as a
frame size. Linux ldattach default to 127 bytes,
3GPP TS 27.010 defaults to 31.
We should limit our CMUX frames to a size that
remote end is capable of handling.
Linux silently drops oversized frames.
Also, remove MODEM_CELLULAR_CMUX_MAX_FRAME_SIZE as
this was only limiting a buffer sizes, and resulted
CMUX frames to be capped to same value.
Use MODEM_CMUX_WORK_BUFFER_SIZE and MODEM_CMUX_MTU instead.
Also rename CONFIG_MODEM_CELLULAR_CHAT_BUFFER_SIZES to
CONFIG_MODEM_CELLULAR_CHAT_BUFFER_SIZE as it is now
only used as a Chat module. DLCI pipes use
CONFIG_MODEM_CMUX_WORK_BUFFER_SIZE.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Hexadecimal integer literals are signed if they can fit into a signed int,
which causes undefined behavior.
This happens here because 0xFF can fit into a signed int and then gets
left-shifted by 24, undefined behavior for signed integers.
Signed-off-by: Daniel Hajjar <daniel.hajjar16@gmail.com>
Add support for additional line control signals. Improved configuring
uart_config_flow_control options.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
The STM32WB09 TRNG does not clear FIFO_FULL IRQ flag in hardware once the
FIFO is no longer full, a behavior which differs from all other series.
This results in spurious IRQs, as the TRNG IRQ line effectively remains
high forever once a single interrupt has been generated.
Clear the flag in software after reading from the FIFO on STM32WB09 SoC.
N.B.: the error IRQ flag is already handled properly, as this flag must
also be cleared by software on other series.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
CONFIG_SOC_STM32WB09XX implies CONFIG_SOC_SERIES_STM32WB0X, making it
pointless to assert the latter is defined before checking the former.
Simplify #ifdef checks in the entropy driver's LL wrappers thanks to
this observation, by removing unnecessary nesting.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
First commit to add support for Renesas RA i2c sci-b driver
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Remove unnecessary check that the SPI clock is being set to a frequency
above 2 MHz to allow devices running at common lower frequencies (i.e.
1.2 MHz and 400 kHz).
Replace with check that the frequency is not below the minimum frequency
supported by the chipset to prevent overflow error which can occur if
the HAL sets a frequency too low resulting in a SPI clock much larger
than expected.
Fixes#69986
Signed-off-by: David Lim <dlim04@qub.ac.uk>
There is no point in calling k_event_test() to determine what events are
posted and then passing that value to k_event_clear(). Simply pass
UINT32_MAX to k_event_clear() and use the return value to slightly
reduce overhead.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
OUT endpoint 0 cannot be disabled and therefore the only way to forcibly
reclaim the buffer is to reset the core. The reset does not finish if
PHY clock is not running, but just triggering the reset seems to be
enough to be able to reclaim the buffer.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
When the endpoint is disabled while the core is hibernated, there are
timeouts waiting for interrupts. It is not clear how the stack should
behave when class and/or application wants to disable the endpoint while
device is suspended. The problem was originally observed when the
endpoints were disabled as a result of usbd_disable() call.
Avoid the timeouts by modifying the backup values instead of the real
registers (which are not accessible when hibernated).
Split the 32-bit txf_set variable into two 16-bit variables (txf_set and
pending_tx_flush) because maximum number of TxFIFO instances is 16.
The txf_set variable is used as-is, while the pending_tx_flush is used
to keep track of TxFIFOs that have to be flushed on hibernation exit.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This commit changes to use ambiq hal power control APIs
to replace the previous register settings to power on
ambiq drivers.
Signed-off-by: Hao Luo <hluo@ambiq.com>
The Xilinx AXI Ethernet subsystem is commonly found in FPGA designs.
This patch adds a driver and device tree bindings for the Ethernet MAC
core and its MDIO controller.
The driver was tested on a RISC-V softcore in an FPGA design, with an
RGMII phy and Ethernet subsystem version 7.2 Rev. 14. Device tree
bindings match the device tree generated by Vitis hsi. Note that Vitis
generates one of the two included compatible strings depending on
version.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
Extend runtime PM to support fast instance (spis120) which requires
additional action in suspend/resume phase.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add support for the STM32WB0 series to the existing STM32 driver for
Independent Watchdog peripheral.
NOTE: this commit only includes basic support for the watchdog.
STM32WB0 specificities such as the different possible clock sources, LSI
frequency measurement or window support are left for future implementation.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Remove the inline attribute from stm32 clock drivers functions
especially for functions that are only referenced in the clock API
operation structure and therefore cannot be inline. As a generic
comment, today compiler are smart enough to optimize embedded software
without needing inline function attributes in the source files.
This change hopes that next stm32 clock driver will no more replicate
this bad habit when using existing source files as implementation
examples.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
IN_RANGE() macro from zephyr/sys/util.h returns a boolean value
so it should be treated as such and not compared to a decimal value.
Fix stm32 clock drivers accordingly and simplify places where the
value is compared to true.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Correct typo in STM32H7 HSI clock calibration directives introduced
in commit 6b167f2596 ("drivers: clock_control: add calibration for
h7 pllx_hsi") that currently has no functionnal impact but is worth
to be fixed for consistency.
No functional change,
Fixes: 6b167f2596
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove function exported stm32_system_clock_update() defined in
STM32H7RS series clock driver but that is not used and not even declared.
There already exists a CMSIS SystemCoreClockUpdate() function in
STM32 HAL drivers for the exact same purpose one may use if needed.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add ULP Coprocessor board support for C6.
This requires a change in the board qualifier depending on the build
target.
Update esp32c6 overlay and configuration files to the proper name.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
