Corrects an incorrect transfer size calculation when setting up DMA
transfers with a data size other than one byte.
Signed-off-by: John Batch <john.batch@infineon.com>
* Corrects DMA length calculation when data size is not one byte.
* Corrects incorrect descriptor address assignment in chain operations.
Signed-off-by: John Batch <john.batch@infineon.com>
Commit 6b2f1c19ac changed the lora_signal_bandwidth enum values from
sequential indices (0, 1, 2) to actual kHz values (125, 250, 500).
With the new enum values (125, 250, 500), this causes on loramac-node an
array out-of-bounds access, resulting in undefined behavior and crashes
(USAGE FAULT: undefined instruction).
Fix this by adding a translation function that converts the Zephyr
bandwidth enum values to the array indices expected by loramac-node.
Fixes: 6b2f1c19ac
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Commit 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ
settings.") introduced a bug where PL011_SBSA_CONFIG_PORT defines
the IRQ config function as pl011_irq_config_func_sbsa_##n but
IRQ_CONFIG_FUNC_INIT(n) references pl011_irq_config_func_##n,
causing a compilation error when building for boards with SBSA
UART and interrupt support enabled.
Fix by using the correct function name with the _sbsa_ suffix
in the SBSA config port macro.
Fixes: 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ settings.")
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Fixes the Kconfig name of this so that it matches the value from
soc.yml, and deprecates the old name - this is required to support
future build system features. Additionally, it fixes an issue in
Kconfigs of this SoC of duplicating existing symbols
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
The calculation of the sensor value uses the intermediate value of the
function `adc_raw_to_microvolts_dt`. This results in a sensor value
with a resolution that is not below `voltage-divider-scaling` millivolts
which can be too rough for some applications.
Using `adc_raw_to_microvolts_dt` and 64-bit-based scaling improves
the resulting voltage resolution.
Therefore, the public function `voltage_divider_scale64_dt()` is
introduced, which performs the same as `voltage_divider_scale_dt()`.
This decision does not affect implementations that use the current
32-bit implementation of `voltage_divider_scale_dt()`.
Signed-off-by: Stefan Schwendeler <Stefan.Schwendeler@husqvarnagroup.com>
Fix offset calibration handling and improve type safety in the
LPADC driver:
- Change offset_a and offset_b from uint32_t to int16_t to match HAL API.
- Add explicit int16_t casts when initializing offset values from DT.
- Add conditional logic to handle platforms with single offset trim.
- Use LPADC_SetOffsetValue() with appropriate parameters based on
FSL_FEATURE_LPADC_OFSTRIM_COUNT when auto-calibration is disabled.
This ensures proper offset calibration on all supported platforms and
prevents potential type mismatch issues.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Fix inconsistent formatting in the LPADC driver by:
- Consolidating multi-line preprocessor conditionals onto single lines
- Aligning macro continuation backslashes consistently
- Fixing indentation in structure initialization and macro definitions
- Removing unnecessary line breaks in function calls
No functional changes, formatting cleanup only.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Remove the "number-of-mb-fd" property from the NXP FlexCAN FD binding. The
number of Message Buffers (MBs) supported by a given FlexCAN instance is
always specified in 8-byte sized MBs using the "number-of-mb" property
present in the "nxp,flexcan" binding.
The fact that the Zephyr FlexCAN shim driver sets the MB size to 64-byte
when CAN FD is enabled is purely a software construct which should not be
described in devicetree.
Each 512 byte message buffer RAM region can either contain up to 32 x
8-byte MBs or 7 x 64-byte MBs, so just calculate the number of CAN FD MBs
at driver build time.
The FlexCAN IP can either support 16 (CAN classic only), 32, 64, 96, or 128
8-byte MBs, so limit the property to these values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Data that isn't a touch event needs to be discarded, especially after
wakeup when it's possible the read has no touch event.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Instead of reading calibration data (device-unique, but never changing!)
then multiplying the result with a constant as part of each conversion,
perform the read+multiplication once during init and cache the result.
This notably avoids frequently an ICACHE disable/enable cycle on STM32H5,
which is a somewhat slow operation.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Various fields were stored in the instance data despite being initialized
at compile-time to a constant value.
Move these fields to the instance configuration instead.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Bind registers to the local variable in the ti_adc_init() function
after mapping the address space via DEVICE_MMIO_MAP.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Allow using other references by removing the hard requirement on it being
internal. To be able to use internal voltage, the DT property ti,vrefp can
be used, otherwise it is ignored.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
Update the IMSIC driver to use the renamed micsr_* indirect CSR
access functions instead of the old icsr_* names.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
ataes132a_state is an array of CRYPTO_MAX_SESSION length.
This constant must be used when iterating over its elements
and not ATAES132A_AES_KEY_SIZE (even they having the same
value).
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
The settings and calculations are often done in micro or nano seconds
and the result is not always shown. So, just add the period cycles as
part of the error message to get the calculated value.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
The interrupts should only be enabled after the START condition is set
by either writing to TWIHS_THR(for writes) or by writing TWIHS_CR_START
to TWIHS_CR. Otherwise, the TXCOMP interrupt may fire before the driver
is ready, causing invalid reads and the semaphore to deadlock.
Link: https://ww1.microchip.com/downloads/en/DeviceDoc/SAM-E70-S70-V70-V71-Family-Data-Sheet-DS60001527D.pdf
Signed-off-by: Alex Kar <github@alexkar598.dev>
In uart_stm32_async_rx_buf_rsp(), when the provided RX buffer is not
located in non-cacheable memory, the function would return -EFAULT
while still holding the IRQ lock acquired at the start of the critical
section. This causes a system deadlock as interrupts remain disabled
indefinitely.
The nocache validation check has been moved outside the critical
section to ensure proper error handling. The check is performed before
acquiring irq_lock(), maintaining the same validation behavior while
preventing the lock from being held during the early error return.
Fixes a bug where async UART RX operations with improperly
placed buffers would hang the system.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
Fix submit condition for non-control transfer. Do submit when any
of the following conditions is met:
1. Transfer buffer (net_buf) is full
2. Last packet size is less than mps
3. Isochronous transfer
USB mass may request C1 for sector size (512 bytes)-aligned and C2
for CBW (13 bytes).
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
With USBD and HSUSBD re-organized, SoC must have USBD and HSUSBD at
the same time to pass compile. However, M2L31 just has USBD and meets
compile error with HSUSBD unsupported. To avoid adding too many
conditional (#if condition) code for the error, create one dummy
HSUSBD device definition for M2L31 to pass compile.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For HSUSBD, Control transfer with Data OUT stage will break. This is
caused by FIFO flush which cannot be done timely even though in Setup
token interrupt handler. For this, error recovery with FIFO is not
done in Setup token/packet handler and rely on USB reset handler to do
it as catch-all.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Some SoC series allow USB controller to be disabled temporarily
on unplug, and then enabled back on re-plug. Add support for such
configuration option in DT and UDC driver.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Add support for center-aligned PWM mode in addition to the existing
edge-aligned mode. When center-aligned mode is configured, adjust
pulse and period cycles by dividing by 2 to maintain correct timing.
Add validation checks in PWM capture functionality to edge-aligned
mode only, as capture is not supported in center-aligned mode.
Assign the value directly to avoid re-calculating period_cycles
based on pwm_freq in TPM_SetupPwm, which could lead to precision loss.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Replace interrupt register checks with explicit capture_active flag
to track capture state. This provides more reliable state management
and fixes potential race conditions when checking if capture is active.
Also optimize TPM_SetupPwm call to only configure the specific channel
being set instead of all channels, improving efficiency.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
The driver uses spinlocks for synchronization (due to strict timing
requirements) which makes it defacto incompatible with almost all SPI
backend drivers, as most of them use `k_sem_take` internally.
This change reworks the driver in the following way to solve this
problem:
- Replace driver locks with `k_mutex`
- Run the `load` functions on the system workqueue to execute them on
a cooperative priority
- Use additional local spinlock in the `bitbang` driver variant to ensure
precise timing
Signed-off-by: Martin Stumpf <finomnis@gmail.com>
The ICE40 driver uses a CS hack that effectively 'steals' the CS pin
from the SPI driver during `load` by setting the CS pin id to 0.
This triggered the newly introduced assert during gpio_set.
This change introduces a hotfix for this where, instead of setting the
CS pin to 0, it sets the entire CS to 'hardware based'.
It is still a hack and should be reworked at some point.
Signed-off-by: Martin Stumpf <finomnis@gmail.com>
When in pre-kernel, kernel objects may not be in a usable state.
Therefore, guard k_mutex_lock()/k_mutex_unlock() usage with
!k_is_pre_kernel().
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
The driver was using EDAC_NXP_ERROR_INJECT instead of the correct
CONFIG_EDAC_NXP_ERROR_INJECT Kconfig symbol for conditional compilation.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
Move camera XCLK setup from DVP driver (POST_KERNEL) to esp_lcd_cam.c
(PRE_KERNEL_2) to ensure the image sensor receives clock before its
I2C initialization. This fixes a race condition where sensors like
ov2640 would fail to respond during probe because XCLK wasn't yet
configured.
Also adds timestamp to captured video buffers and removes a noisy
error log for set_selection when the source returns -ENOSYS.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
when pipe 1 or 2 is selected and parallel bus is chosen
HAL_DCMIPP_PARALLEL_SetConfig is failing, since it gets called twice
and driver is already in HAL_DCMIPP_STATE_READY state
Signed-off-by: Roman Pustobaiev <romanpustobayev@gmail.com>
Wifi chip module may depend on SDHC(SDIO) module.
Currnetly, default init. priority is
CONFIG_WIFI_INIT_PRIORITY(80) & CONFIG_SDHC_INIT_PRIORITY(85).
It causes the issue.
Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
Use SHELL_HELP macro for help strings to ensure consistency across
various shell modules and to save on flash usage.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Remove parts of the legacy implementation in eth_stm32_hal_common.c for
the loading of the MAC address when the device-tree is used. Use
net_eth_mac_load() for all these cases that were not destined for
production-ready products.
When cfg->mac_cfg.type == NET_ETH_MAC_DEFAULT, it means that neither
"zephyr,random-mac-address", "local-mac-address" or "nvmem-cells" were
used. For this case, keep the legacy property-less implementation to
avoid compilation errors and have a default, backward-compatible case.
Warning: this commit causes backward compatibility breakage for
implementations using "zephyr,random-mac-address" or "local-mac-address"
properties.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
