Extends the existing haptics subsystem API to provide generic support for:
- playback source selection
- integrated sensor readings
- output level control
- calibration
- streaming effects over a control port
Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
Currently, there was no check in place if set_power_save()
was called in AP mode which might result in undefined
behavior.
Additionally, esp_wifi_get_config() doesn't return an
error when querying for STA config in AP mode.
Signed-off-by: Madhab Sharma <madhabsharma94@gmail.com>
The debug prints were showing the maximal length of operations, instead
of the operation length actually used.
Signed-off-by: Karl Palsson <karl.palsson@marel.com>
Factor the m2m software-trigger check into a helper using
FSL_FEATURE_EDMA_INSTANCE_HAS_CHANNEL_MUXn(base) for per-instance
detection, and gate all four m2m-software-only branches (SG -ENOTSUP,
burst-length override, manual start trigger, suspend -ENOSYS) on the
new dma_mcux_edma_m2m_software_only().
Fixes parallel display output on MCXN947 (FlexIO-triggered m2m
channels were treated as software-only and lost their per-minor-loop
pacing).
Fixes: efe48ea674Fixes: #108367
Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
The NWP ignored the host programmed listen_interval and fell back to
its ~1s default, so both WIFI_PS_WAKEUP_MODE_LISTEN_INTERVAL and
WIFI_PS_WAKEUP_MODE_DTIM woke the device roughly once per second
regardless of the AP's DTIM period or the host-requested LI.
Set SL_WIFI_JOIN_FEAT_PS_CMD_LISTEN_INTERVAL_VALID in
siwx91x_iface_init() so the NWP honors the listen_interval supplied
via the host-side power-save command path (i.e. the value programmed
through sl_wifi_set_performance_profile_v2()) instead of substituting
its built-in default.
Signed-off-by: Tejus Subramanya <ters@silabs.com>
Fixes zephyrproject-rtos#106241
When the RNG peripheral is enabled in the device tree but its kernel
clock source is not configured (e.g. HSI48 missing on STM32H7), the
driver currently hangs indefinitely inside generate_from_isr() with
interrupts locked, because RNG_SR.DRDY never asserts. This makes the
system completely unresponsive and very difficult to debug.
Three changes are made to address this:
1. Replace __ASSERT_NO_MSG(res == 0) after clock_control_on() with a
proper error check that returns the error code and logs a message.
2. Replace __ASSERT(res == 0) after clock_control_configure() with
the same pattern, returning the error code with a LOG_ERR.
3. Add a runtime clock source check that verifies the domain clock is
present in the DTS and running at a non-zero rate using
clock_control_get_rate(), following the same pattern as
sdmmc_stm32.c. Returns an error instead of hanging indefinitely.
4. Add LOG_MODULE_REGISTER so LOG_ERR messages are routed through
the standard Zephyr logging subsystem.
Based on approach suggested in zephyrproject-rtos#106241 by @FRASTM.
Signed-off-by: Anand Kumar <anandvtu16158@gmail.com>
The syscall verifier validated msg->data directly from live userspace
memory and then forwarded the original mutable userspace struct pointer
to z_impl_mbox_send(). A concurrent thread could race msg->data to a
supervisor address after the access check.
Fix this by copying struct mbox_msg into a kernel-stack variable.
Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
I was working with an STM32WB55RG that had the IWDG_STOP bit
unset by a previous developer. It took me hours to figure
out why WDT_OPT_PAUSE_IN_SLEEP didn't do what it's supposed to.
I hope this note helps the next one coming around to this issue.
I also wrote an article about this:
https://chris-besch.com/articles/soc_option_bytes
Signed-off-by: Christopher Besch <mail@chris-besch.com>
Add a bit of history about the driver (the information I would like to
forward to my future me). Try to explain why this driver has this design.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
By replacing "udma_table = cfg->chan_desc" by "chan_desc =
&cfg->chan_desc[channel]", we can simply many statements. So, all the
statements now fits on one line.
desc_src_addr and desc_dst_addr are in fact useless.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Scatter Gather transfers are not supported by siwx91x_udma_reload(). Detect
and reject them.
Also check the size of valid regarding the operation width.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Some fields names contained irrelevant information (eg. "addr" in
"sg_desc_addr_info" and in "sram_desc_addr", "dma" in "dma_desc_pool").
In other case, it lacked of consistency, (eg. "chan" vs "channel",
"config_zephyr" vs "dma_config" vs "config").
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
We try to prefix all the symbols in a file with the same prefix (so the
developer easily understand if a symbols is provided by Zephyr, the HAL or
is internal to the driver).
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Sanity checks were duplicated in siwx91x_udma_config_sg() and
siwx91x_udma_config_single(). Move them in the caller function.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The UDMA drivers includes some functions to translate Zephyr values in
hardware values. However, these conversion are either trivial or not very
consistent. It is more readable to directly work with the native (Zephyr)
values. We just have to check the values requested by the caller are valid
before the processing.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Rather than using internal enum type to store the direction, store the
native (Zephyr) value. It will help to simplify the code in the next
changes.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
We try to prefix all the symbols in a file with the same prefix (so the
developer easily understand if a symbols is provided by Zephyr, the HAL or
is internal to the driver).
A few symbols in dma_silabs_siwx91x_gpdma.c did not follow this rule.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
SPI_SILABS_SIWX91X_GSPI_DMA and SPI_SILABS_SIWX91X_GSPI_DMA_MAX_BLOCKS are
redundant. We can achieve the same by checking if
SPI_SILABS_SIWX91X_GSPI_DMA_MAX_BLOCKS > 0.
Then, rather than pulling the DMA if one device use it, automatically use
the DMA it exist (the user can still disable it by settings DMA_MAX_BLOCKS
== 0).
Thanks to that change, we can remove allthe #ifdef in the SPI driver.
A test in spi_siwx91x_is_dma_enabled_instance() is sufficient to make the
DMA relative functions orphans.
Then, we can enable the dma instances in the board DTS, so the user just
have to set DMA=y to enable DMA in the drivers.
The two errors cases are:
- DMA=y while referenced DMA instance in the DT is disabled. The user get
a compilation error
- DMA=n (or DMA driver is disabled) but the user explicitly set
DMA_MAX_BLOCKS > 0. The user get an error during runtime.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Until now, the SPI driver had to take care about the size of the blocks
sent to the DMA. There were several drawbacks:
- The SPI driver need to know the DMA internal parameter and the SPI
driver has configured for a specific DMA hardware block.
- For large transfer, the user has to allocate a large number of
descriptor in the SPI driver. The user had to know the DMA block size
of set the right parameter and the descriptors were duplicated with the
DMA driver (which store them in the hardware format).
However, our DMA drivers now automatically split the large blocks. So the
SPI driver no longer need to do that.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The UDMA scatter-gather mode rejected any block whose size exceeded
DMA_MAX_TRANSFER_COUNT * burst_length bytes (1024 transfers). The was
caller responsible for splitting.
Apply the same fix as the GPDMA driver: when a dma_block_config block is
too large for a single scatter-gather descriptor, automatically split it
into as many chained descriptors as needed, advancing src/dst addresses
for each chunk (honoring DMA_ADDR_ADJ_INCREMENT / DMA_ADDR_ADJ_NO_CHANGE).
Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The GPDMA rejected any block whose size exceeded
GPDMA_DESC_MAX_TRANSFER_SIZE (4096 transfers). The was caller responsible
for splitting. There is no way for the caller to be aware of this
restriction.
This patch allow the GPDMA driver to automatically split the oversized
block and run the DMA with a linked descriptors.
Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
SiWx91x provide two DMA hardware block: GPDMA and UDMA, The GPDMA is
properly named: silabs,gpdma. However, the UDMA is named
"silabs,siwx91x-dma" without any reference to the hardware block it is
supposed to run.
Rename the UDMA driver to fix this inconsistency.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The NXP Wi-Fi middleware unconditionally accesses IPv4 network
structures and DHCPv4 APIs, causing compiler and linker failures
when CONFIG_NET_IPV4 is disabled (e.g., in IPv6-only environments).
This commit introduces Kconfig guards around the IPv4-specific
logic. Functionally, when IPv4 is disabled, the middleware now
safely bypasses IPv4 static address assignment, IPv4 address and
netmask retrieval, and DHCPv4 client initialization.
Additionally, variables that become unused in IPv6-only builds
are properly suppressed using the ARG_UNUSED() macro.
Fixes#87647
Signed-off-by: T Madhusudhan Rao <tetakalam@aerlync.com>
Drop all the symbols that were incorrectly part of the public header
and move them to a driver-internal header.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When there are multiple zephyr,bt-hci-uart nodes, we currently use the
reset-assert-duration-ms property from the first one for all of them due
to a typo in the initializer macro. Fix it.
Fixes: 9f44b011de ("bluetooth: hci: h4: optional reset pin")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
esp_wifi_set_mode can fail silently if esp_wifi_init was not successful.
Move the mode set and handle its return value post esp_wifi_init error
checking.
Signed-off-by: Madhab Sharma <madhabsharma94@gmail.com>
Include MSPI_DEVICE_CONFIG_IO_MODE in XIP_DEV_CFG_MASK and populate
mspi_cfg.io_mode from dev_config->read_io_mode so the XIP setup call
configures the XIP io-mode which wasn't previously the case.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Some configurations of the DesignWare IP support concurrent XIP
(memory mapping) as part of the IP. The driver currently supports
concurrent XIP using a software workaround and this HW feature is not
yet supported by the driver. However, if concurrent XIP is supported as
well as write XIP not being supported, this will introduce a new
register called XIPSER which this commit adds support for.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Some configurations of the designware IP support write access but not
all. Therefore, this is a configurable devicetree option to enable or
disable support for the mem-map (memory mapped) write registers. Otherwise,
devices that don't support this will come into a bus fault.
signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Enabling of the nrf-mspi XIP is done via the core registers and hence
these functions can just be placeholders to stop compilation errors.
signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Enabling the driver while QEMU is configured to use SLIP driver (which
is the default) causes crash on boot, making any networking sample
defunct in default configuration when running on qemu_x86.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Always use RX FIFO0 when adding RX filters to ensure CAN frames are
processed in the order (priority) received on the bus.
With two FIFOs there is a risk that frames are processed out-of-order by
the application layer.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Use net_eth_set_if_type_wifi() instead of directly accessing
ethernet_context->eth_if_type to set the interface type.
Signed-off-by: Madhab Sharma <madhabsharma94@gmail.com>
Uses generic nomenclature for TDK ntcg series NTC thermistors, which use a
naming scheme that indicates their resistance (R25) and beta (B25/85)
values. Compensation tables are identical for parts with the same
resistance and beta values.
Signed-off-by: Dan Mangum <georgedanielmangum@gmail.com>
Implement the M5PM1 watchdog as a Zephyr watchdog controller child
of the MFD device.
The driver supports a single reset-only timeout channel with one-second
granularity (1 to 255 s).
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
Expose the M5PM1 switchable power rails as fixed-voltage regulator devices
child of the MFD device. The driver supports enabling and disabling the 3.3
V DCDC, 3.3 V LDO, and 5 V boost outputs via the PMIC power config
register.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
Expose the M5PM1 GPIO bank as a Zephyr GPIO controller child of the MFD
device. The driver supports five pins with input/output configuration,
pull-up/pull-down, and open-drain outputs; pin interrupts are not
supported.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
Expose the M5PM1 on-chip ADC as a Zephyr ADC controller child of the MFD
device.
The driver supports rail monitoring channels (VREF, VBAT, VIN, 5VOUT),
GPIO1/GPIO2 inputs via the ADC mux, and an internal temperature channel
at 12-bit resolution.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
The M5PM1 is a small companion microcontroller used on M5Stack boards to
provide power management (battery charging, switchable rails), a small
bank of GPIOs, and an on-chip ADC.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-4.7
Adds the MFD parent driver for the Infineon HPPASS analog subsystem.
HPPASS houses a SAR ADC and Comparator and Slope Generator coordinated
by an Autonomous Controller executing a hardware state machine defined
by a configurable State Transition Table (STT). The HPPASS MFD driver
owns the following shared resources:
- Subsystem Initialization including factory trimming.
- AC Management, including AC start and STT configuration.
- Trigger I/O routing
- MCPASS interrupt handling.
Signed-off-by: John Batch <john.batch@infineon.com>
