The IO_CONTROL_1 register is 3 bytes long according to the datasheet.
This fixes the register not being written to correctly.
Signed-off-by: Luna Pes <zephyr@orangemurker.com>
Shell functions targeting regulator parents used the auto-completion of
regulator devices instead.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Allowed use of counter bit width lower than hardware 24.
In that case, PPI connection is established to trigger
clear task once maximum value is reached.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
This provides default ethosu_flush_dcache and ethosu_invalidate_dcache
overrides. User application can disable it through Kconfig option if it
needs to provide its own.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
The CPOL and CPHA mode handling logic in the SPI configuration was
corrected to ensure proper evaluation of the SPI mode bits.
Evaluate CPOL and CPHA bits using value of cpol_mode and cpha_mode:
`(SPI_MODE_GET(config->operation) & SPI_MODE_CPOL) != 0` and
`(SPI_MODE_GET(config->operation) & SPI_MODE_CPHA) != 0`.
This fix ensures that the SPI configuration is robust and adheres to
expected behavior when setting CPOL and CPHA modes.
Signed-off-by: Xiaolu Sun <xiaolu.sun@intel.com>
Implements HCI close support for the silabs efr32 HCI driver.
Calling `bt_disable()` now works as expected, which is particularly
important for multiprotocol applications.
Signed-off-by: James Smith <james@loopj.com>
- Setting IODEV_SQE to NULL to subsequent triggers are rejected.
- Channel all error-resolutions through handle_result_on_error().
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Update the bit offset of bit VCC_STS in the BKUP_STS register.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Currently, the STM32 TIM counter driver will always register itself as ISR
for interrupts[0] of the timer node. This works fine for timers which have
a single "global" interrupt but not for others (e.g., Advanced Timer) which
have separate IRQ lines for various events.
Borrow the pattern from PWM driver: use the "cc" interrupt if it exists on
timer node, otherwise use the "global" interrupt. If neither of those are
found, a build error is raised to ensure silent failures cannot occur.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Restore setting the ppp link-local address either to CONFIG_PPP_MAC_ADDR or
to a random value 00:00:5e:00:53:XX instead of leaving it uninitialized.
Recently the memory handling for the link-layer addresses was changed from
an approach of copying pointers to managing the memory as a member of the
`net_linkaddr` struct (ref ac3cb9dac0).
The piece of code this patch touches however, relied on the use of the
pointers to function properly.
With the recent change, the MAC address was copied to the new member
location before it was even set (either from Kconfig or selected randomly).
As a result, the link-layer address was kept initialized to zero, which
resulted in a IPv6 address of fe80::ff:fe00:0 which is exactly the
link-local EUI-64 representation of the MAC address 00:00:00:00:00:00
(without flipping the "universal/local" bit).
Signed-off-by: Marc Lasch <marc.lasch@husqvarnagroup.com>
- Shift ifx_cat1 clock_control driver to using pdl instead of hal calls
- add soc.c file containing call to SystemInit()
- Update board's dts files
- add binding for peri divs
- update system_clocks.dtsi for psc3
- add new peri clock_control driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Rework the driver so that it can cover multiple variants. Add variant DT
bindings. Change the compatible name for the mimxrt685s/cm33 DT.
This needed to be done because the hardware initialisation routines
(power, clocks, ...) are different from mimxrt685s/hifi4 to
mimxrt798s/hifi4. The same is expected for the /hifi1 domain.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
To follow with error-handling of multi-shot items, they won't be marked
as cancelled. Instead, we expect them to stop being submitted, hence we
dispose the handle upon finishing every shot.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
To follow with error-handling of multi-shot items, they won't be marked
as cancelled. Instead, we expect them to stop being submitted, hence we
dispose the handle upon finishing every shot.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Run-time errors can still be considered asserts if checkif is
configured as such, otherwise, prevent crashing.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Considering the app may have cancelled all the requests as an error
handling strategy, this driver needs to support recovering from such
case.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Whenever the data-ready callback is invoked, there's a common pattern
that needs to take place:
- Stop measurement timer (to stop on-coming samples), which could be
restored by the application re-submitting the request.
- Set iodev_sqe to NULL, so new requests can come in.
- Report the error on the SQE.
This has been refactored in handle_error_on_result() and now it's
invoked throughout the code.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The existing build-time asserts not only needs to cover dual-frequency
mode does no exceed high-speed settings, it needs to allow not using
dual-frequency mode settings at all, which is what this patch does.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
With few APs we have seen unexplained disconnections and sending
keepalive often solves the problem, so, to fix interoperability reduce
the keepalive period to 30s.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
This change enables GMAC_MULTIPLE_TX_PACKETS to allow multiple TX packets
to be pushed to the DMA engine, improving transmit performance. Previously,
older Zephyr versions (pre-v2.6.0) lacked thread-safe handling in net_pkt
and net_buf, making multiple TX enqueuing unreliable. Issue #32564
("net_buf reference count not protected") was fixed in v2.6.0, providing
proper thread safety. The changes have been tested on SAME54 Curiosity
Ultra with EVB-LAN8670-RMII and KSZ8061 PHY daughter card, and the
expected performance of 9.5Mbps at 10Mbps PHY link speed was observed.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Fix clock config logic of wm8962 and wm8904 drivers, so that both can be
properly configured for master (generating BCK and WS) and slave
(receiving those) operation.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Zephyr is swapping the definitions of RGB565 and BGR565. Swap the return
values provided by this driver for supported pixel formats to account
for this.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
This reverts the workaround made in the commit:
772fbfe9cc
as the proper fix has now been merged upstream.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Some systems (IE cores with bootloaders) may not disable the DW SPI
peripheral at boot time. Make sure the peripheral is disabled before we
try to configure it.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
The designware controller has an *interesting* implementation of the CS
signal- CS will be de-asserted whenever the TX FIFO is empty, so slower
cores may see CS de-assert prematurely if they cannot keep pace with
their SPI peripheral. To help reduce odds of de-assertion, implement the
following changes:
- don't write SER bit until directly before we enable interrupts, so
that transfers don't start early
- prefix the TX FIFO before writing SER, so the FIFO can drain a bit
before have to service an interrupt
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
The SSI DW peripheral supports an RX_SAMPLE_DLY register in some
instances- this register controls the number of clock cycles from the
default sample time before the RX input is actually sampled. This can be
used to improve reliability when operating the SSI at a higher clock
speed.
Add an implementation of the mspi_timing_cfg api, and header to define
the identifier so that users can configure this parameter
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Bitmask offsets for the MSPI_DW peripheral are incorrect for the
4.03a databook for the DW APB SSI. Add a "v2" compatible to handle these
changed offsets. The compatible does not define new binding properties,
just modifies the register offsets.
Additionally, handle writing the DFS32 mask for v2 of this compatible,
as newer IP supports a dataframe size up to 32 bits.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Multilevel interrupts require that the irq number be read with DT_IRQN,
so update the driver to use this macro.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
The remainder of this driver functions when pin control is disabled,
so make the include conditional as well to fully support this case.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Supply empty vendor specific macros for cases where vendor specific
functions are not needed by driver.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
The CRC32 table only needs to be generated once, so prevent it from
regenerating every time as it only required once.
Signed-off-by: Bas van Loon <bas@arch-embedded.com>
This enables applications to call timing configuration functions,
which enables more applications to work on native_sim.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Reorganize and update soc folder files for SDK-independance
Reorganize and update hal_bouffalolab files for SDK-independance
Reorganize and update soc dts files for SDK-independance
Update serial and pinctrl driver files for SDK-independance
Update ai_wb2_12f, bl604e_iot_dvk, and dt_bl10_dvk
to new bl60x support
and fixup openocd config of ai_wb2_12f
Signed-off-by: Camille BAUD <mail@massdriver.space>
Add check for supp->current being NULL before accessing num_params in
error log.
Prevent potential NULL pointer dereference and crash when invalid
parameter count
Improve error messages for better debugging in cases with no current
request or wrong param count.
Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Update the TX data API to support distinguishing if this packet is from
net stack or from internal packet forwarding case.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
XIP may indicate that the program is executed either in local memory
or flash. However, the SPI node is only used as a flash controller
when the program is executed in flash.
Therefore, optimize the related checks to ensure that when XIP is
enabled but the program is executed in local memory, the SPI node
can still be used.
Signed-off-by: Kevin Wang <kevinwang821020@google.com>
