Add compilation of sl_openthread library to silabs 15.4 radio
driver to enable RAIL operations for OpenThread.
Co-Authored-by: David Boullie <David.Boullie@silabs.com>
Co-Authored-by: Sree Sreerajatha <sree.sreerajatha@silabs.com>
Signed-off-by: David Boullie <David.Boullie@silabs.com>
Add the driver itself and Kconfig/CMakeLists/dts/bindings related to it.
Other files and libraries needed are in Silabs' dedicated folder
hal_silabs (modules/hal/silabs).
Co-Authored-by: David Boullie <David.Boullie@silabs.com>
Co-Authored-by: Sree Sreerajatha <sree.sreerajatha@silabs.com>
Signed-off-by: David Boullie <David.Boullie@silabs.com>
Set LEX10Q1-specific defaults for CMUX buffering and virtual-channel
flow control in Kconfig.cellular.
This modem exhibits the same CMUX behavior as LE910C1TX: it can hit
DLCI receive-buffer pressure during bursty traffic with the generic
defaults. Virtual-channel flow control support is limited, so a
conservative flow control threshold helps avoid buffer exhaustion
without relying on full MSC FC signaling.
Use modem-specific defaults when DT_HAS_TELIT_LEX10Q1_ENABLED is set:
MODEM_CMUX_WORK_BUFFER_SIZE_EXTRA defaults to 256
MODEM_CMUX_MSC_FC_THRESHOLD defaults to 0.
Signed-off-by: Luca Impagliazzo <Luca.Impagliazzo@telit.com>
This modem can hit DLCI receive-buffer pressure during bursty traffic
with the generic defaults. Virtual-channel flow control support is
limited, so a conservative flow control threshold helps avoid buffer
exhaustion without relying on full MSC FC signaling.
Use modem-specific defaults when DT_HAS_TELIT_LE910C1TX_ENABLED is set:
MODEM_CMUX_WORK_BUFFER_SIZE_EXTRA defaults to 256
MODEM_CMUX_MSC_FC_THRESHOLD defaults to 64.
Signed-off-by: Luca Impagliazzo <Luca.Impagliazzo@telit.com>
kernel.h implies kernel_structs.h via kernel_includes.h, making
explicit inclusion of kernel_structs.h unnecessary whenever kernel.h
is already included in the same translation unit.
Remove the redundant includes across arch, boards, drivers, kernel,
lib, samples, subsys, and tests trees.
in include/zephyr/kernel_structs.h:
* 2. kernel.h shall imply kernel_structs.h, such that it shall not be
* necessary to include kernel_structs.h explicitly when kernel.h is
* included.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
is_sg_enabled, sg_velocity_check_interval_ms and
sg_threshold_velocity should not be dts properties as they
are not actuallly hardware configurations.
dropping the check for is_sg_enabled in init routines, since
the configuration happens at runtime now.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
Implements the `get_info` API for `leds_group_multicolor`. This exposes
the `color-mapping` and `label` devicetree properties, if they are
provided.
Signed-off-by: Ole Johan Walderhaug <olejodd10@gmail.com>
replace BUILD_ASSERT for fifo-watermark with min/max in bindings
replace all enums with min/max with their corresponding ranges
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
use min/max for fifo-watermark in bosch,bmi08x-gyro.yaml
and bosch,bmi08x-accel.yaml
drop BUILD_ASSERT in bmi08x_gyro.c
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
VIDEO_CID_FOCUS_AUTO is a boolean control type, so its range
is max=1. The previous range of max=65535 was rejected
by check_range() with -ERANGE, causing initialization to fail
with "Unable to initialize controls" on AF-capable variants.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Fix compilation issues in the Arducam Mega video driver:
- Fix incompatible pointer type when calling arducam_mega_await_bus_idle()
by aligning const-correctness of struct arducam_mega_bus.
- Correct LOG_DBG format string mismatch in JPEG quality logging
(fix incorrect argument usage with %d).
- Address deprecated SPI DT macro usage by updating initialization
to avoid deprecated delay parameter warning.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Updates the SoC initialization to configure PSRAM IO GLB register such that
PSRAM GPIO registers (32-37) are reused for pins whose registers are
allocated for SF2 internal flash (23-28), and modifies the GPIO driver to
use those offset registers when configuring.
Signed-off-by: Dan Mangum <georgedanielmangum@gmail.com>
Co-authored-by: Camille BAUD <mail@massdriver.space>
cache_data_flush_all() was accidentally removed in e17bf15
but it is still used by the cache API and needs to be present.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Adds the missing config member that is common to all GPIO drivers
and that is expected to be the first element in the object pointed
to by the config field in the device structure.
Signed-off-by: Jesse Hörkkö <jesse.horkko@sasken.com>
Move the can_mcan.h header file out of the public include path. This file
should solely be used for implementing CAN driver frontends for Bosch
M_CAN-based CAN controller IPs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the can_sja1000.h header file out of the public include path. This
file should solely be used for implementing CAN driver frontends for
SJA1000-based CAN controller IPs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Replace the direct memcpy() in flash_nrf_read() and nrf_rram_read()
with an inline check against soc_secure_flash_range_is_secure().
Reads that overlap a "nordic,tz-secure" partition go through
soc_secure_mem_read(); all others stay a plain memcpy() /
nrf_nvmc_buffer_read().
For secure builds and for NS builds without a tz-secure DT node the
predicate folds to a constant false and the secure branch is dropped
by the optimiser, so this is a no-op for any layout that does not
opt in.
Signed-off-by: Dag Erik Gjørvad <dag.erik.gjorvad@nordicsemi.no>
Add support for full SMIF hardware initialization for the serial
memory flash driver when booting from internal RRAM.
On PSE84, the ROM extended boot only configures the SMIF subsystem
when the device boots from external flash. When the first application
(MCUboot or CM33 secure) runs from RRAM, the SMIF pins, clocks,
peripheral groups, and peripheral itself are left uninitialized.
Introduce CONFIG_FLASH_INFINEON_SMIF_HW_INIT to conditionally
perform these steps before mtb_serial_memory_setup() is called.
Extract the info as much as possible from DT. Some are still hardcoded
in the driver and will require additional polishing in a follow-up PR.
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
The qspi flash controller uses the Serial Memory Interface (SMIF) to
interact with an external memory. This is done through dedicated
data pins which reside in the SMIF HW block. These were not exposed
up until now in the Infineon devices because the extended boot takes
care of initializing the pins properly when booting from external flash.
However this might not always be the case so expose the pin info and
configuration. Additionally, correct the flash controller address to
match the SMIF CORE base address corresponding to the SMIF instance
in use.
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Add cellular_modem_pause_periodic_script() /
cellular_modem_resume_periodic_script() so a consumer can suppress
the periodic AT poll while holding the command channel for a
long-running operation (firmware update, eSIM, factory test). The
gate is at the timer-fire site, so an in-flight script is not
interrupted. Resume fires the script immediately if at least one
scheduled run was skipped while paused; otherwise it restarts the
periodic timer.
Pause and resume are single-owner: pausing while already paused and
resuming while not paused both return -EINVAL so misuse surfaces at
the call site instead of being swallowed.
Signed-off-by: Paulo Santos <paulo.santos-ext@hexagon.com>
Encode the SF32LB52x slew-rate pinctrl property into HPSYS_PINMUX.
The devicetree value 0 selects slow slew rate and 1 selects fast
slew rate, while the hardware bit uses 1 for slow and 0 for fast.
PA39-PA42 reuse the same bit as MODE instead of SR. Mask SR out for
those pads and drive MODE separately from the selected pinctrl
function, setting it only for I2C routing and clearing it otherwise.
Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
PA39-PA42 reuse bit 8 as MODE instead of slew rate. The GPIO
driver always set bit 8, which forced those pads into I2C mode
whenever they were configured as GPIOs.
Configure GPIO pads with read-modify-write, clear MODE on PA39-PA42
to select GPIO mode, and stop modifying bit 8 on other pads. Slew
rate is now left to pinctrl or hardware defaults instead of the GPIO
configuration path.
Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
Nuvoton USBD/HSUSBD peripherals support VBUS detect functionality, but
some PCB designs may choose to use mutually exclusive USB-C peripheral
for VBUS detection. In this case, the USB controller backed VBUS detect
functionality won't work and needs to be disabled.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
- Read write_block_size from devicetree (default 4 in binding) to
allow board-level override for finer write granularity.
- Add CONFIG_FLASH_MCUX_XSPI_WRITE_BUFFER (default n) to copy
write data to a RAM buffer before transfer, preventing faults
when source data resides in flash and padding transfer size to
4-byte boundary for the XSPI IP Tx limitation.
- When write buffer is disabled, reject non-4-byte-aligned offset
or length with -EINVAL.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
- Clamp write_size to remaining bytes in the current 256-byte page
to prevent page program address wrap, consistent with the FlexSPI
NOR drivers.
- Set write_block_size to 2 because OPI DTR mode requires all writes
to be 2-byte aligned and multiples of 2 bytes.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Honor regulator-init-microvolt and the boot-on / always-on
properties at init so on-chip LDOs come up before the kernel
runs.
Switch the binding from the custom espressif,ldo-channel
property to a standard reg + unit-address layout, and read the
channel via DT_REG_ADDR().
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The same 16-field shell_print format string was duplicated verbatim in
the single-target and all-devices branches of cmd_i3c_info. Extract it
into a shared static helper to eliminate the duplication.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Both CCC vendor commands open-coded the three-step dev+tdev+desc lookup
that i3c_parse_args() already provides. Switch to the helper.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Seven CCC command handlers declared and assigned a local `data` pointer
but never read it. Drop the dead declarations and assignments.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Replace two identical 9-entry DT_FOREACH_STATUS_OKAY blocks with a single
I3C_FOREACH_STATUS_OKAY(fn) wrapper macro so adding a new controller
compatible requires only one edit.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Corrected PSE84 autanalog DAC index calculation. The DAC index is
contiguous and starts from dac0 instance. The previous implementation
was depending on the DT_NODE_CHILD_IDX, which returns the position
among all autanalog siblings (CTB, PTC, DAC, SAR, PRB). Therefore
it was returning an incorrect DAC index.
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Fix an out of bounds array read, which causes the test to read
beyond the stack and fail (probably at random).
The issue can be pinpointed building with ASAN.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Updated bbram compatible in mec5 dtsi
Added macro required to port the bbram driver for MEC174x/5x.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
TMP108/AS6212 status alert bit masks are driver-internal. Move them from
the public header into tmp108.h.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Status register bit macros are driver-internal and only used in
ti_hdc302x.c. Remove them from the public header.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
