attr_set and trigger_set unconditionally place the device in standby
but returned directly on unsupported attribute/channel/trigger or
register errors, silently halting conversions (and leaving the GPIO
interrupt disabled). Restore MEASURE mode and re-enable the interrupt
on all error paths.
Failures during the restore are logged but do not override the
original error, so the root cause still reaches the caller.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
adxl355_submit_fetch() acquired the RTIO RX buffer and immediately
completed the SQE without any bus access, so sensor_read() returned
uninitialized memory. Read XDATA3..ZDATA1 into the buffer as a
struct adxl355_sample (raw register bytes as the decoder expects),
set the range, and size the buffer for a single sample.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
hci_tx_pkt is a file-scope variable, but psoc6_bless_send() clears and
populates it before taking psoc6_bless_operation_sem, so two senders
can overwrite each other's packet information, and the one holding the
semaphore can end up handing the controller a packet that describes the
other buffer.
Nothing else uses the variable, and it does not need to outlive the
call: Cy_BLE_SoftHciSendAppPkt() copies the packet into the
controller's buffer before returning, as documented in cy_ble_stack.h.
Make it a local variable, which removes the shared state instead of
locking it.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
A down-counter reloaded from LDCNT that interrupts at zero and does not
free-run, so a RELOAD backend. The counter the core reads is synthesized,
the reloads consumed so far plus what the one in flight has counted down,
and it is declared 28 bits wide like the hardware. That read touches
state the ISR and the reload path also write, so
TIMER_CORE_COUNTER_NONATOMIC has the core serialise the public getters.
The core takes over the tick accounting: last_announcement and the
announced-tick arithmetic go, along with sys_clock_set_timeout(),
sys_clock_elapsed() and sys_clock_cycle_get_32(). The driver is left with
folding the consumed reload into the synthesized count, in the ISR and
again when a new reload replaces one in flight.
Two oddities in the replaced code are worth recording. The ISR reloaded
RTMR_COUNTER_MAX * CYCLES_PER_TICK, a product that overflows 32 bits and
wraps to an arbitrary value, where the intent was simply to keep counting
until the next deadline; it now reloads the counter's maximum.
sys_clock_elapsed() took the absolute value of a difference that it
computed backwards, so an announce arriving between the two reads turned
into elapsed time counted forwards; the core computes it once, from the
counter.
sys_clock_cycle_get_32() now counts over the full 32-bit space, where the
driver's own masked it to the counter's 28 bits. The sleep compensation
masked the difference of two readings to match, which would truncate a
sleep past 0x0fffffff cycles, so that mask goes.
Stopping the timer moves to sys_clock_idle_enter(K_TICKS_FOREVER), where
the CPU is on its way to sleep and sys_clock_idle_exit() is guaranteed to
restart it. The magic tick value that used to request it could arrive
with the CPU still running.
Build-tested on rts5912_evb, tickless and tickful, with and without
CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
A free-running counter and a compare register that matches on equality, so
a value written after the counter has passed it is missed for a whole
counter period: a COMPARE_EXACT backend. The core writes the comparator
through its verify loop, which is what the driver's MIN_DELAY floor existed
for, and the counter's own width is declared so the core masks deltas at
the real wrap rather than at a register boundary.
The core takes over the tick accounting. announced_cycles, counter_delta()
and the round-up-to-the-next-tick arithmetic go with it, along with
sys_clock_set_timeout(), sys_clock_elapsed() and the driver's own
CYCLES_PER_TICK. The ISR is left with the flag clear and the announce.
The counter is now free-running in both modes. It used to reset on match
for a ticked kernel, which an absolute compare cannot express, and that
also retired the private cycles accumulator the tickful cycle counter was
built from: the counter itself now carries that, and the core emits
sys_clock_cycle_get_32().
sys_clock_no_timeout() takes over the sloppy-idle case that keyed off a
magic tick value. It masks the wakeup and leaves the counter running, so
the cycle getters keep working. Under a ticked kernel it does nothing: the
interrupt it would mask is the periodic tick.
Build-tested on frdm_mcxw71, tickless and tickful, with and without
CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The underlying RTC hardware used by Infineon only supports a 2 digit
year. The PDL hardcoded an assumption that the current century is
2000, and this assumption was propagated into the Zephyr driver.
Removing the 20xx-century restriction by updating the minimum valid
year to be tm-compliant (19xx) and performing day-of-week calculations
using the correct century.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
Offload VWIRE callback execution from `espi_vw_idx2_isr` to a dedicated
background thread. This commit introduces an 8-slot ring buffer to
capture VWIRE events inside the ISR, significantly reducing the ISR
execution time and ensuring all back-to-back packets are reliably
processed.
Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
The existing buffer check includes a full pitch after every row,
including padding after the final row. It therefore rejects valid
strided buffers that contain only the pixels reachable from their
starting address.
Compute the required size from the offsets of the last row and its
requested width. This allows callers to pass a view into a larger
framebuffer without requiring inaccessible trailing padding.
Assisted-by: Codex:gpt-5.6-sol
Signed-off-by: Yu He <auhy@mail.scut.edu.cn>
When pitch is larger than width, the driver sends each row in a
separate MIPI DBI transfer. Pitch is the distance between row starts
and must only be used to advance the source pointer.
Using pitch as the transfer size includes pixels outside the requested
row from the second row onward and corrupts the display. Size each
transfer from the requested width instead.
Assisted-by: Codex:gpt-5.6-sol
Signed-off-by: Yu He <auhy@mail.scut.edu.cn>
The esp32p4 fsls phy pads are shared with usb-serial-jtag
through an lp_sys mux that defaults to the usj. Hand the pads
to the otg-fs controller when the phy is enabled and return
them to usb-serial-jtag in the disable quirk. The usj console
and flashing keep working until the device stack is enabled
and are restored at runtime once the stack is disabled,
without a chip reset.
Assisted-by: Claude:opus-4-8
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This changes include:
- Streamline data structures by embedding espi_taf_pckt directly into
driver data, eliminating manual field copies and indirection.
- Optimize completion handler to write directly to FLASHTXBUF register.
- Implement defensive RX/TX bounds validation to guard against buffer
overflows.
- Add safety fallback for unsupported eSPI cycle type.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
The nrf54l has high speed pad ctrl (slew rate) of the fast GPIO port
(P2), configurable through registers sharing the address space of the
GPIO port.
Extend the nordic,nrf-gpio devicetree binding with a property
indicating if hspadctrl is available for a port, and add an optional
property for setting the optional HSBIAS value of the GPIOHSPADCTRL
BIAS register. The datasheet recommends always setting HSBIAS to its
highest value (3), which will now be set by the nrf gpio device
driver on init, unless the user specifies otherwise in the
devicetree.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add page-size to the JEDEC MSPI NOR property allow list and honor
it in FLASH_PAGE_SIZE_INST(): when the property is present, it
overrides the SFDP-derived or default page size.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add an MSPI controller driver for Microchip MEC174x/5x/MEC165x
based on the QMSPI controller.
The driver uses the QMSPI local-DMA (LDMA) channels for the data path
when CONFIG_MSPI_MCHP_XEC_QMSPI_LDMA is enabled and the request
specifies a DMA-mode transfer; otherwise it uses the PIO FIFO. Note
the LDMA engine is internal to the QMSPI block and is independent of
the central DMA controller.
Both synchronous and asynchronous transfers are supported in PIO and
DMA modes. The driver operates in controller mode and supports
half-duplex transfers only; full-duplex is not implemented.
Initial PM_DEVICE support is added using the PM subsystem calls during
driver init, as recommended by the Zephyr PM_DEVICE documentation.
The driver supports the QMSPI hardware chip enables only; GPIO chip
enables are not supported. A controller configuration that specifies
GPIO CEs (num_ce_gpios != 0) is rejected with -ENOTSUP.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add macros that treat the QMSPI Mode register's three clock bits (idle
state, transmit phase, sample phase) as a single SPI-mode field to
simplify driver code.
The Control and Descriptor registers' TX and RX DMA-enable fields use
the same value encoding, so share one direction-agnostic set of value
macros (DMA_DIS; LDMA_CH0..2 for local-DMA channels; DMAC_U1B/U2B/U4B
for central-DMA access size) while keeping separate TX/RX get/set
macros. This also corrects the 4-byte TX value, which was 4 (out of
range for the 2-bit field) and is now 3, matching RX.
Update the existing spi_xec_qmspi_ldma.c consumer to the new LDMA_CH0
names; identical field values, so no functional change.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The driver programmed its devicetree-assigned RX/TX DMA channels with
dma_config() without ever reserving them in the DMA controller's
allocation bitmap. A dma_request_channel(dev, NULL) caller on the same
controller (for example a memory-to-memory transfer) could therefore be
handed a channel already owned by SPI, corrupting both transfers.
Reserve each channel at init through dma_request_channel() with a
BIT(channel) filter. This forces exactly the devicetree channel, marks it
allocated in the shared bitmap so it can no longer be handed out, and
fails init if the channel is already in use.
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
The async driver reserved its devicetree-assigned RX/TX DMA channels by
poking the DMA controller's dma_context atomic bitmap directly with
atomic_set_bit(). That bypassed the public DMA API, never detected a
channel that was already in use, and dereferenced dma_rx/dma_tx.dma_dev
unconditionally: when only one direction is wired to DMA the other
dma_dev is NULL, so the reservation crashed on a NULL pointer.
Reserve each channel through dma_request_channel() with a BIT(channel)
filter instead. This forces exactly the devicetree channel, registers it
in the same allocation bitmap that dma_request_channel(dev, NULL) callers
(such as memory-to-memory transfers) consult, and returns an error when
the channel is already taken. Each direction is now guarded by its own
NULL check, fixing the single-direction crash.
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
Remove the seven "nxp,"-prefixed properties of the nxp,kinetis-acmp
binding, deprecated in Zephyr 4.0 in favour of the un-prefixed
enable-pin-out, use-unfiltered-output, enable-high-speed-mode,
filter-enable-sample, filter-count, filter-period and enable-window-mode
properties declared in the same binding.
The MCUX_ACMP_DT_INST_PROP()/_OR() compatibility shims in the sensor-class
driver existed only to fall back to the old names, so they collapse to
plain DT_INST_PROP()/DT_INST_PROP_OR() at the instance definition. The
comparator-class driver already used the new names only.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-5
This commit enables power management support for the MAX32 timer counter
driver. It allows the driver to enter low-power states when the counter
is not in use, improving energy efficiency.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
Make the `send_oob` function atomic to prevent race conditions and
data conflicts with concurrent IO read operations.
Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
Valid slave selects are 0 to SPI_CHIP_SELECT_COUNT - 1, but the guard
used '>', letting slave 4 through to
Cy_SCB_SPI_SetActiveSlaveSelect(). Use '>=' and reword the error
message to match.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Since frame-timeout-supported DT property if of boolean type, use of
dt_compat_any_has_prop() without an explicit value argument of True
makes that function to always return true. Set function argument
value to True to get the expected behavior.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Since supports-2bit, supports-4bit and supports-dtr-4bit DT properties
are of boolean type, use of dt_compat_any_has_prop() without an
explicit value argument of True makes that function to always return
true. Set function argument value to True to get the expected behavior.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
The scan and status handlers had no case for the WPA/WPA2 and
WPA2/WPA3 transition authmodes, so mixed-mode access points were
reported as UNKNOWN. Feeding such a result back into a connect
request was then rejected. Map both to WPA_AUTO_PERSONAL, which
is how other Wi-Fi drivers group these modes, and map the DPP
authmode to its own security type.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
parse_freq() only rejected a frequency when strtoul() returned exactly
ULONG_MAX, which does not detect overflow reliably and, on 64-bit hosts
such as native_sim/native/64, lets any value above UINT32_MAX through to
be silently truncated by the cast to uint32_t. 0x100000000 was accepted
and configured the modem at 0 Hz.
Check errno for ERANGE and reject anything that does not fit in the
uint32_t the API takes.
Signed-off-by: Ben Shalem <benshalem93@gmail.com>
enum lora_signal_bandwidth and enum lora_datarate were renumbered to
carry their kHz and spreading factor values directly, but the shell was
not updated:
- bw_table was indexed by the enum value, so a table intended to hold 3
entries became a sparse 501 entry array (~2 kB of rodata) whose values
are identical to their index.
- Only 125, 250 and 500 kHz could be selected, leaving 12 of the 15
bandwidths supported by the API unreachable.
- The spreading factor was limited to SF6..SF12, leaving SF5 unreachable.
Drop the table, print the bandwidth directly, validate the requested
value against the enum and widen the spreading factor range.
Signed-off-by: Ben Shalem <benshalem93@gmail.com>
Add support for enabling the volatile SR write.
It gives more flexibility how to deal with the flash chip.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Add support for the Fitipower EK79007 1024x600 MIPI-DSI panel.
The driver performs the vendor initialization sequence over DCS,
attaches to the host in video mode, and drives the reset and
backlight pins. Pixels are streamed by the display controller the
panel is wired to, so the driver reports the panel geometry and
handles blanking only.
Assisted-by: Claude:opus-4-8
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The init routine enables the high/low limit events, but those only set
the comparator enable in PCNT_Un_CONF0_REG: the event stays masked out
of PCNT_INT_ST_REG until PCNT_INT_ENA_REG is set. The ISR never ran, so
the software accumulator extending the 16-bit counter never advanced and
the reported count silently wrapped. The pending-wrap compensation in
the read path was inert too, as it reads the masked status.
Arm the interrupt for every unit after the ISR is allocated, as
ESP-IDF's pcnt_unit_alloc() does when count accumulation is requested.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
When Argus_EvaluateData() failed, handle_error_on_result() already
completed the RTIO submission with an error, but the handler fell
through and completed the same submission again with rtio_iodev_sqe_ok(),
double-completing a released SQE. Return right after the error is
handled, matching the other error paths.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The SENSOR_CHAN_DISTANCE decode path never assigned
readings[0].timestamp_delta, so consumers computing per-sample
timestamps read uninitialized bytes from the caller's buffer. Zero it,
matching the SENSOR_CHAN_AFBR_S50_PIXELS branch.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The gyroscope full scale list uses 0 as padding for the gaps in the
ISDS_gyroFullScale_t encoding, so a requested scale of 0 dps matched a
reserved entry and programmed an invalid register code, silently zeroing
all further gyro readings. Reject a zero full scale with -EINVAL.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
SENSOR_CHAN_AMBIENT_TEMP shared a case block with SENSOR_CHAN_ALL that
required both the accelerometer and the gyroscope to be enabled, so
fetching the die temperature returned -ENOTSUP whenever either ODR was
set to the power-down entry. Give the temperature channel its own case
that derives the poll step from whichever engine is enabled.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The SENSOR_ATTR_FULL_SCALE getter for SENSOR_CHAN_GYRO_XYZ returned the
raw dps value from the full scale list, while the setter converts its
input with sensor_rad_to_degrees(), so a get-then-set round trip failed
with -EINVAL. Convert the reported range to rad/s to match the setter.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The SENSOR_ATTR_FULL_SCALE getter for the accelerometer returned the
raw range from the full scale list, which is expressed in g, while the
setter expects m/s^2 as mandated by the sensor API. Convert the value
with sensor_g_to_ms2() so the getter is the exact inverse of the
setter.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Fix the Byte order when receiving a R2 response from the SDcard.
It will give the correct Device Size depending on the CSD structure.
For standard capacity SDSC memory cards, CSD struct if Version 1.0.
For high capacity SDHC and SDXC memory cards, CSD struct is Version 2.0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
z_vrfy_charger_get_prop() declared an uninitialized union
charger_propval on the kernel stack, passed it to the backend and then
copied it back to the caller unconditionally, ignoring the return code.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>
hwtimer_enable(period) sets the next tick interrupt at now + period, so
it is a reload register and this is a RELOAD backend. The cycle counter
is nsi_hws_get_time(), microseconds since boot, so arming is a plain
forward of what the core computes.
Tickful keeps the period semantics: the driver arms once at init and the
model raises every subsequent tick on its own, which is what the core
expects of a RELOAD driver there. Tickless re-anchors on every announce.
last_tick_time, the ISR elapsed computation, sys_clock_set_timeout(),
sys_clock_elapsed() and both cycle getters move into the core. The ISR is
left with the announce.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
ccs811_baseline_fetch() tested the i2c_write_read_dt() result with
"rc <= 0", which is also true on failure, so a failed transfer returned
the uninitialised stack value of baseline instead of the negative errno
the API documents. Test for success with "rc == 0".
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Fix for RTIO streaming. This solves the problem when ADC is
configured for streaming, but adc_stream is not called. If any
interrupt accrues, it will cause an exception because is_streaming is
set in config but sqe in driver data is not.
Signed-off-by: Vladislav Pejic <vladislav.pejic@orioninc.com>
Remove my email address from copyright notices across
board, fuel-gauge, networking, sample, and test files
Signed-off-by: Philipp Steiner <philipp.steiner1987@gmail.com>
adt7420_trigger_set() unconditionally disabled both the INT and CT GPIO
interrupts but only re-enabled the line matching trig->chan, silently
killing a previously registered trigger on the other pin. Each disable
now happens in its own branch, guarded by that pin's presence, and the
trigger type is validated before any GPIO is touched.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Remove CONFIG_NOCACHE_MEMORY conditional code and associated nocache
memory allocation/deallocation logic from uhc_mcux_ehci driver.
The setup packet and transfer buffers are now handled by the common
UHC layer with proper cache alignment, making driver-specific nocache
memory management unnecessary.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Change setup_pkt to be usb requested address and size aligned,
This allows the setup packet buffer to be cache line size aligned.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
The FlexSPI controller configuration (LUT, per-device FLSHCR/DLLCR)
is lost when the controller power domain is powered down. On
PM_DEVICE_ACTION_TURN_ON, reset the memc per-port LUT bookkeeping so
the probe re-allocates LUT slots from zero, then re-run the flash
probe to rebuild the device configuration and LUT from the chip.
Re-running the controller init or wiping the whole LUT is not
possible while the CPU executes XIP from the NOR, so the restore
relies on the ROM FCB controller-level state and replaces (not
clears) the LUT entries the driver owns.
Add memc_flexspi_reset_lut_alloc() to reset the per-port LUT
bookkeeping after a power-domain power-down.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Attributes flagged MAX30009_ATTR_PLL_OFF cycle the PLL, and the
re-enable path polls the clear-on-read STATUS1 register. Running that
poll while streaming or triggers are active eats pending A_FULL /
FIFO_DATA_RDY events (permanently stalling an assert-once FIFO
watermark stream) or lets those readers consume the lock bits, causing
spurious -ETIMEDOUT. Return -EBUSY instead when a stream request is
pending or a trigger handler is registered.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
The streamed FIFO sample period was computed from the const devicetree
ADC OSR code, so runtime SENSOR_ATTR_MAX30009_ADC_OSR changes were
ignored and decoded per-sample timestamps were wrong. Cache the OSR
code in driver data, update it on attribute writes, and use it when
computing the sample period.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
