Wake-up feature should be available even if user selects only
POWEROFF function. PM and PM_DEVICE are related to IDLE and
also possibly with calling PM_STATE_SOFT_OFF, so it is kept
as check/guard for the wake-up function as well.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
The I2C driver clears the TC and TCR interrupt flags not in the ISR, but
in thread context later on. If there is an interrupt on another I2C
peripheral (but sharing the same interrupt vector) after the first I2C
peripheral processed a TC or TCR interrupt, but before it cleared the
corresponding status flag in thread context, this interrupt will be
processed twice, leading to corrupted transfers.
Added a check to only process the TC and TCR interrupts if they are
enabled for the corresponding peripheral (indicated by the TCIE bit in
the CR1 register).
Fixeszephyrproject-rtos/zephyr#109993
Signed-off-by: Oliver Schmidhauser <oliver.schmidhauser@leica-geosystems.com>
LDO soft start fix will not be available in the next revision of the device
but is instead pushed to a later one. The check is invalid, therefore needs
to be reverted.
This reverts commit da56fe6ee0.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Replace manual pointer transfer with net_buf_take() for better
readability and atomic operation.
Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
When enabling RX with a timeout of 0 in the mcux lpuart driver, the
driver silently skipped starting the async work timer, making partial
DMA transmissions fail. This commit handles the scenario by
immediatelly flushing the RX data, if any.
Make it so the async timer for TX is skipped if timeout is 0, disabling
TX timeout.
Signed-off-by: Guilherme Costa <guilhermecosta@stratioautomotive.com>
Compiling the mcux lpuart driver with format string validation led to a
runtime warning about pointer types. This commit fixes the issue by
casting the offending parameter to void * as recommended.
Signed-off-by: Guilherme Costa <guilhermecosta@stratioautomotive.com>
Update all drivers to use "flags" instead of "sense" when accessing
interrupt properties from device tree. This aligns with the updated
interrupt controller bindings that now consistently use "flags" as
the cell name for the IRQ type field.
Signed-off-by: Amneesh Singh <amneesh@ti.com>
- Manually trigger TX IRQ when the buffer is empty to work around the
hardware limitation where the IRQ is not automatically generated.
Signed-off-by: Steven Chang <steven@ene.com.tw>
Add driver for NXP MCUX Segment LCD (SLCD) controller to support
segment-style auxiliary displays.
The driver provides a unified implementation that handles both
the SLCD controller (nxp,slcd) and a generic SLCD panel.
It supports the generic SLCD panel with common header and binding
which includes the following panel features:
- Segment types(7, 14, 16 segments)
- Configurable front plane pins and back plane COMs
- pin/COM for each segment
- Optional pin/COM for each indicator
- Optional colon/dot indicators
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add new API to the auxiliary display subsystem to support display
custom indicator management, for segmet LCD panels
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add a driver for the Generic Quad SPI hardware that is part of the
Xilinx MPSoC. This is mostly commonly used with QSPI flash devices which
are also used for initial image loading, but can also be used with other
SPI devices.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Fix a format string build error on platforms where uint32_t types
do not match standard unsigned format specifiers.
Fix this by using the PRIu32 format macro for both frame_size and
vbuf->size, ensuring type safety across all target architectures.
Signed-off-by: Surya Prakash T <suryat@aerlync.com>
- Add JEDEC case for Macronix MX25U6432F to skip SFDP auto-parsing.
- Forces 24-bit addressing to prevent breaking active XIP loops.
Signed-off-by: Deepika R <deepika@aerlync.com>
Use RCR.ALL to enable reception of all multicast frames. MAR[7] is set
to 0x80 for broadcast only. This follows Zephyr driver convention
where a simple multicast-enable flag is preferred.
Signed-off-by: Ching Ping Sun <tom_sun@davicom.com.tw>
Add TDM DMA driver for AMD Audio Co-Processor 7.0. This includes:
- DMA driver (dma_acp_tdm.c) with support for memory-to-device and
device-to-memory transfers using ACP DMA engine
- Device tree bindings and node for ACP TDM DMA controller
- Kconfig and CMake build integration
Signed-off-by: Siva Subramanian Ravi Saravanan <sravisar@amd.com>
Co-authored-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
Add TDM DAI driver and ACP 7.0 register
definitions for AMD Audio Co-Processor. This includes:
- TDM DAI driver (tdm_dai.c) with support for I2S format
- ACP 7.0 chip register definitions and offset mappings
- Device tree bindings and nodes for TDM DAI instances
- Kconfig and CMake build integration
Signed-off-by: Siva Subramanian Ravi Saravanan <sravisar@amd.com>
Co-authored-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
Make sure that dcache operations complete before returning from cache
management functions to avoid potential race conditions. Also, ensure
that dcache operations are not interrupted by locking interrupts.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
This adds optional clock control support to the i2c_dw driver. The
support currently assumes that the clock control binding uses clkid for
the clock cell name.
Signed-off-by: Łukasz Kędziora <lkedziora@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>
Add the possibility to configure the interrupt gpio in one of the
two possiblities:
- GPIO_INT_EDGE_TO_ACTIVE
- GPIO_INT_LEVEL_ACTIVE
Default is GPIO_INT_EDGE_TO_ACTIVE, which matches with old fixed
configuration.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add support for using RTI hardware as system timer:
- Add headers, driver code, Kconfig, and bindings for TI RTI Timer
- Make changes in CMakeLists.txt and Kconfig to support ti_rti_timer
- Add documentation and usage instructions in bindings file.
NOTE: Each RTI has 2 Counter blocks, 4 Counter Compare blocks.
This driver assumes that Counter block 0, Compare block 0 of
chosen RTI instance are used as RTI Timer.
Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
Fix devicetree coding style regarding whitespaces through the tree.
This affects code snippets inside documentation, comments, error messages
as to encourage a style that passes CI. Follow-up of #101619
Signed-off-by: Josuah Demangeon <me@josuah.net>
The TI DAC43608 has 8 bit resolution, the DAC53608 has 10 bit
resolution. According to the datasheet from Texax Instruments,
the MSB of DACn_DATA must be left aligned.
This fix aligns the data correctly, allowing the DAC value to
be set to 100% and not only 25% max for the DAC43608.
Signed-off-by: Stephan Gatzka <stephan.gatzka@gmail.com>
The MAC_CONFIGURATION register was unconditionally OR'ed with the FES
(speed) and DM (duplex) bits, forcing 100 Mbps full-duplex during MAC
initialization. The PHY link callback later updates these bits to match
the actual link state, but on 10BASE-T1S (PLCA) links the temporary
100 Mbps/full-duplex setting causes the MAC to ignore the COL signal
from the internal TENBASET_PHY block. As a result the MAC transmits
during another node's transmit opportunity, producing collisions and
lost data.
Initialize MAC_CONFIGURATION with FES and DM cleared (10 Mbps,
half-duplex, which is also the register's reset value) and let the PHY
callback set the correct speed/duplex once the link is up. Read-modify-
write is done via a local variable so both the set and clear masks are
applied in a single register write.
Fixes#109682
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
the option MPU_ALLOW_FLASH_WRITE is only needed
when ARM_MPU. Only files in include/zephyr/arch/arm/mpu/
and include/zephyr/arch/arm64/cortex_r use it. it is not used in
xtensa or riscv.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Update drivers/interrupt_controller/intc_clic.c to use BIT_MASK(2)
rather than BIT_MASK(3) in "riscv_clic_irq_priority_set". The .trg
attribute of the CLICINTATTR that is initialized in this function is
2 bits while the current mask is 3 bits. To ensure only 2 bits are
used, we need to correct the mask.
Signed-off-by: Omar Naffaa <onaffaa@qti.qualcomm.com>
Others socs series also have a DIEROK flag to check.
The stm32_lptim_timer has been modificated accordingly
Signed-off-by: Romain Jayles <romain.jayles@st.com>
Provide the necessary changes for the ST HCI SPI Bluetooth driver
to support X-NUCLEO-WBA25A1 shield.
Update ST BLE shields' overlays with the new properties.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Added support for autanalog PRB for PSE84.
This implementation uses the shared autonomous controller (AC) MFD
with the other autanalog drivers.
The PRB is a programmable reference block inside the autonomous
(aut) analog subsystem. It is controlled using the autonomous
controller (AC), which is a programmable state machine. The AC is
shared across all autonomous analog peripherals including the
SAR, PRB, PTComp, CTB, and CTDAC.
The PRB contains two variable voltage references derived from
either VDDA(1.8V) or VGBR(0.9V). These need to be configured
together and accessed using the AC. A PRB MFD is used to bring
together the two voltage reference configurations. AC MFD then
references the combined PRB MFD configuration, and brings together
all other autanalog peripherals into a single AC setup for the
application.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Remove the driver-local struct ring_buffer in favour of sys_ringq.
Pointers are stored directly in the ring queues, which removes the need
for the POINTER_TO_UINT casts and fixes a potential platform-specific
pointer truncation issue on 64-bit architectures.
gmac_desc_list rings are unchanged as they require
in-place DMA descriptor access.
closes: #21155
Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
Updated pse84 autanalog sar to support muxed inputs.
This implementation uses the autonomous controller (MFD).
The autonomous controller (AC) a programmable state machine. The AC
is shared across all autonomous analog peripherals including the
SAR, PRB, PTComp, CTB, and CTDAC.
The device supports 8 direct GPIO inputs and 16 muxed inputs.
The muxed inputs can be sourced from pins or from interal signals
from other autanalog blocks. Muxed inputs can be chosen by assigning
channels 8 and above. Only 2 muxed channels are allowed per sequencer
when operating in high-speed mode. 1 muxed channel is permitted per
sequencer when operating in low power mode.
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Add sleep retention support for die temp driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for LEDC PWM driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for WDT driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for counter driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for UART driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for GSPI driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add sleep retention support for GDMA driver. When peripheral
power down is enabled for light sleep, register data is lost,
so REGDMA backup is needed to mantein peripheral operational.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add I2C bus support to the BMI323 sensor driver. The BMI323
supports I2C communication with a dummy byte offset protocol
where 2 dummy bytes precede actual data in read operations.
Changes:
- Add bmi323_i2c.c/.h with I2C read/write and chip ID validation
- Add BMI323_BUS_I2C Kconfig option
- Update BMI323_DEVICE_BUS macro to handle I2C bus type
- Add bosch,bmi323-i2c.yaml device tree binding
The I2C implementation handles the dummy byte offset required
by the BMI323 when reading registers over I2C.
Signed-off-by: Sudarshan Iyengar <sudarshan.iyengar@alifsemi.com>
Add Real-Time I/O (RTIO) asynchronous sensor API support to the
BMI323 driver. This enables non-blocking sensor reads with
kernel-managed buffering.
Features added:
- RTIO submit and decode operations for accel, gyro, and temp channels
- Q31 fixed-point format encoding for consistent sensor data scaling
- Unified sample fetch implementation shared between sync and async paths
- Decoder API with timestamped frame headers
The driver now supports both blocking (sensor_sample_fetch) and
non-blocking (sensor_read) operation modes when CONFIG_SENSOR_ASYNC_API
is enabled.
Signed-off-by: Sudarshan Iyengar <sudarshan.iyengar@alifsemi.com>
Assisted-by: GPTCodex:GPT-5.4
Add Real-Time I/O (RTIO) support to the BME680 sensor driver to enable
asynchronous sensor operations. This implementation follows the pattern
established by other Bosch sensor drivers in Zephyr.
Changes include:
- Add bme680_async.c implementing the sensor async API submit function
using RTIO lock free queues asynchronous read operations
- Add bme680_decoder.c implementing the sensor decoder API for
Q31-format data conversion of temperature, pressure, humidity, and
gas resistance channels
- Add RTIO encoded data structures (bme680_encoded_data, bme680_reading)
to bme680.h with proper bit-packed flags for channel presence
- Update CMakeLists.txt to conditionally build async sources when
CONFIG_SENSOR_ASYNC_API is enabled
The driver supports fetching temperature, pressure, humidity, and gas
resistance channels via the RTIO interface.
Signed-off-by: Sudarshan Iyengar <sudarshan.iyengar@alifsemi.com>
Assisted-by: Claude:claude-opus-4.6
The LL function is named differently on STM32C5 because the hardware is
different: the `RMVF` bit must be cleared by software, whereas hardware
clears it automatically on all other series.
Rework the implementation to be functional, and rename the function to
match intent while at it. Also, switch to a series-specific #if guard
since this is hardware-specific rather than related to HAL1/HAL2.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
