This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.
The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling an eSPI channel (r.g. Peripheral Channel, Virtual Wire Channel,
etc.) during an eSPI transaction might (with low probability) cause the
eSPI_SIF module to transition to a wrong state and therefore response
with FATAL_ERROR on an incoming transaction.
This CL workarounds this issue by clearing the bit 4 of NPCX eSPI
specific register#2.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
A missing semicolon caused compiler errors when more than one emulated
gpio device was defined in the device tree.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Refactors invalid switch into if statement.
Fixes orientation set return value for normal
display orientation.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Make sure cxcprs isn't zero, or we will have
divide-by-zero on calculating actual_freq.
Test:
1.tests/drivers/pwm/pwm_api pattern
2.GPA0(pwm0) output 79201Hz, 324Hz, 100Hz, 1Hz waveform
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add support for enabling/disabling CAN-FD frame transmission/reception at
run-time.
Fixes: #45303
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the can_mode enum to a bit field to prepare for future extensions
(CAN-FD mode, transmitter delay compensation, one-shot mode, 3-samples
mode, ...).
Rename the existing modes:
- CAN_NORMAL_MODE -> CAN_MODE_NORMAL
- CAN_SILENT_MODE -> CAN_MODE_LISTENONLY
- CAN_LOOPBACK_MODE -> CAN_MODE_LOOPBACK
These mode names align with the Linux naming for CAN control modes.
The old CAN_SILENT_LOOPBACK_MODE can be set with the bitmask
(CAN_MODE_LISTENONLY | CAN_MODE_LOOPBACK).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the CAN data phase API functions to timing_data_* for consistency:
- can_get_timing_min_data() -> can_get_timing_data_min()
- can_get_timing_max_data() -> can_get_timing_data_max()
- .timing_min_data -> timing_data_min
- .timing_max_data -> timing_data_max
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Improve the power domain logging by making the log level configurable
and boosting the log level of the messages printed when the domain turns
on and off.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adding support for the GIC_V1 to the dc_dw USB driver
to be used by Cyclone V SoC FPGA Development Kit
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Similarly to what was done on U5 and H7 clock_control drivers, enable
device clock source selection.
This is done by:
-providing implementation for clock_control_configure().
-updating clock_control_get_rate() to support various possible clock
sources (SYSCLK, PLLCLK, LSE, LSI, HSI, HSE).
-providing enable_clock() to verify requested clock source exists and
is enabled.
-adding LSI and LSE device tree based initialization to
set_up_fixed_clock_sources().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename and factorize clock source bindings accessors by moving them
in common header file stm32_clock_control and remove them from
include/dt-bindings/clock/stm32XY_clock.h files
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Fixes#41650
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
e8e88dea incorrectly changed registers
used in `sys_clock_cycle_get(32|64)` functions.
This commit fixes that.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Adds a communications backend based on the asynchronous UART API,
instead of the interrupt-driven UART API. The primary advantage of this
backend is an improved robustness to dropping bytes under high interrupt
or critical section loads.
Under all loads system efficiency is improved by:
* Reducing the time spent writing out individual bytes.
* Reducing the number of UART interrupts fired.
* Waking up the RX thread much less often.
When utilising this backend over `nordic,nrf-uarte` on a nRF52840, the
baudrate of an esp-at modem could be pushed to at least 921600 without
dropping bytes, compared to a maximum of 230400 with the interrupt API.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add a choice symbol that is used to select which UART backend to use.
This allows backends that don't use the interrupt API to be implemented.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the proper `%p` printf specifier when printing memory addresses,
instead of casting to an integer, which may not be the same size as a
pointer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.
This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SOCs, such as the RT1064 and RT1024, use internal flash and don't
define pinmux settings for the flexspi. Don't check the return code of
pinctrl_apply_state, because the flexspi driver will fail to initialize
when the pin mux settings are simply not required.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SD response type masks, to allow drivers to mask out the
SPI or SD native mode response type based on the SD host controller
mode they use.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use the UPLLCK clock for the CAN controller as recommended by the Atmel SAM
E70 data sheet.
Move the configuration of the clock prescaler from Kconfig to devicetree
and limit it to the values recommended by the SAM E70 datasheet.
Fixes: #45012
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is a follow-up to commit fd7633126e.
For some reason the above commit added several switch cases without
required break statements. In effect, the same pin could get assigned
to multiple signal lines in QDEC or QSPI peripherals if not all pins
were defined for them in devicetree, and consequently these peripherals
could not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Allow CTS line to determine UART shutdown for any sleep mode.
This allows lower average current consumption for LITE
HIBERNATE mode.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Added chosen syntax in Device Tree to abstract the IPC device that is
used with the IPC service module in the Bluetooth HCI RPMsg driver.
Ported affected boards to declare this alias.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
