drivers: pinctrl: update lpc pinctrl driver for lpc11u6x
Update pin control driver for lpc11u6x. This SOC does not have a HAL, so fsl_clock is not available. It also lacks a slew-rate field in the IOCON register, so this property must be optional. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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dc4d168952
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4 changed files with 84 additions and 5 deletions
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@ -2,12 +2,14 @@
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# SPDX-License-Identifier: Apache-2.0
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DT_COMPAT_NXP_LPC_PINCTRL := nxp,lpc-iocon-pinctrl
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DT_COMPAT_NXP_LPC_11U6X_PINCTRL := nxp,lpc11u6x-pinctrl
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DT_COMPAT_NXP_RT_PINCTRL := nxp,rt-iocon-pinctrl
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config PINCTRL_NXP_IOCON
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bool "IOCON Pin controller driver for NXP LPC MCUs"
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depends on SOC_FAMILY_LPC || SOC_SERIES_IMX_RT6XX || SOC_SERIES_IMX_RT5XX
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default $(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_PINCTRL)) || \
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$(dt_compat_enabled,$(DT_COMPAT_NXP_RT_PINCTRL))
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$(dt_compat_enabled,$(DT_COMPAT_NXP_RT_PINCTRL)) || \
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$(dt_compat_enabled,$(DT_COMPAT_NXP_LPC_11U6X_PINCTRL))
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help
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Enable pin controller driver for NXP LPC MCUs
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@ -5,7 +5,9 @@
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*/
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#include <zephyr/drivers/pinctrl.h>
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#if !defined(CONFIG_SOC_SERIES_LPC11U6X)
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#include <fsl_clock.h>
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#endif
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#define OFFSET(mux) (((mux) & 0xFFF00000) >> 20)
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#define TYPE(mux) (((mux) & 0xC0000) >> 18)
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@ -37,7 +39,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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break;
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default:
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/* Should not occur */
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assert(TYPE(pin_mux <= IOCON_TYPE_A));
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__ASSERT_NO_MSG(TYPE(pin_mux) <= IOCON_TYPE_A);
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}
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/* Set pinmux */
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*(iocon + offset) = pin_mux;
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@ -45,8 +47,8 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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return 0;
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}
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#ifdef CONFIG_SOC_FAMILY_LPC
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/* LPC family needs iocon clock to be enabled */
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#if defined(CONFIG_SOC_FAMILY_LPC) && !defined(CONFIG_SOC_SERIES_LPC11U6X)
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/* LPC family (except 11u6x) needs iocon clock to be enabled */
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static int pinctrl_clock_init(const struct device *dev)
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{
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@ -58,4 +60,4 @@ static int pinctrl_clock_init(const struct device *dev)
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SYS_INIT(pinctrl_clock_init, PRE_KERNEL_1, 0);
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#endif /* CONFIG_SOC_FAMILY_LPC */
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#endif /* CONFIG_SOC_FAMILY_LPC && !CONFIG_SOC_SERIES_LPC11U6X */
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@ -40,6 +40,14 @@ description: |
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bias-pull-down: IOCON_MODE=1
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drive-push-pull: IOCON_MODE=3
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Note: for the LPC11u6x, the following fields are also supported:
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IOCON_HYS- set by input-schmitt-enable
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IOCON_S_MODE- set by nxp,digital-filter
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IOCON_CLKDIV- set by nxp,filter-clock-div
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IOCON_FILTR- set by nxp,analog-filter
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compatible: "nxp,lpc-iocon-pinctrl"
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include:
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@ -52,6 +60,7 @@ include:
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- bias-pull-up
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- bias-pull-down
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- drive-push-pull
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- input-schmitt-enable
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child-binding:
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description: LPC IOCON pin controller pin group
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66
dts/bindings/pinctrl/nxp,lpc11u6x-pinctrl.yaml
Normal file
66
dts/bindings/pinctrl/nxp,lpc11u6x-pinctrl.yaml
Normal file
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@ -0,0 +1,66 @@
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# Copyright 2022 NXP
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# SPDX-License-Identifier: Apache-2.0
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compatible: "nxp,lpc11u6x-pinctrl"
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include:
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- name: base.yaml
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- name: nxp,lpc-iocon-pinctrl.yaml
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child-binding:
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child-binding:
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property-allowlist:
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- pinmux
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- nxp,invert
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- nxp,analog-mode
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- nxp,i2c-mode
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- nxp,i2c-filter
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- name: pincfg-node-group.yaml
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child-binding:
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child-binding:
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property-allowlist:
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- drive-open-drain
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- bias-pull-up
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- bias-pull-down
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- drive-push-pull
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- input-schmitt-enable
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child-binding:
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description: LPC IOCON pin controller pin group
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child-binding:
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description: |
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LPC IOCON pin controller pin configuration node
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properties:
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nxp,digital-filter:
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type: int
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default: 0
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enum:
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- 0
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- 1
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- 2
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- 3
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description: |
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Enable digital filter. Set number of clock cycles to use as rejection
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threshold for input pulses. 0 disables the filter. Only valid for
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lpc11u6x SOC. Filter defaults to disabled, as this is default reset
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value for SOC
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nxp,filter-clock-div:
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type: int
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default: 0
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enum:
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- 0
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- 1
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- 2
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- 3
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- 4
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- 5
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- 6
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description: |
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set peripheral clock divider for input filter sampling clock
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IOCONCLKDIV. Only valid for lpc11u6x SOC. Default to 0, as this
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is the default reset value for the SOC.
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nxp,disable-analog-filter:
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type: boolean
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description: |
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Disable fixed 10 ns input glitch analog filter. Only valid for lpc11u6x
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SOC, on analog pins. Note that this filter is enabled on reset, hence
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the choice to make disabling the filter opt-in
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