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drivers: adc: update adc driver to integrate stm32u3

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add u3 config_soc conditions in adc driver to handle
news peripherals.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
This commit is contained in:
Khaoula Bidani 2025-06-03 09:49:33 +02:00 • committed by Dan Kalowsky
commit f568b0d68a
1 changed files with 8 additions and 2 deletions
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10
drivers/adc/adc_stm32.c
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@ -26,6 +26,7 @@
#include <stm32_ll_adc.h>
#include <stm32_ll_system.h>
#if defined(CONFIG_SOC_SERIES_STM32N6X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
#include <stm32_ll_pwr.h>
#endif /* CONFIG_SOC_SERIES_STM32U5X */
@ -202,6 +203,7 @@ static void adc_stm32_enable_dma_support(ADC_TypeDef *adc)
LL_ADC_REG_SetDMATransfer(adc, LL_ADC_REG_DMA_TRANSFER_UNLIMITED);
#elif defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32N6X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
/* H72x ADC3 and U5 ADC4 are different from the rest, but this call works also for them,
* so no need to call their specific function
@ -899,6 +901,7 @@ static int set_sequencer(const struct device *dev)
if (config->sequencer_type == FULLY_CONFIGURABLE) {
#if defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32N6X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
/*
* Each channel in the sequence must be previously enabled in PCSEL.
@ -1503,7 +1506,7 @@ static void adc_stm32_enable_analog_supply(void)
{
#if defined(CONFIG_SOC_SERIES_STM32N6X)
LL_PWR_EnableVddADC();
#elif defined(CONFIG_SOC_SERIES_STM32U5X)
#elif defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32U3X)
LL_PWR_EnableVDDA();
#endif /* CONFIG_SOC_SERIES_STM32U5X */
}
@ -1513,7 +1516,7 @@ static void adc_stm32_disable_analog_supply(void)
{
#if defined(CONFIG_SOC_SERIES_STM32N6X)
LL_PWR_DisableVddADC();
#elif defined(CONFIG_SOC_SERIES_STM32U5X)
#elif defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32U3X)
LL_PWR_DisableVDDA();
#endif /* CONFIG_SOC_SERIES_STM32U5X */
}
@ -1580,6 +1583,7 @@ static int adc_stm32_init(const struct device *dev)
defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32H7RSX) || \
defined(CONFIG_SOC_SERIES_STM32N6X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
/*
* L4, WB, G4, H5, H7 and U5 series STM32 needs to be awaken from deep sleep
@ -1610,6 +1614,7 @@ static int adc_stm32_init(const struct device *dev)
}
}
#elif defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X) || \
defined(CONFIG_SOC_SERIES_STM32WBAX)
while (LL_ADC_IsActiveFlag_LDORDY(adc) == 0) {
@ -1662,6 +1667,7 @@ static int adc_stm32_suspend_setup(const struct device *dev)
defined(CONFIG_SOC_SERIES_STM32H7X) || \
defined(CONFIG_SOC_SERIES_STM32H7RSX) || \
defined(CONFIG_SOC_SERIES_STM32N6X) || \
defined(CONFIG_SOC_SERIES_STM32U3X) || \
defined(CONFIG_SOC_SERIES_STM32U5X)
/*
* L4, WB, G4, H5, H7 and U5 series STM32 needs to be put into