spi_nxp_lpspi: Clarify configuration function

Clarify at the top of the common lpspi file what is the purpose of the
file to be clear to future developers that this file is not supposed to
make any assumption about a particular implementation of the zephyr API
using the LPSPI, because I imagine it could be very likely that more
lpspi implementation will be done in the future to make different
tradeoffs than the current two. Also the current two are different
enough that we should avoid making assumptions even if they currently
hold for both because they might not always, as things change.

We should disable interrupt events while configuring the LPSPI
regardless of implementation. The specific implementation should enable
the interrupts it needs on its own transceive implementation.

Also clarify and simplify some code in the configure function. Namely,
we no longer need to check if we are already configured to write to
registers because a recent commit made it so that we clock the
peripheral from the zephyr driver init instead of upon the MasterInit
call on the SDK. There is also a redundant CR write which I have removed.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2025-05-19 14:11:00 -05:00 committed by Anas Nashif
commit aeedf86da6

View file

@ -4,6 +4,13 @@
* SPDX-License-Identifier: Apache-2.0
*/
/*
* This is a collection of functions that would be useful for any driver for LPSPI.
* This function/file has no knowledge of lpspi usage model by the driver
* beyond basic configuration and should avoid making any assumptions about how
* the driver is going to achieve the zephyr API.
*/
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(spi_lpspi, CONFIG_SPI_LOG_LEVEL);
@ -131,23 +138,20 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf
return ret;
}
if (already_configured) {
/* Setting the baud rate in LPSPI_MasterInit requires module to be disabled. Only
* disable if already configured, otherwise the clock is not enabled and the
* CR register cannot be written.
*/
LPSPI_Enable(base, false);
while ((base->CR & LPSPI_CR_MEN_MASK) != 0U) {
/* Wait until LPSPI is disabled. Datasheet:
* After writing 0, MEN (Module Enable) remains set until the LPSPI has
* completed the current transfer and is idle.
*/
}
/* specific driver implementation should set up watermarks and interrupts.
* we reset them here to avoid any unexpected events during configuring.
*/
base->FCR = 0;
base->IER = 0;
/* this is workaround for ERR050456 */
base->CR |= LPSPI_CR_RST_MASK;
base->CR |= LPSPI_CR_RRF_MASK | LPSPI_CR_RTF_MASK;
base->CR = 0x00U;
/* this is workaround for ERR050456 */
base->CR |= LPSPI_CR_RST_MASK;
base->CR |= LPSPI_CR_RRF_MASK | LPSPI_CR_RTF_MASK;
/* Setting the baud rate requires module to be disabled. */
base->CR = 0;
while ((base->CR & LPSPI_CR_MEN_MASK) != 0) {
/* According to datasheet, should wait for this MEN bit to clear once idle */
}
data->ctx.config = spi_cfg;