Commit graph

1291 commits

Author SHA1 Message Date
Gerard Marull-Paretas
c66f594c41 drivers: all: rv32m1: remove conditional support for pinctrl
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Gerard Marull-Paretas
989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Mahesh Mahadevan
eebd665150 drivers: spi: Fix DMA overflow in NXP MCUX driver
When using a dummy buffer on the RX side, do not
increment the destination memory buffer address.
This issue was uncovered when running the SPI
loopback test.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-04-20 09:07:37 -05:00
Brandon Del Bel
93930eac90 drivers: spi: sam0: fix DMA init for parts with MCLK peripheral
The spi-sam0 driver does not initialize DMA parameters when the MCLK
peripheral is defined in the microcontroller header file. Fix it by
copying the initialization code from the non-MCLK case.

Signed-off-by: Brandon Del Bel <delbel@umn.edu>
2023-04-20 10:48:21 +02:00
Ben Lauret
9cdc5d38b2 drivers: spi: Add driver for smartbond
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.

Co-authored-by: Stan Geitel <stan@geitel.nl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-04-20 10:32:40 +02:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Scott Worley
5c00a83b99 drivers: spi: Microchip XEC QMSPI-LDMA fix spi buffer usage
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2023-04-11 16:57:56 +02:00
TOKITA Hiroshi
d4feadc329 drivers: spi: pl022: Add support DMA transfer
Add supporting DMA-based transfer for PL022 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-04-07 13:20:16 +02:00
HaiLong Yang
3d5de8920b drivers: spi: gd32 fix a transceive error
There have an extral TBE interrupt event though we have cleared the
SPI_CTL1_TBEIE bit. To cover this situation, add a on_going check
before enter exchange function.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2023-04-05 20:44:54 +00:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Tom Burdick
2a5de5fc30 spi: Remove extranous logging message for SAM
Mistakenly left a log message in with the RTIO work, remove.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-04-03 21:53:17 +00:00
Tom Burdick
dcd9322d43 spi: SAM add RTIO support
Implements the SPI RTIO API. Refactors many of the internal transfer
functions to work on simple types to allow for both the RTIO and existing
SPI API functions to co-exist.

Removes the unneeded shift_master specialization. Either a polling or DMA
transfer flow is used when used with RTIO as all operations are normalized.

When SPI_RTIO is enabled the spi_transceive blocking call translates
the request into an RTIO transaction placed in the queue of transactions
the device is meant to do.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-04-03 09:51:02 +02:00
Tom Burdick
d9d24b4d65 spi: Add RTIO support to SPI
Provides a macro and submit API for SPI drivers to support RTIO.

A copy function enables compatibility with the existing blocking API
and very easily the existing async API as well.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-04-03 09:51:02 +02:00
Lucas Tamborrino
b100ffb1df drivers: spi: esp32xx: Fix word size issue
This commit fixes the word size configuration issue
described in #54746 by considering the data frame size
when trasmitting in case the configuration is applied.

It also fixes an heap corruption problem when using
SPI DMA with a buffer that is not multiple of 32 bits
in lenght and GDMA instance in initialization.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-04-02 22:07:55 -04:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Gerard Marull-Paretas
92d6df6620 dts: arm: nordic: introduce easydma-maxcnt-bits
The number of available EasyDMA MAXCNT bits is now defined per-instance
in Devicetree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-03-24 10:31:32 +01:00
Gerson Fernando Budke
4f59d50441 drivers: spi: sam: Update to use clock control
This update Atmel SAM spi driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Ramesh Babu B
3d44508c38 drivers: spi: Add Intel SPI penwell driver
Added support for intel pch penwell spi driver.

Signed-off-by: Ramesh Babu B <ramesh.babu.b@intel.com>
2023-03-21 13:39:33 +01:00
Pieter De Gendt
11574c0a6b drivers: spi: sam: Fix DMA build
A MACRO argument naming mismatch causes a bug when trying to use DMA.

Fix the MACRO argument and conditional DMA configuration.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-03-15 08:48:52 -04:00
Yuval Peress
517a977e84 spi: initialize spi_sam spin locks
Uninitialized sam spinlocks were causing an error if the stack
happens to have 'thread_cpu' memory set to something other than 0.

Signed-off-by: Yuval Peress <peress@google.com>
2023-03-15 09:11:53 +01:00
Andriy Gelman
6c3998d494 drivers: spi: spi_esp32_spim: Remove check for NULL before freeing
As per k_free() documentation it accepts a NULL argument.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-03-13 14:03:35 +01:00
Andriy Gelman
1eff8e76bd drivers: spi: spi_esp32_spim: Fix potential tx_temp leak
If rx_temp allocation fails then tx_temp needs to freed.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-03-13 14:03:35 +01:00
Lucas Tamborrino
7f4dadee3a drivers: spi: esp32xx: add support for dedicated CS
Currently the driver only support software controlled CS
defined by cs-gpios property.
This commit enables the possibility of using dedicated CS
by setting the pins on pinctrl and omitting the cs-gpios
property.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-13 14:02:06 +01:00
Lucas Tamborrino
1adec07f01 drivers: spi: esp32xx: refactor SPI DMA preprocessor identifiers
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.

Remove hardcoded values from hal calls to use dma_host instead.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-13 14:02:06 +01:00
Andriy Gelman
33d1792e3d drivers: spi: Add xmc4xxx driver
Adds spi driver for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-03-03 17:20:17 +01:00
Gerard Marull-Paretas
27b73a116f soc: arm: nordic_nrf: replace NRF_DT_CHECK_PIN_ASSIGNMENTS
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
55ac2f91f6 drivers: spi: nrfx_spi/s/m: drop -pin support
SPI/S/M drivers will only use pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
f436aeb12c drivers: spi: xec_qmspi: remove unused pinmux.h include
Driver did not use pinmux API.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-23 16:56:04 -05:00
Tom Burdick
86af9bcce1 spi: SAM add spin lock around all tx/rx/txrx funcs
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-02-08 01:08:59 +09:00
Andrzej Głąbek
8eba36dd56 drivers: spi_nrfx_spi[m]: Handle transaction timeouts properly
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-02-03 10:34:27 -08:00
Andrzej Głąbek
37665b5e95 drivers: spi_context: Refactor spi_context_wait_for_completion()
Refactor the code of this function to make it a bit easier to read.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-27 01:22:15 +09:00
Andrzej Głąbek
f36c15e2e3 drivers: spi_context: Use total transfer length in timeout calculation
When estimating the time that a given SPI transfer will take, whole
buffer sets for TX and RX need to be taken into account, not only their
first parts. Correct `spi_context_wait_for_completion()` accordingly.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-27 01:22:15 +09:00
Rami Saad
1d8681965c drivers: spi: fix 16 bit spi dma transfers for the STM32 driver
Calculate the correct dma segment length for STM32 16 bit spi dma transfers
Fixes zephyrproject-rtos#52563

Signed-off-by: Rami Saad <rami.saad@morgansolar.com>
2023-01-20 16:11:48 +01:00
Pawel Czarnecki
04ec6d72e7 dts: spi: silabs: make peripheral-id property optional
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2023-01-17 15:37:27 -06:00
Pawel Czarnecki
06245f3653 drivers: spi: gecko: add support for CPOL and CPHA
This commit adds support for CPOL/CPHA configuration in the Gecko SPI
driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2023-01-17 15:37:27 -06:00
Pawel Czarnecki
f1d3011ae1 drivers: spi: gecko: add support for pinctrl configuration
This commit adds support for pinctrl configuration in the Gecko SPI
driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2023-01-17 15:37:27 -06:00
YuLong Yao
2a013216eb drivers: gd32_spi: drop APB marco
drop APB marco because clock_control driver is added.

Signed-off-by: YuLong Yao <feilongphone@gmail.com>
2023-01-12 21:45:38 +01:00
TOKITA Hiroshi
e55cbb8ce6 drivers: spi: gd32: Add support DMA transfer
Add supporting DMA-based transfer for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-01-11 08:50:56 -08:00
Fabio Baltieri
afd766d2b3 drivers: xec_qmspi: add missing default y to SPI_XEC_QMSPI_FULL_DUPLEX
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-11 09:11:03 -06:00
Erwan Gouriou
66d4c64966 all: Fix "#if IS_ENABLED(CONFIG_FOO)" occurrences
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-12-21 10:09:23 +01:00
Pawel Czarnecki
e8d3673c13 soc: arm: silabs: remove soc_gpio_configure wrapper
It would be better to use GPIO_PinModeSet() functions directly
in the drivers.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-12-20 22:50:19 +01:00
Duong Vu Nam
b24f4625f0 arch: support nocache for Cortex-R52
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.

Enable nocache in each driver use it.

Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
2022-12-12 10:39:31 +01:00
Lucas Tamborrino
b196edf55d drivers: spi: esp32xx: Fix buffer length for DMA
Fixes #52588

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-12-07 10:13:38 +00:00
Jonas Otto
d3415e2ce1 drivers: spi_mcux_lpspi: fix baudrate change when switching devices
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.

Fixes #51177

Signed-off-by: Jonas Otto <jonas@jonasotto.com>
2022-11-30 11:28:22 +01:00
Gaël PORTAY
ffed8388e7 drivers: spi_context: fix some LOG_DBG warnings
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
2022-11-29 22:52:40 -08:00
Dat Nguyen Duy
6d866b62bf drivers: spi: introduce SPI driver for NXP S32
This introduces SPI driver for NXP S32 platform

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-24 09:37:24 +01:00
Benedikt Schmidt
5fc743e5f9 drivers: spi: fix return value of spi_transceive for STM32 slaves
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes #52216

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-11-16 11:19:43 +01:00
Tom Burdick
74b9699213 spi: SAM support SPI transfers with DMA
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.

This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.

Adds the loopback binding option to enable the spi_loopback test.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-08 09:37:59 +00:00
Jay Vasanth
37874f8f67 drivers: spi: fix formatting in mec172x ldma driver
fix leading white space and use tabs instead of space
in mec172x spi ldma driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Jay Vasanth
0976343513 drivers: SPI: MEC172x QMSPI clock fix
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00