Commit graph

1291 commits

Author SHA1 Message Date
Martin Kiepfer
bda6656eca bugfix: esp32: spi: correct idle polarity and mode configuration
Possible fix for incorrection spi mode configuration
on esp32 (#61866)

Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
2023-08-29 10:25:45 +02:00
Nick Ward
2d65acca3a drivers: gpio: use gpio_is_ready_dt helper function
Update `struct gpio_dt_spec` use with gpio_is_ready_dt()

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2023-08-28 08:48:35 -05:00
Mateusz Sierszulski
2b74109f20 drivers: spi: Add Ambiq SPI driver
This commits adds SPI master driver for Apollo4 SoCs.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-08-25 10:31:58 +02:00
Daniel Gaston Ochoa
818aa2d0c7 drivers: stm32: SPI: SPI nocache buffers can be in CONFIG_NOCACHE_MEMORY
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the stm32 SPI driver
nocache check. Also, don't check NULL buffers as the SPI
interface states that such buffers will result in sending
zeroes.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-08-24 15:35:50 +02:00
Fabio Baltieri
dce9f06265 drivers: spi: spi_test: use the subsystem common init priority
Use CONFIG_SPI_INIT_PRIORITY like all other SPI drivers for initializing
the test driver.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-08-24 15:35:37 +02:00
Andrzej Głąbek
45dcc6c5db drivers: spi_nrfx_spis: Enable required SPI_SLAVE option in Kconfig
This is a follow-up to commit fa609e5844.

This driver implements SPI slave operations only and cannot be used
without the corresponding Kconfig option enabled.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-17 11:02:24 +02:00
Manuel Arguelles
35ad5358a4 spi: nxp_s32: use spi_cs_is_gpio() in config initializer
Following #56576, the `cs` field in `struct spi_config` is of type
`struct spi_cs_control` instead of a pointer to the same type.
This PR updated the driver to use `spi_cs_is_gpio()` helper to
check if SPI CS is controlled using a GPIO.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-14 18:11:04 +00:00
Daniel Leung
80cd39faed spi: pl022: remove shadow variables
Removes the shadow variable found by -Wshadow. The value of this
variable is the same throughout the for loop, so there is no
need to assign it again for each iteration.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Adam Wojasinski
9de69aabfd drivers: spi: spi_nrfx_spi: Add CPOL handling on SCK pin
Pin state after SPI deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. When the SPI instance
is disabled GPIO takes control over SCK and drives it to state set
by pinctrl driver. This might causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).

To address this issue, a patch was introduced to the SPI driver.
Now, when a SPI instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-08-09 18:31:28 +00:00
Adam Wojasinski
315dd0f41c drivers: spi: spi_nrfx_spim: Add CPOL handling on SCK pin
Pin state after SPIM deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. With the introduction
of the power-optimized SPIM driver, it disables the peripheral instance
once the transfer is completed.
As a result, the GPIO takes control over the SCK pin and drives it
based on pinctrl configuration which causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).

To address this issue, a patch was introduced to the SPIM driver.
Now, when a SPIM instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-08-09 18:31:28 +00:00
cyliang tw
5148c98e83 drivers: spi: support for Nuvoton numaker series
Add Nuvoton numaker series spi controller, including
full and half duplex support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-08-09 08:24:38 +00:00
Sylvio Alves
e544bdb5e2 drivers: spi: esp32: fix SOC_ESP32 reference
ESP32 SoC refactoring added new SOC_SERIES definition,
which was missed by #60183. This fixes it.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-08-03 18:14:33 +00:00
Sylvio Alves
d7bcac091c drivers: spi: esp32: add option to handle lines state
SPI driver is current working for common SPI devices.
However, addressable LED like WS2812 requires MOSI line to be
default LOW during initialization. This PR adds such option.
This has no effect on common SPI operation.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-08-03 12:15:18 -04:00
Andrzej Głąbek
7974ff2665 drivers: spi_nrfx_*: Add support for optional WAKE line
Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-01 11:07:21 +02:00
Andrzej Głąbek
f132f55e32 drivers: spi_nrfx_spis: Refactor prepare_for_transfer()
Refactor the function to make the execution flow in transceive()
clearer. In particular, return error codes directly, not through
spi_context_complete() which is unnecessary in this case.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-01 11:07:21 +02:00
Manuel Arguelles
cd78028e15 drivers: spi: mcux_lpspi: allow to configure data pins
Add binding properties to allow configuring the direction of data pins
SDI and SDO.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-01 09:51:16 +02:00
Daniel Gaston Ochoa
1b3e2d98e4 drivers: stm32: SPI: Check that SPI buffers are in a nocache region
DMA only works with non-cached memory regions in H7. Check them
and return an error if they don't match this condition.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-07-28 17:47:57 +02:00
Andrzej Głąbek
927dda06fa drivers: spi_nrfx_spis: Fix obtaining dev pointer in event handler
This is a follow-up to commit 4c20403629.

CONTAINER_OF() cannot be used to obtain the device pointer from its
data pointer as this data is not contained in the device structure.
Instead, use a dedicated member in the device data structure to store
the device pointer.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-26 09:52:24 +02:00
Marek Matej
6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Andrzej Głąbek
fa609e5844 drivers: spi: nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Mulin Chao
f34fff91bc driver: flash: npcx: introduce npcx flash driver
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-07-20 16:22:47 +02:00
Mike J. Chen
04f488accf drivers: spi: mcux_flexcomm: fix DMA bug for 2-byte transfers
The MCUX DMA controller only supports a single data_size
for a DMA transfer, not separate ones for source and
dest. An older version of the DMA driver used
dest_data_size as the DMA transfer size, but the
current one uses MIN(dest/source) as the trasnfer
size, which breaks case when SPI wants to do 2-byte
transfers.

Signed-off-by: Mike J. Chen <mjchen@google.com>
2023-07-19 10:36:23 -05:00
Dipak Shetty
022b234356 drivers: spi: eliminate dead code in spi_mcux_lpspi
The `spi_mcux_transceive` had 2 return calls when the
`CONFIG_SPI_MCUX_LPSPI_DMA` flag was active. The first return would be
called and the later was unreachable. With the fix, now the return calls
are mutually exclusive. Also, the `transceive` call is not compiled with
the `CONFIG_SPI_MCUX_LPSPI_DMA` flag is active.
Fixes #59533

Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
2023-07-18 16:21:26 +02:00
Tristan Honscheid
8fd1ce7579 emul: Only add enabled DT nodes to bus emulators
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.

Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-07-12 09:25:18 +02:00
Mike J. Chen
2a4acb2c42 drivers: spi: mcux_flexcomm: fix chip select bug w/ dma transfers
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59575

The dma version of the version of the driver can
invoke multiple intermediate dma transfers, like
when the spi_buf_set count is greater than one.
However, there is a bug where chip select is not kept
asserted for all intermediate dma transfers required
to process the entire spi_buf_set.

Signed-off-by: Mike J. Chen <mjchen@google.com>
2023-07-11 08:05:59 -05:00
Benedikt Schmidt
39391b4a16 drivers: spi: replace timeout for STM32 DMA slave mode
Replace the timeout for a SPI transceive in slave mode for STM32 DMA
operations with a K_FOREVER. Being an SPI slave means we do not
know when the transaction will start, hence it does not make sense
to have a timeout in such a case.
This will resolve issue #60000.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-07-10 15:13:19 +02:00
Tristan Honscheid
81310769a9 emul: spi: SPI_EMUL_INIT(n) hard-coded to instance #0
The `SPI_EMUL_INIT(n)` macro used to instantiate SPI bus emulators
builds an array of SPI devices attached to the bus, but always checks
instance #0 of the bus and not `n`. This makes multiple instances of an
emulated SPI bus unusable and popualtes them all with bus 0's devices.

Change the `0` to `n`, which matches how the I2C bus emulator does it.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-07-07 09:17:12 +02:00
Daniel Leung
26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Guillaume Gautier
c73c7d5728 drivers: spi: stm32h7: add a small delay after enabling
Add a small delay after enabling SPI to prevent transfer stalling.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-06-05 10:48:59 -04:00
Siyuan Cheng
d2e91c6b8f drivers: spi: fix spi_dw interrupt mask
Found EMSDP board SPI-FLASH sample broke after adding DFSS
into spi_dw. Found wrong interrput mask resulting in false
interrupt enabled. Now fixed it to fit both DFSS and DW.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-05-30 10:49:47 -04:00
Qipeng Zha
bc3ea1bb99 drivers: spi: add SPI device statistics
Enable below statistics for SPI by follow Zephyr STATS subsystem,
    rx_bytes, tx_bytes, transfer_error.

and add SPI_DEVICE_DT_DEFINE helper macro to define SPI device.

Signed-off-by: Xiaolu Sun <xiaolu.sun@intel.com>
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
2023-05-23 22:15:25 -04:00
Siyuan Cheng
cbdd2f38da drivers: spi: add Data Fusion Subsystem SPI driver
Introduce DesignWare ARC Data Fusion IP Subsystem(DFSS) SPI
driver for ARC boards, i.e. EMSDP, which uses DW SPI to controll
SPI-Flash and DFSS SPI to connect external devices. Both drivers
share most source code, but DFSS uses ARC auxiliary registers.
Move FIFO depth setting to device tree.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-05-22 15:25:19 +02:00
Johann Fischer
fdb631c5d7 drivers: spi_nrfx_spim: bring back get_nrf_spim_frequency
Commit 246393e830
("drivers: spi: spi_nrfx_spim: Remove nrf_frequency_t handling")'
introduced two changes, one of them is removing the function
get_nrf_spim_frequency with a strange justification.
This change  breaks support for peripherals written in a common way,
where the maximum frequency is set to the maximum supported
by the peripheral, not the controller, see shields for example.

On the occasion of bringing it back, the original function was
refactored to be easier to read and understand.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-05-17 16:21:52 +02:00
Shawn Nematbakhsh
5002ea4c42 drivers: spi: Add OpenTitan SPI driver
Add driver for OpenTitan SPI host.

Tested and verified single SPI full duplex on opentitan_earlgrey in
Verilator.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2023-05-10 16:48:46 +09:00
Tom Burdick
e4b10328b4 rtio: Use mpsc for submission and completion queue
Rather than the rings, which weren't shared between userspace and kernel
space in Zephyr like they are in Linux with io_uring, use atomic mpsc
queues for submission and completion queues.

Most importantly this removes a potential head of line blocker in the
submission queue as the sqe would be held until a task is completed.

As additional bonuses this avoids some additional locks and restrictions
about what can be submitted and where. It also removes the need for
two executors as all chains/transactions are done concurrently.

Lastly this opens up the possibility for a common pool of sqe's to
allocate from potentially saving lots of memory.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-05-10 00:39:43 +09:00
Dean Sellers
308cec45b0 drivers: spi: esp32xx: Add chip select setup and hold time
Added device tree bindings and implementaion for setting the
spi controllers chip select setup and hold time settings.

Signed-off-by: Dean Sellers <dsellers@evos.com.au>
2023-05-09 14:31:15 +02:00
Eivind Jølsgard
704e15d7f3 drivers: spi: nrfx: add multithreading Kconfig dependency
The nrfx SPI driver depends on semaphores, which require multithreading
support to be enabled.

Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
2023-05-08 16:18:20 +02:00
Cyril Fougeray
1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Dean Sellers
47f4218ea5 drivers: spi: esp32xx: Fix word size limiting transaction
Word size setting limited any SPI transaction to the frame
size. In addition to making the SPI inefficient this
broke drivers that set the word size. It appears that most
drivers use a one byte (8) size for this setting.
This change respects what I think is the intended use of
the word size setting. That is to set the length of
each element in a tx/rx buffer struct.

Signed-off-by: Dean Sellers <dsellers@evos.com.au>
2023-05-05 16:17:44 +02:00
Adam Wojasinski
246393e830 drivers: spi: spi_nrfx_spim: Remove nrf_frequency_t handling
With new nrfx release SPIM driver stores frequency as a `uint32_t`
type representing frequency in `Hz` in its configuration structure.
Additionally `NRFX_SPIM_PIN_NOT_USED` has been removed,
`NRF_SPIM_PIN_NOT_CONNECTED` symbol is used instead.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Andriy Gelman
760d1588e8 drivers: spi: xmc4xxx: Fix comp with interrupt enabled and dma disabled
When dma is enabled, spi_xmc4xxx_transcieve_dma() needs to disable the
isr used by spi_xmc4xxx_transceive(). Renable the isr at the
end of spi_xmc4xxx_transceive_dma() instead of in spi_xmc4xxx_transceive().
Doing this in latter function will fail compilation when interrupt
support is enabled but dma is disabled.

This is regression from 8494b6413a
but was only caught when xmc47_relax_kit was added which tested this
scenario in tests/drivers/spi/spi_loopback.

Fixes #57494

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-05-03 14:23:32 +09:00
Tom Burdick
f923bf8662 spi: sam: Fix gpio chip select usage
When using gpio chip select the clock line seems to get stuck low after
some transactions. When attempting to use other SPI_CSR registers
the peripheral fails to work as expected.

Always using SPI_CSR[0] when using gpio chip selects resolves the issue.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-04-29 12:24:07 +02:00
Daniel Gaston Ochoa
9eed160a06 drivers: stm32: SPI: cannot send several buffers if frame size is 16 bits
First `spi_context_buffers_setup` must use a `dfs` of 1 or 2 depending on
the frame size.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-04-28 10:05:30 +02:00
Daniel Gaston Ochoa
3003777810 drivers: stm32: SPI: cannot send several buffers if frame size is 16 bits
spi_context_get_next_buf must not divide `len` by `dfs` because, in SPI,
buffer lengths are given in units of data (in this case, 16 bits), not in
bytes.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-04-28 10:05:30 +02:00
Tristan Honscheid
7803a3a5c5 xec: spi: Remove .cs = NULL in spi_config initializer
Following #56576, the `cs` field in `struct spi_config` is of type
`struct spi_cs_control` instead of a pointer to the same type.
`spi_xec_qmspi_ldma.c:qmspi_xec_init` tries assigning `NULL` to the
`.cs` field through a designated initializer, which causes a compilation
error.

This PR simply removes the `.cs = NULL` line. The designated initializer
will automatically zeroize the underlying GPIO pin info, which should
have the same effect that setting the pointer to NULL did previously.

Signed-off-by: Tristan Honscheid <honscheid@google.com>
2023-04-26 12:58:21 +02:00
Andriy Gelman
0695c089b5 drivers: spi: spi_xmc4xxx: Use spi_xmc4xxx_flush_rx() and minor cleanups
Re-use spi_xmc4xxx_flush_rx(), remove extra \n and align function
arguments.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-04-25 12:23:26 +02:00
Andriy Gelman
8494b6413a drivers: spi: xmc4xxx: Add DMA support
Adds DMA support for synchronous SPI transfers.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-04-25 12:23:26 +02:00
Gerard Marull-Paretas
1e0028ae3d drivers: spi: add spi_cs_is_gpio(_dt) helpers
Add spi_cs_is_gpio(_dt) helpers to check whether SPI CS is controlled by
GPIO or not. This both improves code readability and isolates SPI
internals.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 21:29:55 +02:00
Gerard Marull-Paretas
3f2c2d4130 drivers: spi: make SPI dt-spec macros compatible with C++
As of today it is not possible to use SPI dt-spec macros in C++,
something known and documented. The main reason is because `cs` property
is initialized using a compound literal, something not supported in C++.
This PR takes another approach, that is to not make `cs` a pointer but a
struct member. This way, we can perform a regular initialization, at the
cost of using extra memory for unused delay/pin/flags if `cs` is not
used.

Fixes #56572

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 21:29:55 +02:00
Mahesh Mahadevan
2612e85753 drivers: spi_mcux: Add DMA support when using ASYNC mode
Enable DMA support when using ASYNCH mode

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-04-24 13:34:29 +02:00