Uninitialized sam spinlocks were causing an error if the stack
happens to have 'thread_cpu' memory set to something other than 0.
Signed-off-by: Yuval Peress <peress@google.com>
Currently the driver only support software controlled CS
defined by cs-gpios property.
This commit enables the possibility of using dedicated CS
by setting the pins on pinctrl and omitting the cs-gpios
property.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.
Remove hardcoded values from hal calls to use dma_host instead.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When estimating the time that a given SPI transfer will take, whole
buffer sets for TX and RX need to be taken into account, not only their
first parts. Correct `spi_context_wait_for_completion()` accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.
Enable nocache in each driver use it.
Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.
Fixes#51177
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.
Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes#52216
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.
This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.
Adds the loopback binding option to enable the spi_loopback test.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.
drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.
mcpwm: add v4.4.1 include reference, which was refactored as well.
driver: spi: esp32: update internal structs to meet API changes.
cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.
This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
