Commit graph

1871 commits

Author SHA1 Message Date
Dmytro Firsov
74b271bc2a xen: change HVM functions signature to run it for other domains
This commit adds possibility to call hypervisor HVM parameter functions
for specified domain (instead of only DOMID_SELF). It is needed for
configuring domains, that were created from Zephyr control domain.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2023-09-15 11:15:00 +01:00
Dmytro Firsov
c9d2fb7d40 xen: refactor Xen hypervisor Kconfig options
Xen-related Kconfig options were highly dependand on BOARD/SOC xenvm.
It is not correct because Xen support may be used on any board and SoC.

So, Kconfig structure was refactored, now CONFIG_XEN is located in
arch/ directory (same as in Linux kernel) and can be selected for
any Cortex-A arm64 setup (no other platforms are currently supported).

Also remove confusion in Domain 0 naming: Domain-0, initial domain,
Dom0, privileged domain etc. Now all options related to Xen Domain 0
will be controlled by CONFIG_XEN_DOM0.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2023-09-15 11:15:00 +01:00
Martin Jäger
6d67a56d5b drivers: serial: uart_nrfx_uart: fix NRFX_WAIT_FOR result type
This macro expects a bool variable to store the result.

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-09-14 16:51:32 -05:00
Marko Sagadin
3d5e660903 drivers: serial: native tty: Split in top and bottom
Split the native tty serial driver in a top and bottom to enable using it
with embedded libCs.

Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
2023-09-13 16:36:43 +02:00
Florian Grandel
f7e5a103b6 drivers: serial: uart_cc13xx_cc26xx: fix race
Fixing a race in tx/rx_constrained flag access.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-09-08 09:26:34 +02:00
Richard Wheatley
13484b5bdc drivers: serial: uart_pl011_ambiq.h: Remove reserved CLK frequency
UART CLK does not support the 48MHz frequency option

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2023-09-02 15:10:19 +02:00
Sreeram Tatapudi
09a07e42c0 drivers: cat1: Updates to support latest version of HAL/PDL
- Refactoring to support latest versions of HAL/PDL

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2023-09-01 09:52:25 +02:00
Kenneth J. Miller
044de03d57 drivers: serial: stm32: Fix flawed runtime config check
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
5217a17214 drivers: serial: stm32: Consolidate UART config
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
31a6e31cee drivers: serial: stm32: Refactor for PM handling
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
c8ffeb47f7 drivers: serial: stm32: Add persistent uart_config struct
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.

Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.

Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
bde1cd8d38 drivers: serial: stm32: Move boot-time config to data
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller
2531d70ad2 drivers: serial: stm32: Make header file self-contained
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.

This promotes a more modular file structure.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Florian La Roche
9f0f9b8875 drivers/serial/uart_xlnx_ps.c: uart_xlnx_ps_driver_api is defined twice
The var "uart_xlnx_ps_driver_api" is defined twice in the source,
so remove one definition of it.

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2023-08-31 20:18:56 +02:00
Jeroen van Dooren
6ab706913a drivers: serial: stm32: add wide data support
Add wide data support to STM32.
Validated interrupt driven code on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren
435d5d1a94 drivers: serial: stm32: rework code for max re-use in wide data support
Restructuring code for poll_in/poll_out/fifo_fill/fifo_read because for
wide data support, all code is identical except the calls to
LL_USART_{ReceiveData8/TransmitData8}.
This allows both implementations, 8 and 9 bit data-width to call a
visitor function, passing the either the 8 bit or 9 bit data-width
function pointer.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren
250e1f93ca drivers: serial: stm32: prevent stop/data-bits HW support code duplication
Preventing code duplication of macros checking for HW support on
stop bits and data-bits during runtime configuration.
Validated runtime configuration on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Martin Jäger
0fbbe02f07 drivers: serial: esp32_usb: don't use k_usleep in poll_out function
The previous implementation called k_usleep to wait if the fifo was not
empty. This leads to an exception if called from an ISR (e.g. for
for logging).

In addition to that, the k_usleep leads to noticeable interruptions
when printing strings longer than the 64 bytes of the fifo.

With this commit, the function will busy-wait until all characters are
sent or if the timeout is reached. The timeout will only be reached if
no USB host is connected to the port. After the timeout is reached
once, the function will return immediately for subsequent calls
(dropping the characters to be sent) until the USB host is connected
again.

Fixes #60825

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-08-28 16:00:20 +02:00
Fabio Baltieri
ec71be5d9d drivers,subsys: fix few missing k_work_delayable_from_work
Fix few instances of delayable work handlers using the k_work pointer
directly in a CONTAINER_OF pointing to a k_work_delayable.

This is harmless since the k_work is the first element in
k_work_delayable, but using k_work_delayable_from_work is the right way
of handling it.

Change a couple of explicit CONTAINER_OF doing the same work as the
macro in the process.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-08-28 10:12:21 +02:00
Gerard Marull-Paretas
9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Diego Elio Pettenò
9a882f8b09 uart_sam0: fix shadowed variable.
This code was added to CI after the `-Wshadow` stack was prepared, so it
was not fixed together with the rest.

Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
2023-08-22 14:26:59 +02:00
Diego Elio Pettenò
4cada3ecaf uart_sam0: don't consume CONFIG_UART_ASYNC_API directly.
There are situations in which the async API for uart can be provided
by another driver (case in point, uart_rtt), and thus there is no valid
DMA controller for the uart_sam0 driver to talk with.

By separating the configuration, there's no need to exclude samd20-based
boards (that have no DMA peripheral) from the uart_async_api tests.

Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-08-21 17:15:29 +02:00
Daniel Leung
7c208be144 uart: renames shadow variables
Renames	shadow variables found by -Wshadow.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Manuel Arguelles
3112b6de1a serial: nxp_s32: use CONFIG_SERIAL_INIT_PRIORITY
Use CONFIG_SERIAL_INIT_PRIORITY instead of the generic device driver
init priority.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-09 08:28:52 +00:00
Ryan McClelland
652cabeb85 drivers: serial: fix zephyr.h warning
When compiling the cadence uart, a warning is generated for the
zephyr/zephyr.h include. Fix it to be zephyr/kernel.h.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-08-07 18:51:28 +00:00
Jason Mitchell
74d08d69b2 drivers: serial: cmsdk_apb: fix irq_rx_ready deviation
The docstring for uart_cmsdk_apb_irq_rx_ready says "@return 1 if an
interrupt is ready, 0 otherwise" but the function actually returns 2 on
success. This commit fixes this to conform with serial driver API.

Signed-off-by: Jason Mitchell <jmitchell@radicalsemiconductor.com>
2023-08-07 12:01:25 -04:00
Maciej Sobkowski
59b66b8b6a drivers: serial: pl011: Select PINCTRL for Apollo4 SoC family
PINCTRL needs to be enabled for the driver to work on the Apollo4 family
SoCs.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski
60591598e5 drivers: serial: pl011: Add support for Ambiq UART
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
  registers.

The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).

Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski
a86ee2f2af drivers: serial: pl011: add definitions for CLKEN/CLKSEL registers
Add definitions for CLKEN/CLKSEL registers, which are used to control
peripheral clock on the variant of the PL011 UART present in Ambiq SoCs.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski
1c92b91fb4 drivers: serial: pl011: move register definitions into a header
The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Dong D Wang
6fd3cf6a5b drivers: serial: sedi: cleanup init code
remove semaphores unused currently
remove two init helper maro

Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
2023-07-31 13:13:47 -04:00
Dong D Wang
c896e1ed15 drivers: serial: sedi: add new dts attri peripheral-id
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.

Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
2023-07-31 13:13:47 -04:00
Nachiketa Kumar
9f6d6a0fa7 drivers: serial: Add Intel SEDI driver
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.

Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
2023-07-28 17:49:09 +02:00
Wojciech Sipak
bff69f5384 drivers: pinctrl: add driver for EOS S3
This adds a new pinctrl driver for Quicklogic EOS S3 SoC

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:59:59 +02:00
Wojciech Sipak
40fa96506b drivers: pinctrl: Add pinctrl driver for Gecko Series 1
This adds a new pinctrl driver for EFM32.

Co-authored-by: Todd Dust <Todd.Dust@silabs.com>
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:33:03 +02:00
Girisha Dengi
f0ac2347da drivers: serial: Add optional reset line for uart_ns16550
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Marek Matej
6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Andrzej Głąbek
aa7d675935 drivers: serial: nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Fabio Baltieri
ab9028518e drivers: uart_nrfx_uart{,e}: on clear async pointers when enabled
Fix a build error introduced in 9f02eeadf8, the async pointers are only
available when UARTE_ANY_ASYNC is set.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-24 17:31:08 +00:00
Daniel Leung
20021abf0a serial: ns16550: check return of clock_control_get_rate()
This adds a check of the return of clock_control_get_rate(),
and returns error in uart_configure() if unsuccessful in
getting clock rate.

Fixes #60478

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-24 09:07:11 +00:00
Daniel Leung
343772213a serial: CONFIG_UART_USE_RUNTIME_CONFIGURE on API for cfg funcs
This adds the CONFIG_UART_USE_RUNTIME_CONFIGURE guard to
disable the API function pointers if the kconfig is not enabled.
Both .configure and .config_get should only be usable if runtime
(re-)configuration of UART is needed.

Ifdef guards are added to drivers previously lacking this guard.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-21 17:46:12 -04:00
Sean Nyekjaer
d0651a8d96 drivers: serial: stm32: void return value from reset_line_toggle_dt
Suggested-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:57:12 +00:00
Daniel Leung
9f02eeadf8 serial: allow callback setting to be exclusive
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.

Fixes #48606

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-18 11:13:02 +00:00
L Lakshmanan
24759511f4 drivers: uart: Add support for UART_NS16550 TI K3 variant
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-14 09:37:44 +02:00
Tim-Marek Thomas
5d75940ae3 boards: riscv: neorv32: Updates compatibility to neoverse v1.8.6
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).

Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
2023-07-11 18:19:55 +00:00
Mykola Kvach
cb9d1607b3 drivers: uart_rcar: do MMIO mapping inside driver
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).

There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.

Note: it is common approach according to Zephyr documentation.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Alberto Escolar Piedras
1842c602ec drivers serial native ptty: Split in top and bottom
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-10 09:53:22 +02:00
Najumon B.A
b4ed6c4300 drivers: serial: driver init level based on parent node
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-07-08 09:00:03 +03:00
Armin Brauns
b95cdb2a33 drivers: serial: stm32: add support for RS485 configuration
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.

This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.

This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:

$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
    grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
    cut -d/ -f6 |\
    sort -u

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-07-07 13:16:27 +02:00
Alp Sayin
3a4419eff0 drivers: uart_mcux_flexcomm: Merge conditions for enabling ISR
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
2023-07-06 11:48:49 +02:00