drivers: serial: stm32: Add persistent uart_config struct
Add static uart_config struct to init macro with corresponding pointer as uart_stm32_config struct member. This struct will store boot and runtime UART configuration for reinitialization upon exiting low-power modes, where register contents might be lost. Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and uart_stm32_data structs, respectively, as the need for these is now obviated by the presence of the uart_config struct, which contains equivalent members. Add default baudrate, parity, stop, and data bits constants, used to initialize the uart_config struct, in case the corresponding UART DT properties are not set. Signed-off-by: Kenneth J. Miller <ken@miller.ec>
This commit is contained in:
Kenneth J. Miller
Carles Cufí
parent
bde1cd8d38
commit
c8ffeb47f7
2 changed files with 35 additions and 18 deletions
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@ -465,6 +465,7 @@ static int uart_stm32_configure(const struct device *dev,
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{
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const struct uart_stm32_config *config = dev->config;
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struct uart_stm32_data *data = dev->data;
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struct uart_config *uart_cfg = data->uart_cfg;
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const uint32_t parity = uart_stm32_cfg2ll_parity(cfg->parity);
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const uint32_t stopbits = uart_stm32_cfg2ll_stopbits(config, cfg->stop_bits);
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const uint32_t databits = uart_stm32_cfg2ll_databits(cfg->data_bits,
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@ -536,9 +537,9 @@ static int uart_stm32_configure(const struct device *dev,
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}
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#endif
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if (cfg->baudrate != data->baud_rate) {
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if (cfg->baudrate != uart_cfg->baudrate) {
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uart_stm32_set_baudrate(dev, cfg->baudrate);
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data->baud_rate = cfg->baudrate;
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uart_cfg->baudrate = cfg->baudrate;
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}
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LL_USART_Enable(config->usart);
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@ -549,8 +550,9 @@ static int uart_stm32_config_get(const struct device *dev,
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struct uart_config *cfg)
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{
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struct uart_stm32_data *data = dev->data;
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struct uart_config *uart_cfg = data->uart_cfg;
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cfg->baudrate = data->baud_rate;
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cfg->baudrate = uart_cfg->baudrate;
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cfg->parity = uart_stm32_ll2cfg_parity(uart_stm32_get_parity(dev));
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cfg->stop_bits = uart_stm32_ll2cfg_stopbits(
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uart_stm32_get_stopbits(dev));
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@ -1817,6 +1819,7 @@ static int uart_stm32_init(const struct device *dev)
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{
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const struct uart_stm32_config *config = dev->config;
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struct uart_stm32_data *data = dev->data;
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struct uart_config *uart_cfg = data->uart_cfg;
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uint32_t ll_parity;
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uint32_t ll_datawidth;
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int err;
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@ -1868,18 +1871,18 @@ static int uart_stm32_init(const struct device *dev)
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/* Determine the datawidth and parity. If we use other parity than
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* 'none' we must use datawidth = 9 (to get 8 databit + 1 parity bit).
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*/
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if (config->parity == 2) {
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if (uart_cfg->parity == 2) {
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/* 8 databit, 1 parity bit, parity even */
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ll_parity = LL_USART_PARITY_EVEN;
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ll_datawidth = LL_USART_DATAWIDTH_9B;
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} else if (config->parity == 1) {
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} else if (uart_cfg->parity == 1) {
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/* 8 databit, 1 parity bit, parity odd */
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ll_parity = LL_USART_PARITY_ODD;
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ll_datawidth = LL_USART_DATAWIDTH_9B;
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} else { /* Default to 8N0, but show warning if invalid value */
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if (config->parity != 0) {
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if (uart_cfg->parity != 0) {
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LOG_WRN("Invalid parity setting '%d'."
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"Defaulting to 'none'.", config->parity);
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"Defaulting to 'none'.", uart_cfg->parity);
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}
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/* 8 databit, parity none */
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ll_parity = LL_USART_PARITY_NONE;
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@ -1892,12 +1895,12 @@ static int uart_stm32_init(const struct device *dev)
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ll_parity,
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LL_USART_STOPBITS_1);
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if (config->hw_flow_control) {
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if (uart_cfg->flow_ctrl) {
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uart_stm32_set_hwctrl(dev, LL_USART_HWCONTROL_RTS_CTS);
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}
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/* Set the default baudrate */
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uart_stm32_set_baudrate(dev, data->baud_rate);
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uart_stm32_set_baudrate(dev, uart_cfg->baudrate);
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/* Enable the single wire / half-duplex mode */
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if (config->single_wire) {
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@ -2141,13 +2144,25 @@ PINCTRL_DT_INST_DEFINE(index); \
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static const struct stm32_pclken pclken_##index[] = \
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STM32_DT_INST_CLOCKS(index);\
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\
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static struct uart_config uart_cfg_##index = { \
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.baudrate = DT_INST_PROP_OR(index, current_speed, \
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STM32_UART_DEFAULT_BAUDRATE), \
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.parity = DT_INST_ENUM_IDX_OR(index, parity, \
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STM32_UART_DEFAULT_PARITY), \
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.stop_bits = DT_INST_ENUM_IDX_OR(index, stop_bits, \
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STM32_UART_DEFAULT_STOP_BITS), \
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.data_bits = DT_INST_ENUM_IDX_OR(index, data_bits, \
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STM32_UART_DEFAULT_DATA_BITS), \
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.flow_ctrl = DT_INST_PROP(index, hw_flow_control) \
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? UART_CFG_FLOW_CTRL_RTS_CTS \
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: UART_CFG_FLOW_CTRL_NONE, \
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}; \
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\
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static const struct uart_stm32_config uart_stm32_cfg_##index = { \
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.usart = (USART_TypeDef *)DT_INST_REG_ADDR(index), \
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.reset = RESET_DT_SPEC_GET(DT_DRV_INST(index)), \
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.pclken = pclken_##index, \
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.pclk_len = DT_INST_NUM_CLOCKS(index), \
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.hw_flow_control = DT_INST_PROP(index, hw_flow_control), \
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.parity = DT_INST_ENUM_IDX_OR(index, parity, UART_CFG_PARITY_NONE), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.single_wire = DT_INST_PROP_OR(index, single_wire, false), \
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.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false), \
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@ -2162,7 +2177,7 @@ static const struct uart_stm32_config uart_stm32_cfg_##index = { \
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}; \
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\
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static struct uart_stm32_data uart_stm32_data_##index = { \
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.baud_rate = DT_INST_PROP(index, current_speed), \
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.uart_cfg = &uart_cfg_##index, \
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UART_DMA_CHANNEL(index, rx, RX, PERIPHERAL, MEMORY) \
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UART_DMA_CHANNEL(index, tx, TX, MEMORY, PERIPHERAL) \
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}; \
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@ -18,6 +18,11 @@
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#include <stm32_ll_usart.h>
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#define STM32_UART_DEFAULT_BAUDRATE 115200
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#define STM32_UART_DEFAULT_PARITY UART_CFG_PARITY_NONE
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#define STM32_UART_DEFAULT_STOP_BITS UART_CFG_STOP_BITS_1
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#define STM32_UART_DEFAULT_DATA_BITS UART_CFG_DATA_BITS_8
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/* device config */
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struct uart_stm32_config {
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/* USART instance */
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@ -28,10 +33,6 @@ struct uart_stm32_config {
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const struct stm32_pclken *pclken;
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/* number of clock subsystems */
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size_t pclk_len;
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/* initial hardware flow control, 1 for RTS/CTS */
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bool hw_flow_control;
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/* initial parity, 0 for none, 1 for odd, 2 for even */
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int parity;
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/* switch to enable single wire / half duplex feature */
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bool single_wire;
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/* enable tx/rx pin swap */
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@ -48,6 +49,7 @@ struct uart_stm32_config {
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uint8_t de_deassert_time;
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/* enable de pin inversion */
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bool de_invert;
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/* pin muxing */
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const struct pinctrl_dev_config *pcfg;
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#if defined(CONFIG_UART_INTERRUPT_DRIVEN) || defined(CONFIG_UART_ASYNC_API) || \
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defined(CONFIG_PM)
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@ -82,10 +84,10 @@ struct uart_dma_stream {
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/* driver data */
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struct uart_stm32_data {
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/* Baud rate */
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uint32_t baud_rate;
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/* clock device */
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const struct device *clock;
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/* uart config */
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struct uart_config *uart_cfg;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t user_cb;
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void *user_data;
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