drivers: serial: uart_pl011_ambiq.h: Remove reserved CLK frequency
UART CLK does not support the 48MHz frequency option Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
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@ -36,9 +36,6 @@ static inline int pl011_ambiq_clk_set(const struct device *dev, uint32_t clk)
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case 24000000:
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clksel = PL011_CR_AMBIQ_CLKSEL_24MHZ;
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break;
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case 48000000:
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clksel = PL011_CR_AMBIQ_CLKSEL_48MHZ;
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break;
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default:
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return -EINVAL;
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}
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