Whenever UART_RX_DISABLED event is received module attempts to
re-enable receiver since in interrupt driven API receiver is
always on. However, it is possible that there is no free buffers
and in that case attempt to enable the receiver will fail with
-EBUSY. That scenario shall be accepted since the receiver will
be re-enabled when at least one buffer will be freed.
Given that, -EBUSY return shall be accepted (no assert) and
number of pending RX buffer requests shall be reset only on
successful enabling.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Using the 8 base clock cycles per bit period setting (instead of 16)
reduces the uart baud rate error when using a 12MHz crystal (found on
many RA Microcontroller development kits boards). This setting also
slightly reduces the error when using the internal 48MHz oscillator,
used by the Arduino UNO R4 Minima board currently support by Zephyr.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
Extend Kconfig definitions and nrfx_config translations so that UARTE
instances that are available in nRF54H20 can be used.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On nRF54H20, only the new shim can be used and the enhanced poll out
cannot be enabled since there is no DPPI support for this SoC yet.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:
.single_wire = DT_INST_PROP_OR(index, single_wire, false), \
.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false), \
This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:
.single_wire = DT_INST_PROP(index, single_wire), \
.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap), \
Signed-off-by: Roman Studenikin <srv@meta.com>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Just like for the old driver, for simulation, we cannot
get the UART regiter address for the pinctrl config structure
from DT, as that cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.
Also, do improve the condition for the busy wait during the poll_out,
for simulation, so we only busy wait if we will loop/the
Tx was busy.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
New shim takes more flash and is causing some tests to overflow the
ROM memory. Switching to the legacy shim as default until it is fixed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add new shim which is based on nrfx driver.
Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add adaptation layer which allows to provide interrupt driven
API for drivers which exposes only asynchronous API.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Increase the busy wait time granularity while runing in simulation
for poll mode. In this mode, the driver spends a *lot* of time
waiting for the UART to be done. The smallest frame time is
~10µs @ 1Mbps, so busywaiting in very small increments
is very wastefull as we keep shuting down and turning on the simulated
MCU.
Let's increase the busy wait time increments of the driver to 3 micros,
which should not change much the behaviour.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
After #63289, multi-level interrupts are now encoded using macro
magic. This means that using the generic DT_INST_IRQ_BY_IDX() to
fetch the INTID is no longer an option as the queried INTID will
be the one specified through the node's `interrupts` properties.
To fix this, switch to using DT_INST_IRQN_BY_IDX() which will
return the correctly encoded INTID.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The receiver ready flag of the (channel) status register
for the sam controller was not being interpreted correctly
for both the uart and usart implementation,
according to the uart api.
Tested and confirmed using the sam4sa16ca.
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/serial directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
While waiting for the UART to be ready in ISR
mode, for simulation only, add a tiny delay per
iteration of the busy wait loops to allow
time to pass.
This Z_SPIN_DELAY is an empty macro for any
other target than simulation.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
For simulation, we cannot get the UART regiter address
for the pinctrl config structure from DT, as that
cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name which will be resolved by the nRF HAL
definitions to the same value.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The ISR prototype used when building without the
interrupt driven UART was not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
DEVICE_MMIO_MAP() is an unnecessary process, so delete it.
I created uart_ra.c based on uart_rcar.c, but
I forgot to correct the name. I fixed it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Removed all function calls from Raspberry Pi Pico SDK
Added functions for setting uart baudrate and format
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Ambiq UART requires specific busy wait during initialization for
propagating powering control registers, original k_busy_wait()
used here generated a dead loop because k_busy_wait() relays on
timer, who's driver is initialized after UART(UART init in
PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait()
with checking power status register is more suitable here.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
In the kconfig descriptions and the links to documents
replace native_posix with native_sim, or a generally
applicable description.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
In a previous change, STM32U5 GPDMA specific behavior was set into a
specific configuration applying only to few devices impacted by a specific
silicon erratum.
As part of this change, dma suspension before dma stop was set to apply
to the specific erratum workaround.
It appears, this was wrong and dma suspension before dma stop should
be done on all devices compatible with stm32u5 dma. This fix re-instantiate
the correct behavior.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Wakeup-source configuration is about configuring registers.
It belongs to uart_stm32_registers_configure().
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.
The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.
There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The parity, stop bits and data bits config was hard-coded instead of
taken from the device tree.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
Enable a condition as define dma_callback function only if
any one instance of ns16550 has dmas parameter in dts.
This resolves conflict of dma_callback function defined but
not used warning in case of UART_ASYNC_API enabled but dmas
parameter is not provided to any ns16550 UARTs dts instances.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Removed if (IS_ENABLED()) and used #if as they are causing CI failures
and removed LPSS related functions which are not under LPSS config.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
On some devices such as STM32U5, there is no UART WKUP dedicated registers
as the hardware block has an integrated autonomous wakeup capability.
Hence it's capable to wake up the device from stop modes (down to Stop 1).
This behavior relies on RCC UESM bit which is enabled by default at reset
and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple
configuration. This might be changed later on, if a need is seen to disable
UESM bit.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Workaround for DMAT errata was applied on all SoCs declaring STM32U5
DMA compatible.
This errata has been fixed in later SoCs revisions and should not be
applied anymore as this can cause compatibility issues with power mgmt
(can not enter STOP1 in some cases).
Declare a specific Kconfig symbol to restrict the workaround only to the
set of SoCs impacted by the issue and requiring workaround.
Note that I preferred using Kconfig over device tree since it doesn't feel
right to declare a compatible on a silicon bug base.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Serial wakeup feature was only working whe DBG in Stop mode setting
was enabled.
Add required changes to make it functional also when this configuration
isn't set.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
When enabling async RX the first time after boot, there is an
additional byte received with the first RX_DATA_RDY event,
which seems to be caused by the RX data not being flushed before
enabling the UART RX DMA.
Adding a request to flush the RX data register before enabling
the RX DMA, solves the issue.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
