Commit graph

1871 commits

Author SHA1 Message Date
Krzysztof Chruściński
f6ecad20a1 drivers: serial: Fix async to interrupt driven adaptation layer
Whenever UART_RX_DISABLED event is received module attempts to
re-enable receiver since in interrupt driven API receiver is
always on. However, it is possible that there is no free buffers
and in that case attempt to enable the receiver will fail with
-EBUSY. That scenario shall be accepted since the receiver will
be re-enabled when at least one buffer will be freed.

Given that, -EBUSY return shall be accepted (no assert) and
number of pending RX buffer requests shall be reset only on
successful enabling.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-02-06 09:54:34 +01:00
Ian Morris
826d67af91 drivers: serial: ra: reduce uart baud rate error
Using the 8 base clock cycles per bit period setting (instead of 16)
reduces the uart baud rate error when using a 12MHz crystal (found on
many RA Microcontroller development kits boards). This setting also
slightly reduces the error when using the internal 48MHz oscillator,
used by the Arduino UNO R4 Minima board currently support by Zephyr.

Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
2024-02-04 19:55:45 -06:00
Gerard Marull-Paretas
d230542f1d drivers: serial: nrfx_uarte2: drop soc.h
As it is not required (e.g. RISC-V nRF54H port does not provide soc.h)

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-02-02 16:40:11 +01:00
Andrzej Głąbek
976de4edbe drivers: serial: nrfx: Allow new UARTE instances to be used
Extend Kconfig definitions and nrfx_config translations so that UARTE
instances that are available in nRF54H20 can be used.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-02-02 16:40:11 +01:00
Andrzej Głąbek
784688a511 drivers: serial: Kconfig.nrfx: Filter out options unsupported on nRF54H20
On nRF54H20, only the new shim can be used and the enhanced poll out
cannot be enabled since there is no DPPI support for this SoC yet.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2024-02-02 16:40:11 +01:00
Mykola Kvach
739ec3072b drivers: serial: add missed binding for xen dom0 consoleio driver
Add missed binding and appropriate changes for Xen Dom0/Dom0less
UART driver.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2024-01-30 18:52:13 -05:00
Magdalena Pastula
9b3b34f16e drivers: serial: align to nRF54L15
Align UARTE driver config to nRF54L15.

Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
2024-01-30 21:00:44 +00:00
Roman Studenikin
260fc89643 drivers: use DT_INST_PROP over DT_INST_PROP_OR if possible
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:

	.single_wire = DT_INST_PROP_OR(index, single_wire, false),	\
	.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false),	\

This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:

	.single_wire = DT_INST_PROP(index, single_wire),		\
	.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap),			\

Signed-off-by: Roman Studenikin <srv@meta.com>
2024-01-30 00:26:58 +00:00
Aymeric Aillet
48dc603f0c drivers: serial: Rename renesas ra driver
Need this rename to be able to target this driver
in the "Renesas RA" maintainer area.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2024-01-29 11:32:46 +01:00
Alberto Escolar Piedras
eb38e8db31 drivers uart_native_ptty: Set standard source macro appropriately
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-26 07:48:55 -05:00
Guillaume Gautier
0792a85f77 drivers: serial: stm32: add reinit after standby
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-25 08:55:02 +01:00
Guillaume Gautier
be26c71fd4 drivers: serial: stm32: prevent suspend to ram when operation in progress
Prevent the system to enter Suspend to RAM state while UART operation is
in progress.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-01-25 08:55:02 +01:00
Alberto Escolar Piedras
6447b1c4fd drivers/serial/uart_nrfx_uarte2: Fix for simulation
Just like for the old driver, for simulation, we cannot
get the UART regiter address for the pinctrl config structure
from DT, as that cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.

Also, do improve the condition for the busy wait during the poll_out,
for simulation, so we only busy wait if we will loop/the
Tx was busy.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-24 10:43:50 +01:00
Gerard Marull-Paretas
0c5a2b1fe4 soc: riscv: microchip_miv: miv: move MIV_UART_0_LINECFG to driver
Instead of soc.h, since it's not used by anything else.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
893a338f05 drivers: serial: opentitan: remove redundant include
<soc.h> is not needed.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
5e17b89804 drivers: serial: liteuart: add missing include
soc.h was missing to access custom IO read/write functions, e.g.
litex_read8.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Gerard Marull-Paretas
183dd20424 drivers: serial: neorv32: add missing include
<soc.h> is needed for some NEORV32_SYSINFO_* definition.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-19 15:13:53 +00:00
Krzysztof Chruściński
fb185fb5bd drivers: serial: nrfx_uarte: Use legacy shim by default
New shim takes more flash and is causing some tests to overflow the
ROM memory. Switching to the legacy shim as default until it is fixed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-01-19 13:04:07 +01:00
Krzysztof Chruściński
4cc213bc8d drivers: serial: nrfx: Add new shim based on nrfx_uarte
Add new shim which is based on nrfx driver.

Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-01-18 11:12:55 +01:00
Krzysztof Chruściński
2854fc18fd drivers: serial: Add async to interrupt driven adaptation
Add adaptation layer which allows to provide interrupt driven
API for drivers which exposes only asynchronous API.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-01-18 11:12:55 +01:00
Alberto Escolar Piedras
a6ea4490a9 drivers serial nrfx: Speed up for simulation
Increase the busy wait time granularity while runing in simulation
for poll mode. In this mode, the driver spends a *lot* of time
waiting for the UART to be done. The smallest frame time is
~10µs @ 1Mbps, so busywaiting in very small increments
is very wastefull as we keep shuting down and turning on the simulated
MCU.
Let's increase the busy wait time increments of the driver to 3 micros,
which should not change much the behaviour.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-16 14:55:07 -05:00
Laurentiu Mihalcea
c82789c5ff drivers: serial: uart_mcux_lpuart: Switch to using DT_INST_IRQN_BY_IDX
After #63289, multi-level interrupts are now encoded using macro
magic. This means that using the generic DT_INST_IRQ_BY_IDX() to
fetch the INTID is no longer an option as the queried INTID will
be the one specified through the node's `interrupts` properties.
To fix this, switch to using DT_INST_IRQN_BY_IDX() which will
return the correctly encoded INTID.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-01-16 09:27:38 -06:00
Jaro Van Landschoot
a897005b98 drivers: serial: sam u(s)art: correct interpretation of RXRDY flag
The receiver ready flag of the (channel) status register
for the sam controller was not being interpreted correctly
for both the uart and usart implementation,
according to the uart api.
Tested and confirmed using the sam4sa16ca.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2024-01-16 10:01:17 +01:00
Gerard Marull-Paretas
3ed16b38e5 drivers: serial: b91: add missing RISC-V PLIC header
Driver was using PLIC without including necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-15 09:58:03 +01:00
Pisit Sawangvonganan
b4567fa551 drivers: serial: correct spelling
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/serial directory.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-01-13 00:24:36 +00:00
Mykola Kvach
bc90724de4 drivers: serial: uart_rcar: fix reading of SCFRDR register
Fix the read size of the SCFRDR register, which has an 8-bit size
for both Gen3 and Gen4 boards.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2024-01-11 10:04:27 +01:00
Alberto Escolar Piedras
14bc4aeec8 drivers uart_nrfx: Break infinite loops for simulation
While waiting for the UART to be ready in ISR
mode, for simulation only, add a tiny delay per
iteration of the busy wait loops to allow
time to pass.
This Z_SPIN_DELAY is an empty macro for any
other target than simulation.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras
efca307d35 drivers uart_nrfx: Correct pinctrl reg address for simulation
For simulation, we cannot get the UART regiter address
for the pinctrl config structure from DT, as that
cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras
4efd08bfd8 drivers uart_nrfx: Get peripheral address from HAL
Instead of getting the hardcoded address from the DT structure
use its symbolic name which will be resolved by the nRF HAL
definitions to the same value.

This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Alberto Escolar Piedras
5b993b070a drivers uart nrfx: Fix ISR prototype
The ISR prototype used when building without the
interrupt driven UART was not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-01-10 10:01:37 +01:00
Anisetti Avinash Krishna
14c68c9438 drivers: serial: ns16550: Add IOPORT_ENABLED check condition
io_map check to enable LPSS DMA initialization is kept under
condition IOPORT_ENABLED.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2024-01-09 15:52:10 -06:00
TOKITA Hiroshi
89982b711b drivers: serial: ra: minor cleanups
- Corrected indentation with clang-format

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2024-01-02 19:12:46 +00:00
TOKITA Hiroshi
b1172d812d drivers: serial: ra: adding support interrupt driven mode
Add support interrupt driven mode for Renesas RA UART driver.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2024-01-02 19:12:46 +00:00
TOKITA Hiroshi
75ac40e6d8 drivers: serial: ra: Cleaned up useless initialization and bad naming
DEVICE_MMIO_MAP() is an unnecessary process, so delete it.

I created uart_ra.c based on uart_rcar.c, but
I forgot to correct the name. I fixed it.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2024-01-02 19:12:46 +00:00
Andrei-Edward Popa
0f41a2da1c drivers: serial: Removed all function calls from Raspberry Pi Pico SDK
Removed all function calls from Raspberry Pi Pico SDK
Added functions for setting uart baudrate and format

Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-12-20 11:14:24 +01:00
Bryan Zhu
3e456e8cfb drivers: serial: pl011: Remove busy wait in Ambiq UART initiate
Ambiq UART requires specific busy wait during initialization for
propagating powering control registers, original k_busy_wait()
used here generated a dead loop because k_busy_wait() relays on
timer, who's driver is initialized after UART(UART init in
PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait()
with checking power status register is more suitable here.

Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
2023-12-11 10:10:39 +01:00
Alberto Escolar Piedras
53bbded264 drivers/serial native: Replace native_posix with native_sim in comments
In the kconfig descriptions and the links to documents
replace native_posix with native_sim, or a generally
applicable description.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-12-07 10:39:31 +00:00
Erwan Gouriou
d2ea9e4806 drivers: serial: stm32wba: Suspension required before stop in DMA Tx abort
In a previous change, STM32U5 GPDMA specific behavior was set into a
specific configuration applying only to few devices impacted by a specific
silicon erratum.
As part of this change, dma suspension before dma stop was set to apply
to the specific erratum workaround.
It appears, this was wrong and dma suspension before dma stop should
be done on all devices compatible with stm32u5 dma. This fix re-instantiate
the correct behavior.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Erwan Gouriou
ad1594ee75 drivers: serial: stm32: Small code refactoring
Wakeup-source configuration is about configuring registers.
It belongs to uart_stm32_registers_configure().

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Erwan Gouriou
0c541d7ad0 drivers: uart: stm32: Allow enabling FIFO mode
Add required bits to allow FIFO mode enabling.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-12-01 10:52:49 +00:00
Dawid Niedzwiecki
7388970c85 serial: stm32: do not clear TC flag in async mode
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.

The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.

There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-11-30 10:04:57 +01:00
Marco Widmer
20979f80a6 drivers: uart: esp32: use config from device tree
The parity, stop bits and data bits config was hard-coded instead of
taken from the device tree.

Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
2023-11-25 09:04:46 -05:00
Anisetti Avinash Krishna
e76ace4647 drivers: serial: ns16550: Condition added for dma_callback
Enable a condition as define dma_callback function only if
any one instance of ns16550 has dmas parameter in dts.
This resolves conflict of dma_callback function defined but
not used warning in case of UART_ASYNC_API enabled but dmas
parameter is not provided to any ns16550 UARTs dts instances.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-24 08:30:04 +01:00
Anisetti Avinash Krishna
69d62add98 drivers: serial: ns16550: Fixed few bugs causing CI failure
Removed if (IS_ENABLED()) and used #if as they are causing CI failures
and removed LPSS related functions which are not under LPSS config.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-23 17:21:20 +01:00
Anisetti Avinash Krishna
f66930fd3e drivers: uart: uart_ns16550: Enable Async operations using DMA
Enabled Async API feature for ns16550 driver using DMA support.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-22 17:31:08 +01:00
Najumon B.A
608cc4d1f2 drivers: ns16550: remove parent init level dependency
remove parent init level dependency such as PRE_KERNEL or
POST_KERNEL. Uart driver init level change always to PRE_KERNEL

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-11-22 14:56:18 +00:00
Erwan Gouriou
a38c8d25e7 drivers: serial: stm32u5: Serial wakeup is based on autonomous capability
On some devices such as STM32U5, there is no UART WKUP dedicated registers
as the hardware block has an integrated autonomous wakeup capability.
Hence it's capable to wake up the device from stop modes (down to Stop 1).

This behavior relies on RCC UESM bit which is enabled by default at reset
and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple
configuration. This might be changed later on, if a need is seen to disable
UESM bit.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 16:41:40 +00:00
Erwan Gouriou
d7513fb526 driver: serial: stm32u5: DMAT Errata behavior valid only on some SoCs
Workaround for DMAT errata was applied on all SoCs declaring STM32U5
DMA compatible.
This errata has been fixed in later SoCs revisions and should not be
applied anymore as this can cause compatibility issues with power mgmt
(can not enter STOP1 in some cases).

Declare a specific Kconfig symbol to restrict the workaround only to the
set of SoCs impacted by the issue and requiring workaround.

Note that I preferred using Kconfig over device tree since it doesn't feel
right to declare a compatible on a silicon bug base.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 15:49:57 +01:00
Erwan Gouriou
e5ab70b724 drivers: uart: stm32: Complete wakeup feature
Serial wakeup feature was only working whe DBG in Stop mode setting
was enabled.
Add required changes to make it functional also when this configuration
isn't set.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-21 14:22:22 +01:00
Bjarki Arge Andreasen
f9b42bc911 drivers: serial: uart_stm32.c: RxDataFlush on async_rx_enable
When enabling async RX the first time after boot, there is an
additional byte received with the first RX_DATA_RDY event,
which seems to be caused by the RX data not being flushed before
enabling the UART RX DMA.

Adding a request to flush the RX data register before enabling
the RX DMA, solves the issue.

Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
2023-11-20 10:48:41 -06:00