Commit graph

2358 commits

Author SHA1 Message Date
Maureen Helm
d107411820 arm: nxp_kinetis: Define FLASH_DRIVER_NAME macro for kl2x and kwx SoCs
Defines the FLASH_DRIVER_NAME macro in soc.h for kinetis kl2x and kwx
SoC series. This macro is used by the storage and dfu subsystems, as
well as the flash_shell sample.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-01-31 16:43:40 -06:00
Ramakrishna Pallala
301acb8e1b kernel: include: rename nano_internal.h to kernel_internal.h
Rename the nano_internal.h to kernel_internal.h and modify the
header file name accordingly wherever it is used.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-01-31 10:07:21 -06:00
Adithya Baglody
77755afa19 userspace: ARM: Fixed Kconfig for ARM_USERSPACE
Currently in zephyr the support for the arm userspace has not be
merged. But the Kconfig always sets the userspace flag and causes a
build failure. This is blocking the test cases for userspace.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-01-29 23:11:11 -05:00
Carles Cufi
7361d3d74d config: bootloader: Add support for MCUboot
Add a new Kconfig option, BOOTLOADER_MCUBOOT, that automatically sets
the required options necessary to make the resulting image bootable by
the MCUboot open source bootloader. This includes the text section
offset and the vector relay table for Cortex-M0, and in the future it
might also add the DTS overlay required to link at slot0 offset in
flash.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-29 18:05:18 -05:00
Kumar Gala
b8173d960e drivers: flash: NXP KL2X/KW4xZ: Add device tree support
Add device tree support for the "nxp,kinetis-ftfa" flash controller used
on the NXP KL2X and KW4xZ SoCs.

Fixes: #5788

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-29 16:34:49 -06:00
Kumar Gala
a394693d2f drivers: flash: NXP k6x/kw2xd: Convert to use device tree
Convert NXP k6x and kw2xd flash driver to use device tree to get the
flash controller name from device tree.  We introduce yaml bindings for
the "nxp,kinetis-ftfe" and "nxp,kinetis-ftfl" devices.

Fixes: #5788

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-29 16:34:49 -06:00
Michał Kruszewski
aee2ff526d ext: nordic: Replace HAL and MDK with the ones from nrfx
The old HAL and MDK have been removed from the source tree.
Since RADIO HAL is not yet present in nrfx, the "nrf_radio.h" file
was temporarily moved to "nrfx/hal" folder. It will be replaced with
the proper file from nrfx in its next update.

Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-01-29 03:02:06 +05:30
Andrzej Głąbek
c84c2eaa82 ext: nordic: Add initial adaptation layer for nrfx
This commit adds a glue layer that adapts nrfx to be usable in Zephyr
as a host environment and files with static configuration of nrfx
drivers for several supported SoCs.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-01-29 03:02:06 +05:30
Daniel Wagenknecht
3f2b376cd6 dts: stm32l4: move dts.fixup to soc family level
This moves and merges the existing board-level dts.fixup files
for STM32 L4 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

disco_l475_iot1 boards fixup blocks for devices connected via SPI
and I2C stay in board level dts.fixup file, because they are board
specific.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-01-28 10:35:30 -06:00
Daniel Wagenknecht
080fe4d4cf dts: stm32f3: move dts.fixup to soc family level
This moves and merges the existing board-level dts.fixup files
for STM32 F3 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-01-28 10:35:30 -06:00
Daniel Wagenknecht
285c9506d5 dts: stm32f1: move dts.fixup to soc family level
This moves and merges the existing board-level dts.fixup files
for STM32 F1 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-01-28 10:35:30 -06:00
Daniel Wagenknecht
d76858f6ae dts: stm32f4: move dts.fixup to soc family level
This moves and merges the existing board-level dts.fixup files
for STM32 F4 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

96b_carbon boards fixup block for Bluetooth HCI device via SPI
stays in board level dts.fixup file, because it is board specific.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-01-28 10:35:30 -06:00
Daniel Wagenknecht
be430a05cb dts: stm32f0: move dts.fixup to soc family level
This moves and merges the existing board-level dts.fixup files
for STM32 F0 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
2018-01-28 10:35:30 -06:00
Kumar Gala
2dfee62a5e drivers: flash: atmel sam0: Convert to use device tree
Convert Atmel SAM0 flash driver to use device tree to get the flash
controller name and base address.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-27 21:09:28 -06:00
Kumar Gala
dc98605f4a drivers: flash: stm32: Convert to use device tree
Convert STM32 flash drivers to use device tree to get the flash
controller name and base address.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-26 09:25:57 -06:00
Ding Tao
bbd307edfd arch: arm: vector_table: Support vector table soft relay
For SoCs that don't support vector table relocation in hardware, may not
support bootloader like mcuboot.

We introduce a way to relocate vector table in software by forwarding
the control of incoming IRQs to a new vector table which address is save
at fixed SRAM address.

User can change the data in that fixed SRAM address in order to relocate
vector table in software way.

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-01-26 06:57:28 +05:30
Ding Tao
bf949b0647 arch: arm: Add SW_VECTOR_RELAY Kconfig flag
Eanble soft relay IRQ handler for Cortex-M0 target if this flag set
true.

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-01-26 06:57:28 +05:30
Ding Tao
e28db91acf arch: arm: stm32f0: Enable CONFIG_CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP
Enable this flag for all stm32f0 series in order to support hardware
vector table relocation feature.

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-01-26 06:57:28 +05:30
Ding Tao
0be502e68f arch: arm: Add CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP Kconfig flag
Cortex-M0 do not have the Vector Table Base Address Offset Register, so
Cortex-M0 vector table address can not be changed.

But in some Cortex-M0 SoCs like STM32F0 series, they have some mechanism
that can remap the vector table address to the start address of SRAM.

Use this flag to indicates whether current Cortex-M0 SoC support such a
remap or not.

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-01-26 06:57:28 +05:30
Kumar Gala
b0768ec66a arm: nordic: remove last references to CONFIG_SOC_FLASH_NRF5_DEV_NAME
We use FLASH_DEV_NAME everywhere now so we can remove the use of
CONFIG_SOC_FLASH_NRF5_DEV_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-25 15:23:00 -06:00
Kumar Gala
44141f6939 arm: nordic: Refactor dts.fixup files to SoC vs board
Refactor common dts.fixup for the SoC into the SOC_SERIES dts.fixup
file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-25 15:23:00 -06:00
Neil Armstrong
d9c00b4e68 arch: arm: soc: provide support for stm32f072
Support the ST STM32F072xB SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-25 15:13:53 -06:00
Carles Cufi
90a45d2eca soc: nrf51: Define flash driver name for nRF51
In order to be able to build MCUboot for nRF51 we require the flash
driver name in the nRF51 soc.h header.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-25 14:41:22 +01:00
Andrzej Puzdrowski
ff7dfc4fb4 dts: bindings: add support for the flash driver name
So far, DT did not support the flash driver name.
Any flash-controller should have the appropriate
flash driver that should be identified by its name.

This path adds generic support for extract the description
from the flash-controller node,
adds implementation of this property for all nrf5x targets.


Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2018-01-23 12:29:50 -06:00
Shiksha Patel
4a892ae81a lpc: Add nxp_lpc soc family to soc directory
Add soc configuration support for lpc soc family, Kconfigs and soc files
for lpcxxx soc.

Add dtsi file for lpc54xxx.

Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-01-23 09:18:32 -06:00
73d045e281 spi: add a SPI driver for the SAM0 series.
Impleentation is master only and uses polling to read and write.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-13 07:39:05 -05:00
Kumar Gala
b92a40a798 drivers: entropy: stm32: Remove STM32F411XE from building
It appears the STM32F411XE doesn't support RNG so remove enabling it
from the SoC defconfig and flag an error if attempting to build the
driver on that SoC.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-12 19:42:54 -05:00
Erwan Gouriou
164fb32cf6 drivers: entropy: stm32: limit driver to SoC supporting it
In STM32 family, RNG IP is available only on F4 and L4 series.
Besides STM32F401 does not support is neither.
Get entropy driver available on STM32 devices supporting it and
generate a compilation issue on STM32 devices that do not own
the RNG IP.

Solves #5448

Signed-Off-By: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-01-11 19:00:19 -05:00
Neil Armstrong
9c3f7e11fb arch: arm: soc: stm32f0: include LL spi header
Include the STM32Cube LL SPI Header for STM32F0

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00
Jonas Pfaff
1d8e7a58c0 arm: atmel: soc: Soc init can be executed twice
Signed-off-by: Jonas Pfaff <jonas.pfaff@gmail.com>
2018-01-11 19:00:19 -05:00
Kumar Gala
cd7ca95378 arm: nxp_mpu: Fix build issue when asserts enabled
When asserts are enabled we run into an issue with newlib and types of
printf style formatters not matching.  The easy fix to this is to cast
the uint32_t to u32_t to make things consistent with or without newlib
enabled.

This fixes #5645

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-01-11 15:20:03 -06:00
Yannis Damigos
4d2dbab036 boards: stm32f1: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos
c868ac0238 boards: stm32f0: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos
2cb692e7de boards: stm32f3: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos
96740a0570 boards: stm32l4: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos
d60dc69ee7 boards: stm32f4: Clean up driver generic flags
Clean up driver generic flags from boards' _defconfig files

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Yannis Damigos
a6f8283ecd arch: st_stm32: Add common series configuration file
Add common series configuration file

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-11 14:35:45 -06:00
Carles Cufi
7d764b35f3 cmake: Use path-corrected version of ZEPHYR_BASE
Instead of accessing the environment variable ZEPHYR_BASE every time we
require accessing the source code root, use an intermediate variable
that has OS path separators correctly set to '/' to avoid issues on
Windows.

Note: This removes the ZEPHYR_SOURCE_DIR CMake variable. External
applications using that will need to change to use the new ZEPHYR_BASE
variable.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2018-01-11 14:59:03 -05:00
Ilya Tagunov
935d0ce89b soc: arm: stm32: fix startup SystemCoreClock values
Current STM32 SoC initialization code sets really weird startup values
to SystemCoreClock. It should be consistent with Reference Manuals after
this change.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2018-01-08 08:38:17 -07:00
b69c452e6f arch: add support for the SAMD21G18A used in the Arduino Zero.
Signed-off-by: Michael Hope <mlhx@google.com>
2018-01-04 13:18:25 -05:00
Jan Van Winkel
30b65d8986 arm: stm32l4: include RNG ll header
Include low level random generator header in case stm32 random number
generator should be used by entropy driver

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2018-01-04 09:18:21 -05:00
Anas Nashif
5146dbbc58 arch: architecture defines kernel entry
Make defining the kernel entry architecture specific and move it to the
architecture domain.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-27 14:16:08 -05:00
Anas Nashif
f4ddb62bfa kconfig: move ARCH_HAS_THREAD_ABORT to arch level
Was ARM specific and could not be used by other architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2017-12-27 14:16:08 -05:00
Adithya Baglody
13ac4d4264 kernel: mem_domain: Add an arch interface to configure memory domain
Add an architecure specfic code for the memory domain
configuration. This is needed to support a memory domain API
k_mem_domain_add_thread.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-12-21 11:52:27 -08:00
Anas Nashif
429c2a4d9d kconfig: fix help syntax and add spaces
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 17:43:28 -06:00
Neil Armstrong
7e2fd68b1f arm: stm32f0: include I2C ll header
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Sudarsana Nagineni
aca079c9fc boards: olimex stm32-e407, stm32f407g_disc1: Enable USB OTG Support
Enable USB OTG support for olimex stm32-e407 and stm32f407g_disc1
boards by adding USB OTG to the pinmux table. Also, fix out of
range endpoint addresses in CDC ACM case for STM32F4 based boards.

Signed-off-by: Sudarsana Nagineni <sudarsana.nagineni@intel.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong
22b4d19a6d ARM: stm32f030x8: fix FLASH_PAGE_SIZE
Fix to the correct flash page size for the stm32f030x8 SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong
071cff7fb5 ARM: stm32f0: switch flash registers to volatile
Like other STM SoCs (L4 and F0), switch the flash registers struct
to volatile.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-12 12:36:08 -06:00
Neil Armstrong
494e1734e0 ARM: stm32f0: fix syscfg mapping to fix EXTI config
The exticrX registers were shifted by a word, so configuring
an EXTI line on a port different of PA misconfigured the EXTI line
source and could flood with unwanted events.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-07 08:08:41 -06:00