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dts: stm32f0: move dts.fixup to soc family level

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This moves and merges the existing board-level dts.fixup files
for STM32 F0 SOC family into one soc family level dts.fixup file.
No new fixup blocks have been added, only fixup blocks, that were
part of at least one board level dts.fixup file are present in
soc family level dts.fixup file.

Contributes to #5707

Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
This commit is contained in:
Daniel Wagenknecht 2018-01-27 23:12:30 +01:00 • committed by Kumar Gala
commit be430a05cb
5 changed files with 33 additions and 99 deletions
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35
arch/arm/soc/st_stm32/stm32f0/dts.fixup
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@ -1,6 +1,37 @@
/* SoC level DTS fixup file */
#define FLASH_DEV_BASE_ADDRESS ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS_0
#define FLASH_DEV_NAME ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_1_NAME ST_STM32_USART_40013800_LABEL
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0
#define FLASH_DEV_BASE_ADDRESS ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS_0
#define FLASH_DEV_NAME ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
/* End of SoC Level DTS fixup file */

26
boards/arm/nucleo_f030r8/dts.fixup
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@ -1,26 +0,0 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY

26
boards/arm/nucleo_f091rc/dts.fixup
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@ -1,26 +0,0 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY

14
boards/arm/stm32f072_eval/dts.fixup
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@ -1,14 +0,0 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0

31
boards/arm/stm32f072b_disco/dts.fixup
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@ -1,31 +0,0 @@
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_1_NAME ST_STM32_USART_40013800_LABEL
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0