soc: arm: stm32: fix startup SystemCoreClock values
Current STM32 SoC initialization code sets really weird startup values to SystemCoreClock. It should be consistent with Reference Manuals after this change. Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
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5 changed files with 9 additions and 13 deletions
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@ -86,8 +86,8 @@ static int stm32f0_init(struct device *arg)
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, System core clock is set to 4MHz */
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SystemCoreClock = 4000000;
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/* At reset, system core clock is set to 8 MHz from HSI */
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SystemCoreClock = 8000000;
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return 0;
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}
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@ -52,7 +52,8 @@ static int stm32f1_init(struct device *arg)
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irq_unlock(key);
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/* At reset, SystemCoreClock is set to HSI()8MHz */
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, system core clock is set to 8 MHz from HSI */
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SystemCoreClock = 8000000;
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return 0;
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@ -53,8 +53,8 @@ static int stm32f3_init(struct device *arg)
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, System core clock is set to 4MHz */
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SystemCoreClock = 4000000;
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/* At reset, system core clock is set to 8 MHz from HSI */
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SystemCoreClock = 8000000;
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return 0;
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}
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@ -53,14 +53,9 @@ static int st_stm32f4_init(struct device *arg)
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irq_unlock(key);
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#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, System core clock is set to 4MHz */
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SystemCoreClock = 4000000;
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#else
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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SystemCoreClock = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
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#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
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/* At reset, system core clock is set to 16 MHz from HSI */
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SystemCoreClock = 16000000;
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return 0;
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}
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@ -54,7 +54,7 @@ static int stm32l4_init(struct device *arg)
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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/* At reset, System core clock is set to 4MHz */
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/* At reset, system core clock is set to 4 MHz from MSI */
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SystemCoreClock = 4000000;
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return 0;
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