Commit graph

315 commits

Author SHA1 Message Date
Glauber Maroto Ferreira 9ae5fd1b34 esp32: drivers: interrupt_controller: add interrupt allocation support
Add interrupt allocation support for ESP32.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Sylvio Alves 4303cfdb3c hal: esp32: driver changes to allow HAL update
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:

wifi: update linker script by adding libphy and new attributes.

spi: update some APIs and fixed missing wait_idle check

west.yml: esp32: update hal to new version

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-07 15:01:16 -04:00
Watson Zeng a6cc3f1838 dts: designware-gpio: remove reduplicative property bits
bits property indicates the number of in-use slots of available slots
for GPIOS. We have a similar property ngpios in gpio-controller.yaml,
we will use ngpios to calculate port_pin_mask. Let's remove bits and
only use ngpios.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-06-28 13:53:57 -05:00
Glauber Maroto Ferreira d8f6e66588 esp32: drivers: spi_flash: add host flash support
Add support for ESP32 host flash chip

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-03-06 09:34:35 -05:00
Glauber Maroto Ferreira c344d0d74d esp32: drivers: counter: add support for general-purpose counters
Adds support for ESP32 general-purpose Counters

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-03-03 13:02:02 +01:00
Kumar Gala 986db52e90 dts: espressif: Move wifi node out of under SoC node.
The wifi controller isn't accessed via MMIO and thus shouldn't
exist under the SoC node which is for MMIO based devices so move
it up a level.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-26 08:11:31 -05:00
Shubham Kulkarni e16e606923 esp32: add esp32 wifi driver
add support for esp32 wifi

Signed-off-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2021-02-25 17:00:20 -05:00
Kumar Gala e317411444 dts: espressif: Move sram & rtc under SoC node
The sram & rtc should exist under the SoC node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-25 12:26:48 -06:00
Glauber Maroto Ferreira 74922049ba drivers: spi: esp32: add basic SPI master support
Include SPI master support for blocking and asynchronous calls.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-02-22 08:17:04 -05:00
Kumar Gala 1cb2dceeb4 xtensa: intel_s1000: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-14 22:12:07 -05:00
Guennadi Liakhovetski 2a6c70ab19 cavs_v25: switch over to Tigerlake H configuration
Tigerlake H has less RAM and fewer cores. Both should be
supported, selectable at the board level. For now use the H
configuration as more readily available for testing.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2021-01-11 16:10:23 -05:00
Daniel Leung 7312d361bc dts: intel_s1000: add GNA node
This adds the GNA node to the intel_s1000 SoC device tree
file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-06 05:59:21 -06:00
Kumar Gala 673a81eabb pinmux: Convert drivers to be devicetree based
Convert drivers to use pinmux devicetree node to create pinmux device
object.

On intel S1000 we add 'label' as a required property and set it to
'PINMUX' to match CONFIG_PINMUX_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-19 20:04:23 -05:00
Daniel Leung 65e8ca1c99 dts: intel_s1000: add I2S nodes
This adds the I2S nodes to the intel_s1000 SoC device tree file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-12-18 09:29:20 -05:00
Daniel Leung 498e33ed39 dts: bindings: snps,designware-dma to have dma-cells of 1
Currently, the only user of the Designware DMA controller
only needs the channel property. So make dma-cells to be
constant of 1.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-12-18 09:29:20 -05:00
Andy Ross a8d5437799 soc/xtensa: Misc. checkpatch fixups
Code style fixes.  Kept separate from the original changes to permit
easier rebasing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross 544a38ee62 soc/xtensa/intel_adsp: Upstream updates
Significant rework of the Intel Audio DSP SoC/board layers.  Includes
code from the following upstream commits:

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 25 16:34:36 2020 +0100

    xtesna: adsp: use 50k ticks per sec for audio

    Audio needs high resolution scheduling so schedule to nearest 20uS.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 24 13:59:01 2020 -0700

    soc/xtensa/intel_adsp: Remove sof-config.h includes

    This header isn't used any more, and in any case shouldn't be included
    by SoC-layer Zephyr headers that need to be able to build without SOF.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat Jun 20 15:42:58 2020 -0700

    soc/intel_adsp: Leave interrupts disabled at MP startup

    This had some code that was pasted in from esp32 that was inexplicably
    enabling interrupts when starting an auxiliary CPU.  The original
    intent was that the resulting key would be passed down to the OS, but
    that's a legacy SMP mechanism and unused.  What it actually did was
    SET the resulting value in PS.INTLEVEL, enabling interrupts globally
    before the CPU is ready to handle them.

    Just remove.  The system doesn't need to enable interrupts until the
    entrance to the first user thread on this CPU, which will do it
    automatically as part of the context switch.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 13:57:54 2020 +0300

    dts: intel_cavs: Add required label

    Add required label fixing build for CAVS15, 20, 25.
    Fixes following errors:
    ...
    devicetree error: 'label' is marked as required in 'properties:' in
    bindings/interrupt-controller/intel,cavs-intc.yaml,
    but does not appear in
    ...

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:19:56 2020 +0300

    soc: cavs_v18: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:12:25 2020 +0300

    soc: cavs_v20: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 14:59:23 2020 +0300

    soc: cavs_v25: Remove dts_fixup fix build

    Remove unused now dts_fixup and fix build with the latest code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:29:06 2020 +0300

    soc: intel_adsp: Remove unused functions

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:53:58 2020 +0300

    soc: intel_adsp: Clean up soc.h

    Remove unused or duplicated definitions.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:02:23 2020 +0300

    soc: intel_adsp: De-duplicate soc.h

    Move soc.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:54:19 2020 +0300

    soc: intel_adsp: Remove duplicated io.h

    Move duplicated io.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:46 2020 +0300

    cmake: Correct SOC_SERIES name for byt and bdw

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:02 2020 +0300

    soc: intel_adsp: Build bootloader only for specific SOCs

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 11 13:46:25 2020 +0100

    boards: xtensa: adsp: add byt and bdw boards WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 10 10:01:29 2020 -0700

    soc/intel_adsp: Make the HDA timer the default always

    The CAVS_TIMER was originally written because the CCOUNT values are
    skewed between SMP CPUs, so it's the default when SMP=y.  But really
    it should be the default always, the 19.2 MHz timer is plenty fast
    enough to be the Zephyr cycle timer, and it's rate is synchronized
    across the whole system (including the host CPU), making it a better
    choice for timing-sensitive applications.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:21:43 2020 +0300

    soc: cavs_v25: Enable general samples build

    Enables general samples build for SOC cavs_v25.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:13:53 2020 +0300

    soc: cavs_v20: Enable general samples build

    Enable general sample build.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:35:13 2020 +0300

    soc: cavs_v18: Fix build general samples

    Fix building general samples for CAVS18.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:22:40 2020 +0300

    soc: intel_adsp: Add support for other SOCs

    Support other SOCs in the "ready" message to the Host.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 13:25:39 2020 +0300

    soc: intel_adsp: Move adsp.c to common SOC area

    Move adsp.c to common and clean makefiles.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 17:18:18 2020 +0300

    boards: intel_adsp: Remove dependency on SOF

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 14:29:44 2020 +0100

    soc: xtensa: cavs: build now good for cavs20 + 25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 15:57:01 2020 +0300

    soc: cavs_v15: Fix build for hello_world

    Fix build for other then audio/sof targets.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:50:12 2020 +0300

    sample: audio/sof: Remove old overlays

    Removing old overlays used to switch logging backend.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 15:02:01 2020 +0300

    soc: intel_adsp: Correct TEXT area

    Correct HEADER_SPACE and put TEXT to:
    (HP_SRAM_WIN0_BASE +  HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:44:47 2020 +0300

    soc: intel_adsp: Trivial syntax cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:41:07 2020 +0300

    soc: intel_adsp: Fix bootloader script path

    Make it possible to find linker script if build is done not inside
    ZEPHYR_BASE.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 12:10:17 2020 +0100

    soc: xtensa: cavs20/25: fix build with new headers - WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 13:35:38 2020 +0300

    soc: intel_adsp: Fix include headers

    Fixes include headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 10:38:50 2020 +0100

    soc: xtensa: cav18: updated headers- WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Fri May 1 15:29:26 2020 -0700

    soc/xtensa/intel_adsp: Clean up MP config logic

    CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
    for which the Zephyr image is built.  This is the value kernel and
    device code should use to predicate questions like "is there more than
    one CPU?"

    CONFIG_SMP is an application tunable, controlling whether or not the
    kernel schedules threads on CPUs other than the first one.  This is
    orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
    uniprocessor system or have a UP kernel on a MP system if the other
    cores are used for non-thread application code.

    CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
    whether or not it can synchronously signal other CPUs of scheduler
    state changes.  It should be inspected only inside the scheduler (or
    other code that uses the API).  This should be selected in kconfig by
    soc layer code, or by a driver that implements the feature.

    CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
    platform.  This is what we should use as a predicate if we have
    dependence on the IPM driver for a platform feature.

    These were all being sort of borged together in code.  Split them up
    correctly, allowing the platform MP layer to be unit tested in the
    absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
    CPU (which is pathlogical in practice, but also a very good unit test)
    to be built.

    Also removes some dead linker code for SMP-related sections that don't
    exist in Zephyr.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:41:55 2020 +0100

    soc: xtensa: bootloader - use linker script

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:26:18 2020 +0100

    soc: xtensa: further fix headers - WIP

    Simplify the directory structure, WIP for cavs20 and cavs25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 12:59:30 2020 +0300

    soc: cavs_v15: Remove unneeded include

    Remove include fixing build.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Jun 7 12:37:35 2020 +0100

    soc:xtensa: adsp: remove sof specific code from soc headers

    TODO: v1.8+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 23:19:37 2020 -0700

    intel_adsp_*/doc: fix duplicate .rst labels

    Quick fix purely to make the build green again.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 22:34:40 2020 -0700

    samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig

    This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
    copied it here instead.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 5 12:34:48 2020 +0300

    soc: intel_adsp: Move soc_mp to common

    Moving soc_mp to common SOC area, it still needs fixes for taking
    number of cores from Zephyr Kconfig, etc.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 16:05:06 2020 +0300

    soc: intel_adsp: Move memory.h from lib/

    For those files from SOF referencing platform/lib/memory.h we have
    include.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 15:20:09 2020 +0300

    soc: intel_adsp: Rename platform.h to soc.h

    Rename to prevent including it from SOF.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:47:55 2020 +0300

    soc: intel_adsp: Move headers

    Move headers to more convenient place

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:21:51 2020 +0300

    soc: intel_adsp: More SOC cleaning

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Mon Jun 1 15:31:34 2020 -0700

    samples/audio/sof: import sof/src/arch/xtensa/  apollolake_defconfig

    Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
    into prj.conf and new boards/up_squared_adsp.conf

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:07:40 2020 +0100

    soc:xtensa: adsp: let SOF configure the DSP for audio

    Let SOF do this for the moment.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:06:20 2020 +0100

    soc: xtensa: cavs: remove headers similar to cavs15

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 15:58:38 2020 +0300

    soc: intel_adsp: Move ipc header to common

    Remove duplicated headers from CAVS to common SOC part

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 13:02:09 2020 +0300

    soc: cavs_v15: Remove unneeded headers

    Remove also from CAVS15.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 18:34:11 2020 +0300

    Remove more headers

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:12:09 2020 +0100

    soc: xtensa: remove cavs sod headers for drivers and trace.

    Duplicate cavs15 headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:05:12 2020 +0100

    samples: move sof dai, dma and clk configs to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 17:38:45 2020 +0300

    soc: intel_adsp: Remove more duplicated headers

    Remove more headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 2 15:50:03 2020 +0100

    samples: sof: remove pm realted files.

    Use the SOF versions.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 16:55:40 2020 +0300

    WIP: Strip lib from include path

    WIP, pushed for sync

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:44:33 2020 +0300

    soc: intel_adsp: Remove more headers

    Remove even more common headers

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:00:47 2020 +0300

    soc: intel_adsp: Remove SOF headers

    The headers would be used by audio/sof app directly from SOF module.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat May 30 11:01:26 2020 -0700

    soc/intel_adsp: Alternative log reading script

    This script speaks the same protocol and works with the same firmware,
    but:

    * Is a single file with no dependencies outside the python3 standard
      library and can be run out-of-tree (i.e. with setups where the
      firmware is not built on the device under test)

    * Operates in "tail" mode, where it will continue polling for more
      output, making it easier to watch a running process and acting more
      like a conventional console device.

    * Has no dependence on the diag_driver kernel module (it reads the DSP
      SRAM memory directly from the BAR mapping in the PCI device)

    * Is MUCH smaller than the existing tool.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 28 16:17:51 2020 +0300

    Decrease HEP pool size to 192000

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:27:00 2020 +0100

    soc: xtensa: cavs25: complete support for cavs25

    Builds, not tested on qmeu due to missing SOF ROM (TODO)

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:24:26 2020 +0100

    soc: xtensa: cavs20: complete cavs20 support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:22:13 2020 +0100

    soc: xtensa: cavs18: complete boot support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:19:23 2020 +0100

    soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:16:06 2020 +0100

    TODO: samples: sof: work  around missing trace symbols.

    Disable local trace.
    Needs trace updates finished before this can be removed.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:57:19 2020 +0100

    dts: xtensa: rename apl to cavs15 DTS

    This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:52:20 2020 +0100

    west: commands: sign: Add signing support for other CAVS targets

    Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:50:07 2020 +0100

    boards: xtensa: cavs: used Zephyr mask macro

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:49:46 2020 +0100

    soc: xtensa: move code to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 26 11:40:36 2020 +0100

    soc: xtensa: use SOF versions of clk

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:38:45 2020 +0300

    soc: intel_adsp: Send FW ready for non SOF configuration

    Configure windows and send FW ready when used without SOF, should be
    loaded with fw_loader script.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:02:22 2020 +0300

    soc: intel_adsp: Use SOF version of the file

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:47:27 2020 +0300

    soc: intel_adsp: Clean up include headers

    Remove SOF mentions from the SOC headers.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:43:05 2020 +0300

    soc: intel_adsp: Move SOF specific code to samples/audio/sof

    Move SOF specific code to the SOF sample.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:39:42 2020 +0300

    soc: intel_adsp: Use SOF module's version of mem_window.c

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:36:41 2020 +0300

    soc: intel_adsp: Use exact copy from SOF module

    Use SOF module verion of the clk.c

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 14:03:35 2020 +0300

    soc: xtensa: Add {SOC_FAMILY}/common/include path

    Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
    Fixes issues for xtensa SOCs.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:18:50 2020 +0100

    soc: xtensa: cavs common: fix headers for build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:10:57 2020 +0100

    soc: xtensa: adsp: add so_inthandlers.h for Intel platforms

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:08:26 2020 +0100

    cmake: xtensa: select correct compiler per CAVS target.

    TODO: what about XCC ?

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue May 19 14:59:26 2020 +0300

    boards: up_squared_adsp: Move SOF configuration to samples

    Move SOF-specific configuration to samples/audio/sof prj.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 15 15:29:50 2020 +0300

    soc: intel_adsp: Move SOF code to modules/audio/sof

    Move SOF dependent code out of SOC area.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 14 17:30:38 2020 +0300

    Move task_main_start() to audio/sof sample

    Start task_main_start() from main of audio/sof sample.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed May 13 15:37:20 2020 +0300

    Rename up_xtreme_adsp to intel_adsp_cavs18

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Apr 27 14:12:59 2020 +0300

    Add sample audio/sof for SOF initialization

    Add dedicated sample where we put SOF specific initialization.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 18:49:36 2020 +0300

    WIP: soc: cavs_v18: Cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:44:06 2020 +0300

    soc: cavs_v15: Move soc init to common part

    Moving SOC init to the right place.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:02:28 2020 +0300

    soc: intel_adsp: Move common part to special dir

    Moving common part to common/adsp.c

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 8 14:37:50 2020 +0300

    boards: up_xtreme_adsp: Add initial up_xtreme_adsp board

    Add initial board copying existing up_squared_adsp board and using
    CAVS1.8 SOC family.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 7 15:30:51 2020 +0300

    soc: intel_adsp: Generalize bootloader

    Move bootloader to soc/xtensa/intel_adsp making it available for other
    boards.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:31:00 2020 +0100

    boards: xtensa: up_squared: Add support for all CAVS

    Add boot support for all CAVS versions. TODO: needs to be made common

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:25:34 2020 +0100

    soc: xtensa: intel_adsp: Manage cache for DMA descriptors

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 21:10:50 2020 +0100

    soc: xtensa: adsp: use 24M567 clock

    Use audio clock

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 10:04:01 2020 +0100

    xtensa: soc: adsp: enable system agent

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:03:07 2020 +0100

    soc: xtensa: intel_adsp: increase mem pool to 192k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:02:31 2020 +0100

    soc: xtensa: intel_adsp: re-enable DMA trace

    Buffer will be empty (as trace items sent to Zephyr LOG) but
    logic is running.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 11:18:55 2020 +0100

    soc: xtensa: intel: dont use uncache region yet.

    Some code was still using this region. Use later.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 10:07:28 2020 +0100

    soc: xtensa: intel_adsp: fix notifier init

    Topology now loads.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:18:38 2020 +0100

    boards: up2: Need to use sof config for bootloader

    This will need uncoupled at some point. For testing today.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:16:38 2020 +0100

    boards: up2: increase heap to 128k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:35:19 2020 +0300

    boards: up_squared_adsp: Use bigger HEAP

    Use HEAP from old demo.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 16:06:32 2020 +0100

    soc: xtensa: intel_adsp: Fix config.h naming collisions

    Rename sof version to sof-config.h

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:22:42 2020 +0300

    Small cleanups

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 22:00:44 2020 +0300

    tests: sof/audio: Test ll scheduler

    Add more tests for scheduler.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 18:38:35 2020 +0300

    tests: Add first schedule test

    Add initial test for testing scheduling.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 29 13:36:23 2020 +0100

    soc: xtensa: rmeove build warnings

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 18:04:33 2020 +0300

    soc/intel_adsp: Register sof logging

    Register sof logging for tracing

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 14:16:55 2020 +0300

    boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE

    Define HEAP_MEM_POOL_SIZE when SOF enabled.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 10:09:20 2020 +0300

    tests: audio/sof: Add interrupt API for testing

    Add initial interrupt API for testing.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 15:54:28 2020 +0100

    soc: xtensa: adsp: Update linker script for SOF sections.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 11:20:01 2020 +0100

    soc: xtensa: adsp: send SOF FW metadata as boot message

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 26 21:47:20 2020 +0100

    soc: xtensa: adsp: re-enable all SOF IP init.

    Do all SOF IP init.

    TODO: ATOMCTL, WFI on LX6

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sat Apr 25 15:30:40 2020 +0100

    soc: xtensa: irq: Make sure IPC IRQ is registered.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 20:56:09 2020 +0300

    tests: sof: Enable console

    Enable console for the test.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 17:57:22 2020 +0300

    soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR

    Use correct value for XTENSA_KERNEL_CPU_PTR_SR.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 14:48:31 2020 +0300

    tests: audio/sof: Add tests for alloc API testing

    Add initial tests for allocation API testing. Can be extended for
    other later.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 17:49:32 2020 +0300

    logging: Enable xtensa simulator backend for ADSP

    Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 20:58:30 2020 +0100

    soc: xtensa: add common cpu logic

    Support for additional cores.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 10:11:07 2020 +0300

    Update west.yaml to point to the latest repo

    Update west.yaml

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:17:01 2020 +0100

    soc: xtensa: cavs: Fix build for clk.c on cavs18+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:31 2020 +0100

    soc: xtensa: cavs15: removed unused headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:09 2020 +0100

    soc: xtensa: cavs25: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:52 2020 +0100

    soc: xtensa: cavs20: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:09 2020 +0100

    soc: xtensa: cavs18:  Align with SOF headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 11:42:39 2020 +0100

    west: sof: Updated to latest version.

    Now builds, links and runs SOF code (but not to FW ready).

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 19 13:28:53 2020 +0100

    xtensa: intel adsp: build in SOF symbols if CONFIG_SOF

    Code now fully links against SOF. Needs to be run tested.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:19:28 2020 -0700

    DO NOT MERGE: temporarily add thesoftproject as remote for sof module

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:33:40 2020 -0700

    ipm: cavs_idc: use the IPC/IDC definitions in SoC

    The SoC definitions have the necessary IPC/IDC bits so there is
    no need to define them separately.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 14:30:20 2020 +0100

    TODO: config: Use static config for SOF module.

    TODO: needs to be generated as part of SOF kconfig

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri Apr 10 21:56:07 2020 +0100

    HACK: Add SOF into build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:55:15 2020 +0100

    west: modules: Add SOF audio module.

    Add support for building SOF as a Zephyr module. This is the starting
    point for add SOF audio into Zephyr. Currently builds but does not use
    any symbols yet.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:48:48 2020 +0100

    WIP soc: adsp-cavs15: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:43:44 2020 +0100

    WIP soc: adsp-common: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:36:32 2020 +0000

    WIP: soc: adsp-common: cache is common across all Intel ADSP platforms

    De-duplicate soc.h cache definitions.
    TODO: this needs done for other common functions.
    TODO: need to fix include path

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:43 2020 -0700

    WIP: soc: cavs25: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:12 2020 -0700

    WIP: soc: cavs20: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:06:40 2020 -0700

    WIP: soc: cavs18: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 12:37:17 2020 -0700

    soc: intel_adsp: use main_entry.S in common for cavs_v15

    The files are identical anyway.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:38:14 2020 -0700

    soc: intel_adsp/cavs_v15: link common code

    Let cavs_v15 link against the code compiled under common/.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 13:08:28 2020 +0000

    WIP: soc: common: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:37:32 2020 +0000

    WIP soc: adsp-cavs15: build power down support

    Build the power down support for CAVS1.5

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 12:40:17 2020 +0000

    WIP: soc: cavs15: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:30:08 2020 +0000

    soc: cavs15: Add missing SHIM registers.

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 9 15:43:01 2020 +0000

    xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating

    Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Feb 26 15:28:48 2020 +0000

    boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL

    SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
    module.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>
    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 10:45:15 2020 -0700

    soc: add Intel Audio DSP SoC family

    This creates a SoC family for the audio DSPs on various
    Intel CPUs. The intel_apl_adsp is being moved into
    this family as well, since it is part of the CAVS v1.5
    series of DSPs.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:29:02 2020 -0700

    soc: xtensa: add CMakeLists.txt

    Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
    inside each SoC directory will be included, similar to
    what ARM and RISCV have.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:43 2020 -0700

    Revert "boards: up_squared_adsp: Add flasher script"

    This reverts commit 80f295a9dd.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:32 2020 -0700

    Revert "boards: up_squared_adsp: Update logtool tool"

    This reverts commit 7770d182c1.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:23 2020 -0700

    Revert "soc: intel_adsp: Generalize bootloader"

    This reverts commit d6a33ef467.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>

    soc: xtensa; intel: remove sof-config.h - SQUASH

    No longer used.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Andrei Emeltchenko 3dfcfcd3c9 boards: up_squared_adsp: Add IPM console to device tree
Add IPM console to the board.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-09-04 07:55:52 -04:00
Andrei Emeltchenko 58b7c875ff soc: intel_apl_adsp: Add mailbox to the board
Add mailbox to the board DTS.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2020-08-24 13:38:33 -04:00
Kumar Gala 77a56fd725 dts: remove incorrect use of device_type property
For true mmio-sram, arc,iccm, arc,dccm nodes we should not be setting
device_type = "memory".  This should be used for true DRAM regions of
memory and not on SoC SRAMs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-07-23 06:37:41 -05:00
Mohamed ElShahawi f9e0fa9af3 drivers: esp32/clock_control: support UART, I2C
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Mohamed ElShahawi 4acac3e9ef drivers: esp32/clock_control: Add Clock Driver
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).

- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Zide Chen f32eeba925 dts: x86: configure different IO APIC delivery modes for various devices
For HPET devices, configure it with fixed delivery mode because HPET
timer interrupt is needed to fuel the scheduler for all CPUS.

For all other type of devices, like UART, I2C, GPIO, Ethernet, etc.
configure them as lowest priority delivery mode, in which IO APIC
delivers the interrupt to the processor core that is executing at the
lowest priority among all the processors listed in the specified
destination. In this case, the device drivers can avoid the trouble of
handling repeated interrupts delivered to all CPUS.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Kumar Gala 492fbf7bba intc: intc_cavs: Use DTS labels for device names
Replace Kconfig device names with one's that come from device tree like
most all other devices do.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-22 04:59:22 -05:00
Kumar Gala 43a7d26603 drivers: entropy: replace CONFIG_ENTROPY_NAME with DT macro
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL.  We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.

This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h.  Also
remove any other stale ENTROPY related defines in dts_fixup.h files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-13 09:14:21 -05:00
Daniel Leung fb1e7a563c soc: intel_apl_adsp: add multi-processing support
This adds multi-processing support for Intel Apollo Lake ADSP.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung 0ba204083d soc: intel_s1000: add SMP support
This adds SMP support for Intel S1000 SoC.

Some of the start-up code is borrowed from ESP32.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Johan Hedberg 31706c874e soc: xtensa: Add SoC definition for Audio DSP on Intel Apollolake
Create an SoC definition for the Audio DSP on Intel Apollolake

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2020-02-05 10:43:25 -05:00
Peter Bigot 10075991cc drivers: gpio_esp32: add support for pin validation
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it.  Simplify device initialization by using
instance number as only variation point.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Anas Nashif aa14022c8a intel_s1000: various fixes for build errors
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Tomasz Bursztyka 1d679156f8 dts/xtensa: Adding USB node to Intel s1000
The SoS provides one instance of the DW controller.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 8d10e66371 drivers/interrupt-controller: Make irqs DT configured in DW
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 9a57119189 dts: Add the 2 other DW DMA nodes to intel s1000
There are 2 other DMA controller found on this SoC.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka 0d4bf57709 dts: Setup DMA node for the Intel S1000
Details of the node are configured via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Mohamed ElShahawi 21096b0316 esp32: pinmux: Add Device tree support
- Add PINMUX module to esp32.dtsi

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-11-04 19:45:50 +01:00
Mohamed ElShahawi 2d2f4de5b8 drivers: watchdog: esp32: Add Watchdog Device tree support
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree

Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api

Note:
- timer module interrupt registers shall be removed when
timer driver implemented.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-11-04 18:00:36 +01:00
Mohamed ElShahawi 55471982f6 esp32: drivers: Add Entropy Device tree support
- Add TRNG module to esp32.dtsi
- Updated the note about TRNG register address

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-10-24 09:09:41 -05:00
Mohamed ElShahawi 566d07e00c [ESP32] drivers: Add I2C Device tree support
- Add I2C modules to esp32.dtsi
- I2C Pins and bitrate config moved to esp32.dts

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-10-22 08:01:24 -05:00
Yannis Damigos efec7f73b7 dts: esp32: Add GPIO support in DT
Add GPIO support in DT

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-09-25 17:39:42 +02:00
Mohamed ElShahawi 0705be344c drivers: esp32: UART Fix yaml/dts binding name
replace "xtensa" with "espressif", as the latter is the correct
vendor name.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Mohamed ElShahawi 2d035c4191 drivers: esp32: Add UART Driver with FIFO/Interrupt support
- Fixes #3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig

Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts

- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs

- Old Silicon rev is not supported

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2019-09-11 07:50:20 -05:00
Kumar Gala d6e6a2be38 irq: intel_s1000: Fixup IRQ values for multi-level IRQ handling
Remove the handcoded multi-level IRQ values in device tree.  We now are
able to generate the encoded multi-level IRQ value.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
Piotr Zięcik e4bd11b3f3 dts: Add information about system bus frequency to the dts
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
Piotr Zięcik 7d56fc35fd dts: Add information about CPU frequency to the cpu nodes
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:

- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
  in order to configure USB clock source.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-17 21:53:36 +02:00
Yannis Damigos 3748085d18 dts: intel_s1000: Move core_intc node under soc node
Move core_intc node under soc node

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Yannis Damigos ae781bd9bd dts: Restructure xtensa dts directory
Restructure xtensa dts directory

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Yannis Damigos aa8901c332 dts: xtensa: Fix compatible for xtensa lx6
Fix compatible for xtensa lx6

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-16 10:07:29 -04:00
Sathish Kuttan 02d49df52f dts: intel_s1000: add low power sram as sram1
Add the 64KB SRAM in low power domain to the SoC device tree

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-06-11 16:36:30 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Savinay Dharmappa 40e0f18e21 dts: qemu_xtensa/xt-sim: Enable device tree support
patch enables dts support for boards qemu_xtensa and xt-sim

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-01 07:49:28 -06:00
Kumar Gala d3623a2fba soc: xtensa: intel_s1000: Encode IRQ in dts
Move IRQ number encoding out of dts_fixup.h and into the dtsi files.
For now just change devices on the dw_intc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-01 04:09:01 -06:00
Savinay Dharmappa 3bec750268 dts: xtensa: esp32: Add device tree support.
add device tree support for esp32

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-01-29 09:47:17 -06:00
Kumar Gala 94e02794f3 dts: intel_s1000: Fix dtc warnings
Fix the following dtc warnings on S1000:

	Warning (simple_bus_reg): /soc/pinmux@81C30: simple-bus unit
	address format error, expected "81c30"

	Warning (alias_paths): /aliases: aliases property name must
	include only lowercase and '-'

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-01-28 10:42:20 -06:00
Sathish Kuttan 1b1c80256f dts: intel_s1000: add pinctrl to device tree
Add pinctrl node to Intel S1000 SoC device tree for I/O MUX selection

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-29 14:23:24 -08:00
Sathish Kuttan 23f11933b9 dts: intel_s1000: enable DTS for GPIO
Added GPIO to SoC device tree
Updated SoC DTS fixup
Removed Kconfig variables now replaced by DT

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-26 06:56:48 -08:00
Savinay Dharmappa cf58f83dd6 boards: xtensa: intel_s1000_crb: Enable SPI Master driver
patch enables SPI Master driver on intel_s1000_crb

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-11-13 18:49:03 -05:00
Sathish Kuttan 45f0917308 dts: intel_s1000: update SRAM size to 4MB
Intel S1000 has 4MB of internal memory.
In DTS it was defined as 3MB and is now updated to 4MB.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-11-09 20:32:13 -05:00
Daniel Leung c15774bfa3 dts: intel_s1000: fix warning about leading "0x"
This removes the prefix "0x" for sram0 to fix a warning.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 17:52:45 -04:00
Kumar Gala 6e240da26f dts: Use new DT_SIZE_{K,M} macros
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere.  We also have DT_SIZE_M, so use that in a few
places as well.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-15 09:23:07 -05:00
Rajavardhan Gundi e5b0e9ac07 DTS: interrupt controller: Define IRQ priorities for CAVS & DW ICTL
IRQ priorities for CAVS and DW were previously defined in Kconfig.
They are now defined via DTS and removed from Kconfig.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-06-11 17:27:58 -04:00
Savinay Dharmappa 76676651f4 dts: intel_s1000: Enable generating IRQ priority.
patch enable generating IRQ priority for designware
interrupt controller used in intel_s1000

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 09:30:14 -04:00
Savinay Dharmappa 6701d44967 dts: xtensa: Fix build error due to dts changes for ns16550 driver.
patch add clock frequency and interrupt property to uart
node in intel_s1000.dtsi. Include soc.h after types.h to
prevent build error.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-22 08:51:59 -04:00
Savinay Dharmappa 7be3236ca4 dts: interrupt_controller: Add dts support for DesignWare controller
Add dts support for multilevel DW interrupt controller

Change-Id: Ia16d6870bd3a46fca933c906aedc6ba78ed5131a
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 9ee4929d56 dts: i2c: Add dts support for i2c
Change-Id: I9104f5230a4efbf1b6979e146e7ea73a76891947
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00
Savinay Dharmappa 97f721d928 dts: xtensa: Add device tree support for xtensa
Change-Id: I309bc50c6b575caa84fbc7ab98cc9890771b4274
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-01 16:46:41 -04:00